xref: /openbsd/sys/arch/macppc/include/pci_machdep.h (revision 0af614b4)
1*0af614b4Smpi /*	$OpenBSD: pci_machdep.h,v 1.4 2019/12/05 12:46:54 mpi Exp $	*/
22d3c312aSmpi /*	$NetBSD: pci_machdep.h,v 1.7 2001/07/20 00:07:14 eeh Exp $ */
32d3c312aSmpi 
42d3c312aSmpi /*
52d3c312aSmpi  * Copyright (c) 1999 Matthew R. Green
62d3c312aSmpi  * All rights reserved.
72d3c312aSmpi  *
82d3c312aSmpi  * Redistribution and use in source and binary forms, with or without
92d3c312aSmpi  * modification, are permitted provided that the following conditions
102d3c312aSmpi  * are met:
112d3c312aSmpi  * 1. Redistributions of source code must retain the above copyright
122d3c312aSmpi  *    notice, this list of conditions and the following disclaimer.
132d3c312aSmpi  * 2. Redistributions in binary form must reproduce the above copyright
142d3c312aSmpi  *    notice, this list of conditions and the following disclaimer in the
152d3c312aSmpi  *    documentation and/or other materials provided with the distribution.
162d3c312aSmpi  *
172d3c312aSmpi  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
182d3c312aSmpi  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
192d3c312aSmpi  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
202d3c312aSmpi  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
212d3c312aSmpi  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
222d3c312aSmpi  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
232d3c312aSmpi  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
242d3c312aSmpi  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
252d3c312aSmpi  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
262d3c312aSmpi  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
272d3c312aSmpi  * SUCH DAMAGE.
282d3c312aSmpi  */
292d3c312aSmpi 
302d3c312aSmpi #ifndef _MACHINE_PCI_MACHDEP_H_
312d3c312aSmpi #define _MACHINE_PCI_MACHDEP_H_
322d3c312aSmpi 
332d3c312aSmpi extern struct powerpc_bus_dma_tag pci_bus_dma_tag;
342d3c312aSmpi 
352d3c312aSmpi /*
362d3c312aSmpi  * Forward declarations.
372d3c312aSmpi  */
382d3c312aSmpi struct pci_attach_args;
392d3c312aSmpi 
402d3c312aSmpi /*
412d3c312aSmpi  * define some bits used to glue into the common PCI code.
422d3c312aSmpi  */
432d3c312aSmpi 
442d3c312aSmpi typedef struct ppc_pci_chipset *pci_chipset_tag_t;
452d3c312aSmpi 
462d3c312aSmpi typedef unsigned long pci_intr_handle_t;
472d3c312aSmpi 
482d3c312aSmpi /*
492d3c312aSmpi  * The stuuuuuuupid allegedly MI PCI code expects pcitag_t to be a
502d3c312aSmpi  * scalar type.  But we really need to store both the OFW node and
512d3c312aSmpi  * the bus/device/function info in it.  (We'd like to store more,
522d3c312aSmpi  * like all the ofw properties, but we don't need to.)  Luckily,
532d3c312aSmpi  * both are 32-bit values, so we can squeeze them into a u_int64_t
542d3c312aSmpi  * with a little help from some macros.
552d3c312aSmpi  */
562d3c312aSmpi 
572d3c312aSmpi #define PCITAG_NODE(x)		(int)(((x)>>32)&0xffffffff)
582d3c312aSmpi #define PCITAG_OFFSET(x)	((x)&0xffffffff)
592d3c312aSmpi #define PCITAG_BUS(t)		((PCITAG_OFFSET(t)>>16)&0xff)
602d3c312aSmpi #define PCITAG_DEV(t)		((PCITAG_OFFSET(t)>>11)&0x1f)
612d3c312aSmpi #define PCITAG_FUN(t)		((PCITAG_OFFSET(t)>>8)&0x7)
622d3c312aSmpi #define PCITAG_CREATE(n,b,d,f)	(((uint64_t)(n)<<32)|((b)<<16)|((d)<<11)|((f)<<8))
632d3c312aSmpi typedef uint64_t pcitag_t;
642d3c312aSmpi 
652d3c312aSmpi struct ppc_pci_chipset {
662d3c312aSmpi 	void		*pc_conf_v;
672d3c312aSmpi 	int		 pc_node;
682d3c312aSmpi 	int		 busnode[256];
692d3c312aSmpi 
702d3c312aSmpi 	pcireg_t	(*pc_conf_read)(void *, pcitag_t, int);
712d3c312aSmpi 	void		(*pc_conf_write)(void *, pcitag_t, int, pcireg_t);
722d3c312aSmpi };
732d3c312aSmpi 
742d3c312aSmpi 
752d3c312aSmpi void		pci_attach_hook(struct device *, struct device *,
762d3c312aSmpi 		    struct pcibus_attach_args *);
772d3c312aSmpi int		pci_bus_maxdevs(pci_chipset_tag_t, int);
782d3c312aSmpi pcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
792d3c312aSmpi void		pci_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, int *,
802d3c312aSmpi 		    int *);
812d3c312aSmpi int		pci_conf_size(pci_chipset_tag_t, pcitag_t);
822d3c312aSmpi pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
832d3c312aSmpi void		pci_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t);
842d3c312aSmpi int		pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
852d3c312aSmpi int		pci_intr_map_msi(struct pci_attach_args *, pci_intr_handle_t *);
86058ea912Skettenis #define		pci_intr_map_msix(p, vec, ihp)	(-1)
872d3c312aSmpi int		pci_intr_line(pci_chipset_tag_t, pci_intr_handle_t);
882d3c312aSmpi const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
892d3c312aSmpi void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
902d3c312aSmpi 		    int, int (*)(void *), void *, const char *);
912d3c312aSmpi void		pci_intr_disestablish(pci_chipset_tag_t, void *);
922d3c312aSmpi int		pci_ether_hw_addr(pci_chipset_tag_t, uint8_t *);
932d3c312aSmpi 
942d3c312aSmpi #define pci_probe_device_hook(c, a)	(0)
952d3c312aSmpi 
962d3c312aSmpi #define pci_min_powerstate(c, t)	(PCI_PMCSR_STATE_D3)
9725b7ac45Smpi #define pci_set_powerstate_md(c, t, s, p)
982d3c312aSmpi 
992d3c312aSmpi #define pci_dev_postattach(a, b)
1002d3c312aSmpi 
1012d3c312aSmpi int		ofw_intr_map(int, uint32_t *, uint32_t *);
1022d3c312aSmpi int		ofw_enumerate_pcibus(struct pci_softc *,
1032d3c312aSmpi 		    int (*match)(struct pci_attach_args *),
1042d3c312aSmpi 		    struct pci_attach_args *);
1052d3c312aSmpi 
1062d3c312aSmpi #define PCI_MACHDEP_ENUMERATE_BUS	ofw_enumerate_pcibus
1072d3c312aSmpi 
1082d3c312aSmpi #endif /* _MACHINE_PCI_MACHDEP_H_ */
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