1 /* $OpenBSD: pte.h,v 1.18 2014/03/22 00:00:38 miod Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1992, 1993 6 * The Regents of the University of California. All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department and Ralph Campbell. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: Utah Hdr: pte.h 1.11 89/09/03 37 * from: @(#)pte.h 8.1 (Berkeley) 6/10/93 38 */ 39 40 /* 41 * R4000 and R8000 hardware page table entries 42 */ 43 44 #ifndef _LOCORE 45 46 /* 47 * Structure defining a TLB entry data set. 48 */ 49 struct tlb_entry { 50 u_int64_t tlb_mask; 51 u_int64_t tlb_hi; 52 u_int64_t tlb_lo0; 53 u_int64_t tlb_lo1; 54 }; 55 56 u_int tlb_get_pid(void); 57 void tlb_read(unsigned int, struct tlb_entry *); 58 59 #ifdef MIPS_PTE64 60 typedef u_int64_t pt_entry_t; 61 #else 62 typedef u_int32_t pt_entry_t; 63 #endif 64 65 #endif /* _LOCORE */ 66 67 /* entryhi values */ 68 69 #ifndef CPU_R8000 70 #define PG_HVPN (-2 * PAGE_SIZE) /* Hardware page number mask */ 71 #define PG_ODDPG PAGE_SIZE 72 #endif /* !R8000 */ 73 74 /* Address space ID */ 75 #ifdef CPU_R8000 76 #define PG_ASID_MASK 0x0000000000000ff0 77 #define PG_ASID_SHIFT 4 78 #define ICACHE_ASID_SHIFT 40 79 #define MIN_USER_ASID 0 80 #else 81 #define PG_ASID_MASK 0x00000000000000ff 82 #define PG_ASID_SHIFT 0 83 #define MIN_USER_ASID 1 84 #endif 85 #define PG_ASID_COUNT 256 /* Number of available ASID */ 86 87 /* entrylo values */ 88 89 #ifdef CPU_R8000 90 #define PG_FRAME 0xfffff000 91 #define PG_SHIFT 0 92 #else 93 #ifdef MIPS_PTE64 94 #define PG_FRAMEBITS 61 95 #else 96 #define PG_FRAMEBITS 29 97 #endif 98 #define PG_FRAME ((1ULL << PG_FRAMEBITS) - (1ULL << PG_SHIFT)) 99 #define PG_SHIFT 6 100 #endif 101 102 /* software pte bits - not put in entrylo */ 103 #ifdef CPU_R8000 104 #define PG_WIRED 0x00000010 105 #define PG_RO 0x00000020 106 #else 107 #define PG_WIRED (1ULL << (PG_FRAMEBITS + 2)) 108 #define PG_RO (1ULL << (PG_FRAMEBITS + 1)) 109 #define PG_SP (1ULL << (PG_FRAMEBITS + 0)) /* ``special'' bit */ 110 #endif 111 112 #define PG_NV 0x00000000 113 #ifdef CPU_R8000 114 #define PG_G 0x00000000 /* no such concept for R8000 */ 115 #define PG_V 0x00000080 116 #define PG_M 0x00000100 117 #define PG_CCA_SHIFT 9 118 #else 119 #define PG_G 0x00000001 120 #define PG_V 0x00000002 121 #define PG_M 0x00000004 122 #define PG_CCA_SHIFT 3 123 #endif 124 #define PG_NV 0x00000000 125 126 #define PG_UNCACHED (CCA_NC << PG_CCA_SHIFT) 127 #define PG_CACHED_NC (CCA_NONCOHERENT << PG_CCA_SHIFT) 128 #define PG_CACHED_CE (CCA_COHERENT_EXCL << PG_CCA_SHIFT) 129 #define PG_CACHED_CEW (CCA_COHERENT_EXCLWRITE << PG_CCA_SHIFT) 130 #define PG_CACHED (CCA_CACHED << PG_CCA_SHIFT) 131 #define PG_CACHEMODE (7 << PG_CCA_SHIFT) 132 133 #define PG_ATTR (PG_CACHEMODE | PG_M | PG_V | PG_G) 134 #define PG_ROPAGE (PG_V | PG_RO | PG_CACHED) /* Write protected */ 135 #define PG_RWPAGE (PG_V | PG_M | PG_CACHED) /* Not w-prot not clean */ 136 #define PG_CWPAGE (PG_V | PG_CACHED) /* Not w-prot but clean */ 137 #define PG_IOPAGE (PG_G | PG_V | PG_M | PG_UNCACHED) 138 139 #define pfn_to_pad(pa) ((((paddr_t)pa) & PG_FRAME) << PG_SHIFT) 140 #define vad_to_pfn(va) (((va) >> PG_SHIFT) & PG_FRAME) 141 142 #ifndef CPU_R8000 143 #define PG_SIZE_4K 0x00000000 144 #define PG_SIZE_16K 0x00006000 145 #define PG_SIZE_64K 0x0001e000 146 #define PG_SIZE_256K 0x0007e000 147 #define PG_SIZE_1M 0x001fe000 148 #define PG_SIZE_4M 0x007fe000 149 #define PG_SIZE_16M 0x01ffe000 150 #if PAGE_SHIFT == 12 151 #define TLB_PAGE_MASK PG_SIZE_4K 152 #elif PAGE_SHIFT == 14 153 #define TLB_PAGE_MASK PG_SIZE_16K 154 #endif 155 #endif /* !R8000 */ 156