1 /* 2 * THIS FILE IS AUTOMATICALLY GENERATED 3 * DONT EDIT THIS FILE 4 */ 5 6 /* $OpenBSD: cn30xxpipreg.h,v 1.1 2011/06/16 11:22:30 syuu Exp $ */ 7 8 /* 9 * Copyright (c) 2007 Internet Initiative Japan, Inc. 10 * All rights reserved. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* 35 * Cavium Networks OCTEON CN30XX Hardware Reference Manual 36 * CN30XX-HM-1.0 37 * 7.8 PIP Registers 38 */ 39 40 #ifndef _CN30XXPIPREG_H_ 41 #define _CN30XXPIPREG_H_ 42 43 #define PIP_BIST_STATUS 0x00011800a0000000ULL 44 #define PIP_INT_REG 0x00011800a0000008ULL 45 #define PIP_INT_EN 0x00011800a0000010ULL 46 #define PIP_STAT_CTL 0x00011800a0000018ULL 47 #define PIP_GBL_CTL 0x00011800a0000020ULL 48 #define PIP_GBL_CFG 0x00011800a0000028ULL 49 #define PIP_SOFT_RST 0x00011800a0000030ULL 50 #define PIP_IP_OFFSET 0x00011800a0000060ULL 51 #define PIP_TAG_SECRET 0x00011800a0000068ULL 52 #define PIP_TAG_MASK 0x00011800a0000070ULL 53 #define PIP_DEC_IPSEC0 0x00011800a0000080ULL 54 #define PIP_DEC_IPSEC1 0x00011800a0000088ULL 55 #define PIP_DEC_IPSEC2 0x00011800a0000090ULL 56 #define PIP_DEC_IPSEC3 0x00011800a0000098ULL 57 #define PIP_RAW_WORD 0x00011800a00000b0ULL 58 #define PIP_QOS_VLAN0 0x00011800a00000c0ULL 59 #define PIP_QOS_VLAN1 0x00011800a00000c8ULL 60 #define PIP_QOS_VLAN2 0x00011800a00000d0ULL 61 #define PIP_QOS_VLAN3 0x00011800a00000d8ULL 62 #define PIP_QOS_VLAN4 0x00011800a00000e0ULL 63 #define PIP_QOS_VLAN5 0x00011800a00000e8ULL 64 #define PIP_QOS_VLAN6 0x00011800a00000f0ULL 65 #define PIP_QOS_VLAN7 0x00011800a00000f8ULL 66 #define PIP_QOS_WATCH0 0x00011800a0000100ULL 67 #define PIP_QOS_WATCH1 0x00011800a0000108ULL 68 #define PIP_QOS_WATCH2 0x00011800a0000110ULL 69 #define PIP_QOS_WATCH3 0x00011800a0000118ULL 70 #define PIP_PRT_CFG0 0x00011800a0000200ULL 71 #define PIP_PRT_CFG1 0x00011800a0000208ULL 72 #define PIP_PRT_CFG2 0x00011800a0000210ULL 73 #define PIP_PRT_CFG32 0x00011800a0000300ULL 74 #define PIP_PRT_TAG0 0x00011800a0000400ULL 75 #define PIP_PRT_TAG1 0x00011800a0000408ULL 76 #define PIP_PRT_TAG2 0x00011800a0000410ULL 77 #define PIP_PRT_TAG32 0x00011800a0000500ULL 78 #define PIP_QOS_DIFF0 0x00011800a0000600ULL 79 /* PIP_QOS_DIFF[1-63] */ 80 /* PIP_STAT[0-9]_PRT{0,1,2,32} */ 81 #define PIP_STAT0_PRT0 0x00011800a0000800ULL 82 #define PIP_STAT0_PRT1 0x00011800a0000850ULL 83 #define PIP_STAT0_PRT2 0x00011800a00008a0ULL 84 #define PIP_STAT0_PRT32 0x00011800a0001200ULL 85 #define PIP_TAG_INC0 0x00011800a0001800ULL 86 /* PIP_TAG_INC[1-63] */ 87 #define PIP_STAT_INB_PKTS0 0x00011800a0001a00ULL 88 #define PIP_STAT_INB_PKTS1 0x00011800a0001a20ULL 89 #define PIP_STAT_INB_PKTS2 0x00011800a0001a40ULL 90 #define PIP_STAT_INB_PKTS32 0x00011800a0001e00ULL 91 #define PIP_STAT_INB_OCTS0 0x00011800a0001a08ULL 92 #define PIP_STAT_INB_OCTS1 0x00011800a0001a28ULL 93 #define PIP_STAT_INB_OCTS2 0x00011800a0001a48ULL 94 #define PIP_STAT_INB_OCTS32 0x00011800a0001e08ULL 95 #define PIP_STAT_INB_ERRS0 0x00011800a0001a10ULL 96 #define PIP_STAT_INB_ERRS1 0x00011800a0001a30ULL 97 #define PIP_STAT_INB_ERRS2 0x00011800a0001a50ULL 98 #define PIP_STAT_INB_ERRS32 0x00011800a0001e10ULL 99 100 #define PIP_BASE 0x00011800a0000000ULL 101 #define PIP_SIZE 0x1e50ULL 102 103 #define PIP_BIST_STATUS_OFFSET 0x0ULL 104 #define PIP_INT_REG_OFFSET 0x8ULL 105 #define PIP_INT_EN_OFFSET 0x10ULL 106 #define PIP_STAT_CTL_OFFSET 0x18ULL 107 #define PIP_GBL_CTL_OFFSET 0x20ULL 108 #define PIP_GBL_CFG_OFFSET 0x28ULL 109 #define PIP_SOFT_RST_OFFSET 0x30ULL 110 #define PIP_IP_OFFSET_OFFSET 0x60ULL 111 #define PIP_TAG_SECRET_OFFSET 0x68ULL 112 #define PIP_TAG_MASK_OFFSET 0x70ULL 113 #define PIP_DEC_IPSEC0_OFFSET 0x80ULL 114 #define PIP_DEC_IPSEC1_OFFSET 0x88ULL 115 #define PIP_DEC_IPSEC2_OFFSET 0x90ULL 116 #define PIP_DEC_IPSEC3_OFFSET 0x98ULL 117 #define PIP_RAW_WORD_OFFSET 0xb0ULL 118 #define PIP_QOS_VLAN0_OFFSET 0xc0ULL 119 #define PIP_QOS_VLAN1_OFFSET 0xc8ULL 120 #define PIP_QOS_VLAN2_OFFSET 0xd0ULL 121 #define PIP_QOS_VLAN3_OFFSET 0xd8ULL 122 #define PIP_QOS_VLAN4_OFFSET 0xe0ULL 123 #define PIP_QOS_VLAN5_OFFSET 0xe8ULL 124 #define PIP_QOS_VLAN6_OFFSET 0xf0ULL 125 #define PIP_QOS_VLAN7_OFFSET 0xf8ULL 126 #define PIP_QOS_WATCH0_OFFSET 0x100ULL 127 #define PIP_QOS_WATCH1_OFFSET 0x108ULL 128 #define PIP_QOS_WATCH2_OFFSET 0x110ULL 129 #define PIP_QOS_WATCH3_OFFSET 0x118ULL 130 #define PIP_PRT_CFG0_OFFSET 0x200ULL 131 #define PIP_PRT_CFG1_OFFSET 0x208ULL 132 #define PIP_PRT_CFG2_OFFSET 0x210ULL 133 #define PIP_PRT_CFG32_OFFSET 0x300ULL 134 #define PIP_PRT_TAG0_OFFSET 0x400ULL 135 #define PIP_PRT_TAG1_OFFSET 0x408ULL 136 #define PIP_PRT_TAG2_OFFSET 0x410ULL 137 #define PIP_PRT_TAG32_OFFSET 0x500ULL 138 #define PIP_QOS_DIFF0_OFFSET 0x600ULL 139 /* PIP_QOS_DIFF[1-63] */ 140 #define PIP_STAT0_PRT0_OFFSET 0x800ULL 141 #define PIP_STAT0_PRT1_OFFSET 0x850ULL 142 #define PIP_STAT0_PRT2_OFFSET 0x8a0ULL 143 #define PIP_STAT0_PRT32_OFFSET 0x1200ULL 144 #define PIP_STAT0_PRT33_OFFSET 0x1250ULL 145 #define PIP_STAT1_PRT0_OFFSET 0x800ULL 146 #define PIP_STAT1_PRT1_OFFSET 0x850ULL 147 #define PIP_STAT1_PRT2_OFFSET 0x8a0ULL 148 #define PIP_STAT1_PRT32_OFFSET 0x1200ULL 149 #define PIP_STAT1_PRT33_OFFSET 0x1250ULL 150 #define PIP_STAT2_PRT0_OFFSET 0x810ULL 151 #define PIP_STAT2_PRT1_OFFSET 0x860ULL 152 #define PIP_STAT2_PRT2_OFFSET 0x8b0ULL 153 #define PIP_STAT2_PRT32_OFFSET 0x1210ULL 154 #define PIP_STAT2_PRT33_OFFSET 0x1260ULL 155 #define PIP_STAT3_PRT0_OFFSET 0x818ULL 156 #define PIP_STAT3_PRT1_OFFSET 0x868ULL 157 #define PIP_STAT3_PRT2_OFFSET 0x8b8ULL 158 #define PIP_STAT3_PRT32_OFFSET 0x1218ULL 159 #define PIP_STAT3_PRT33_OFFSET 0x1268ULL 160 #define PIP_STAT4_PRT0_OFFSET 0x820ULL 161 #define PIP_STAT4_PRT1_OFFSET 0x870ULL 162 #define PIP_STAT4_PRT2_OFFSET 0x8c0ULL 163 #define PIP_STAT4_PRT32_OFFSET 0x1220ULL 164 #define PIP_STAT4_PRT33_OFFSET 0x1270ULL 165 #define PIP_STAT5_PRT0_OFFSET 0x828ULL 166 #define PIP_STAT5_PRT1_OFFSET 0x878ULL 167 #define PIP_STAT5_PRT2_OFFSET 0x8c8ULL 168 #define PIP_STAT5_PRT32_OFFSET 0x1228ULL 169 #define PIP_STAT5_PRT33_OFFSET 0x1278ULL 170 #define PIP_STAT6_PRT0_OFFSET 0x830ULL 171 #define PIP_STAT6_PRT1_OFFSET 0x880ULL 172 #define PIP_STAT6_PRT2_OFFSET 0x8d0ULL 173 #define PIP_STAT6_PRT32_OFFSET 0x1238ULL 174 #define PIP_STAT6_PRT33_OFFSET 0x1288ULL 175 #define PIP_STAT7_PRT0_OFFSET 0x838ULL 176 #define PIP_STAT7_PRT1_OFFSET 0x888ULL 177 #define PIP_STAT7_PRT2_OFFSET 0x8d8ULL 178 #define PIP_STAT7_PRT32_OFFSET 0x1238ULL 179 #define PIP_STAT7_PRT33_OFFSET 0x1288ULL 180 #define PIP_STAT8_PRT0_OFFSET 0x840ULL 181 #define PIP_STAT8_PRT1_OFFSET 0x890ULL 182 #define PIP_STAT8_PRT2_OFFSET 0x8e0ULL 183 #define PIP_STAT8_PRT32_OFFSET 0x1240ULL 184 #define PIP_STAT8_PRT33_OFFSET 0x1290ULL 185 #define PIP_STAT9_PRT0_OFFSET 0x848ULL 186 #define PIP_STAT9_PRT1_OFFSET 0x898ULL 187 #define PIP_STAT9_PRT2_OFFSET 0x8e8ULL 188 #define PIP_STAT9_PRT32_OFFSET 0x1248ULL 189 #define PIP_STAT9_PRT33_OFFSET 0x1298ULL 190 #define PIP_TAG_INC0_OFFSET 0x1800ULL 191 /* PIP_TAG_INC[1-63] */ 192 #define PIP_STAT_INB_PKTS0_OFFSET 0x1a00ULL 193 #define PIP_STAT_INB_PKTS1_OFFSET 0x1a20ULL 194 #define PIP_STAT_INB_PKTS2_OFFSET 0x1a40ULL 195 #define PIP_STAT_INB_PKTS32_OFFSET 0x1e00ULL 196 #define PIP_STAT_INB_OCTS0_OFFSET 0x1a08ULL 197 #define PIP_STAT_INB_OCTS1_OFFSET 0x1a28ULL 198 #define PIP_STAT_INB_OCTS2_OFFSET 0x1a48ULL 199 #define PIP_STAT_INB_OCTS32_OFFSET 0x1e08ULL 200 #define PIP_STAT_INB_ERRS0_OFFSET 0x1a10ULL 201 #define PIP_STAT_INB_ERRS1_OFFSET 0x1a30ULL 202 #define PIP_STAT_INB_ERRS2_OFFSET 0x1a50ULL 203 #define PIP_STAT_INB_ERRS32_OFFSET 0x1e10ULL 204 #define PIP_STAT_INB_ERRS33_OFFSET 0x1e30ULL 205 206 /* 207 * PIP_BIST_STATUS 208 */ 209 #define PIP_BIST_STATUS_63_13 0xfffffffffffc0000ULL 210 #define PIP_BIST_STATUS_BIST 0x000000000003ffffULL 211 212 /* 213 * PIP_INT_REG 214 */ 215 #define PIP_INT_REG_63_9 0xfffffffffffffe00ULL 216 #define PIP_INT_REG_BEPERR 0x0000000000000100ULL 217 #define PIP_INT_REG_FEPERR 0x0000000000000080ULL 218 #define PIP_INT_REG_6 0x0000000000000040ULL 219 #define PIP_INT_REG_SKPRUNT 0x0000000000000020ULL 220 #define PIP_INT_REG_BADTAG 0x0000000000000010ULL 221 #define PIP_INT_REG_PRTNXA 0x0000000000000008ULL 222 #define PIP_INT_REG_2_1 0x00000006 223 #define PIP_INT_REG_PKTDRP 0x00000001 224 225 /* 226 * PIP_INT_EN 227 */ 228 #define PIP_INT_EN_63_9 0xfffffffffffffe00ULL 229 #define PIP_INT_EN_BEPERR 0x0000000000000100ULL 230 #define PIP_INT_EN_FEPERR 0x0000000000000080ULL 231 #define PIP_INT_EN_6 0x0000000000000040ULL 232 #define PIP_INT_EN_SKPRUNT 0x0000000000000020ULL 233 #define PIP_INT_EN_BADTAG 0x0000000000000010ULL 234 #define PIP_INT_EN_PRTNXA 0x0000000000000008ULL 235 #define PIP_INT_EN_2_1 0x00000006 236 #define PIP_INT_EN_PKTDRP 0x00000001 237 238 /* 239 * PIP_STAT_CTL 240 */ 241 #define PIP_STAT_CTL_63_1 0xfffffffffffffffeULL 242 #define PIP_STAT_CTL_RDCLR 0x0000000000000001ULL 243 244 /* 245 * PIP_GBL_CTL 246 */ 247 #define PIP_GBL_CTL_63_17 0xfffffffffffe0000ULL 248 #define PIP_GBL_CTL_IGNRS 0x0000000000010000ULL 249 #define PIP_GBL_CTL_VS_WQE 0x0000000000008000ULL 250 #define PIP_GBL_CTL_VS_QOS 0x0000000000004000ULL 251 #define PIP_GBL_CTL_L2MAL 0x0000000000002000ULL 252 #define PIP_GBL_CTL_TCP_FLAG 0x0000000000001000ULL 253 #define PIP_GBL_CTL_L4_LEN 0x0000000000000800ULL 254 #define PIP_GBL_CTL_L4_CHK 0x0000000000000400ULL 255 #define PIP_GBL_CTL_L4_PRT 0x0000000000000200ULL 256 #define PIP_GBL_CTL_L4_MAL 0x0000000000000100ULL 257 #define PIP_GBL_CTL_7_6 0x00000000000000c0ULL 258 #define PIP_GBL_CTL_IP6_EEXT 0x0000000000000030ULL 259 #define PIP_GBL_CTL_IP4_OPTS 0x0000000000000008ULL 260 #define PIP_GBL_CTL_IP_HOP 0x0000000000000004ULL 261 #define PIP_GBL_CTL_IP_MAL 0x0000000000000002ULL 262 #define PIP_GBL_CTL_IP_CHK 0x0000000000000001ULL 263 264 /* 265 * PIP_GBL_CFG 266 */ 267 /* XXX CN30XX-HM-1.0 says 63_17 is reserved */ 268 #define PIP_GBL_CFG_63_19 0xfffffffffff80000ULL 269 #define PIP_GBL_CFG_TAG_SYN 0x0000000000040000ULL 270 #define PIP_GBL_CFG_IP6_UDP 0x0000000000020000ULL 271 #define PIP_GBL_CFG_MAX_L2 0x0000000000010000ULL 272 #define PIP_GBL_CFG_15_11 0x000000000000f800ULL 273 #define PIP_GBL_CFG_RAW_SHF 0x0000000000000700ULL 274 #define PIP_GBL_CFG_7_3 0x00000000000000f8ULL 275 #define PIP_GBL_CFG_NIP_SHF 0x0000000000000007ULL 276 277 /* 278 * PIP_SFT_RST 279 */ 280 #define PIP_SFT_RST_63_17 0xfffffffffffffffeULL 281 #define PIP_SFT_RST_RST 0x0000000000000001ULL 282 283 /* 284 * PIP_IP_OFFSET 285 */ 286 #define PIP_IP_OFFSET_63_3 0xfffffffffffffff8ULL 287 /* PIP_IP_OFFSET_OFFSET is defined above - conflict! */ 288 #define PIP_IP_OFFSET_MASK_OFFSET 0x0000000000000007ULL 289 290 /* 291 * PIP_TAG_SECRET 292 */ 293 #define PIP_TAG_SECRET_63_3 0xffffffff00000000ULL 294 #define PIP_TAG_SECRET_DST 0x00000000ffff0000ULL 295 #define PIP_TAG_SECRET_SRC 0x000000000000ffffULL 296 297 /* 298 * PIP_TAG_MASK 299 */ 300 #define PIP_TAG_MASK_63_16 0xffffffffffff0000ULL 301 #define PIP_TAG_MASK_MASK 0x000000000000ffffULL 302 303 /* 304 * PIP_DEC_IPSECN 305 */ 306 #define PIP_DEC_IPSECN_63_18 0xfffffffffffc0000ULL 307 #define PIP_DEC_IPSECN_TCP 0x0000000000020000ULL 308 #define PIP_DEC_IPSECN_UDP 0x0000000000010000ULL 309 #define PIP_DEC_IPSECN_DPRT 0x000000000000ffffULL 310 311 /* 312 * PIP_RAW_WORD 313 */ 314 #define PIP_RAW_WORD_63_56 0xff00000000000000ULL 315 #define PIP_RAW_WORD_WORD 0x00ffffffffffffffULL 316 317 /* 318 * PIP_QOS_VLAN 319 */ 320 #define PIP_QOS_VLAN_63_3 0xfffffffffffffff8ULL 321 #define PIP_QOS_VLAN_QOS 0x0000000000000007ULL 322 323 /* 324 * PIP_QOS_WATCHN 325 */ 326 #define PIP_QOS_WATCHN_63_48 0xffff000000000000ULL 327 #define PIP_QOS_WATCHN_MASK 0x0000ffff00000000ULL 328 #define PIP_QOS_WATCHN_31_28 0x00000000f0000000ULL 329 #define PIP_QOS_WATCHN_GRP 0x000000000f000000ULL 330 #define PIP_QOS_WATCHN_23 0x0000000000800000ULL 331 #define PIP_QOS_WATCHN_WATCHER 0x0000000000700000ULL 332 #define PIP_QOS_WATCHN_19_18 0x00000000000c0000ULL 333 #define PIP_QOS_WATCHN_TYPE 0x0000000000030000ULL 334 #define PIP_QOS_WATCHN_15_0 0x000000000000ffffULL 335 336 /* 337 * PIP_PRT_CFGN 338 */ 339 #define PIP_PRT_CFGN_63_37 0xffffffe000000000ULL 340 #define PIP_PRT_CFGN_RAWDRP 0x0000001000000000ULL 341 #define PIP_PRT_CFGN_TAG_INC 0x0000000c00000000ULL 342 #define PIP_PRT_CFGN_DYN_RS 0x0000000200000000ULL 343 #define PIP_PRT_CFGN_INST_HDR 0x0000000100000000ULL 344 #define PIP_PRT_CFGN_GRP_WAT 0x00000000f0000000ULL 345 #define PIP_PRT_CFGN_27 0x0000000008000000ULL 346 #define PIP_PRT_CFGN_QOS 0x0000000007000000ULL 347 #define PIP_PRT_CFGN_QOS_WAT 0x0000000000f00000ULL 348 #define PIP_PRT_CFGN_19 0x0000000000080000ULL 349 #define PIP_PRT_CFGN_SPARE 0x0000000000040000ULL 350 #define PIP_PRT_CFGN_QOS_DIFF 0x0000000000020000ULL 351 #define PIP_PRT_CFGN_QOS_VLAN 0x0000000000010000ULL 352 #define PIP_PRT_CFGN_15_13 0x000000000000e000ULL 353 #define PIP_PRT_CFGN_CRC_EN 0x0000000000001000ULL 354 #define PIP_PRT_CFGN_11_10 0x0000000000000c00ULL 355 #define PIP_PRT_CFGN_MODE 0x0000000000000300ULL 356 #define PIP_PRT_CFGN_MODE_SHIFT 8 357 #define PIP_PORT_CFG_MODE_NONE (0ULL << PIP_PRT_CFGN_MODE_SHIFT) 358 #define PIP_PORT_CFG_MODE_L2 (1ULL << PIP_PRT_CFGN_MODE_SHIFT) 359 #define PIP_PORT_CFG_MODE_IP (2ULL << PIP_PRT_CFGN_MODE_SHIFT) 360 #define PIP_PORT_CFG_MODE_PCI (3ULL << PIP_PRT_CFGN_MODE_SHIFT) 361 #define PIP_PRT_CFGN_7 0x0000000000000080ULL 362 #define PIP_PRT_CFGN_SKIP 0x000000000000007fULL 363 364 /* 365 * PIP_PRT_TAGN 366 */ 367 #define PIP_PRT_TAGN_63_40 0xffffff0000000000ULL 368 #define PIP_PRT_TAGN_GRPTAGBASE 0x000000f000000000ULL 369 #define PIP_PRT_TAGN_GRPTAGMASK 0x0000000f00000000ULL 370 #define PIP_PRT_TAGN_GRPTAG 0x0000000080000000ULL 371 #define PIP_PRT_TAGN_SPARE 0x0000000040000000ULL 372 #define PIP_PRT_TAGN_TAG_MODE 0x0000000030000000ULL 373 #define PIP_PRT_TAGN_INC_VS 0x000000000c000000ULL 374 #define PIP_PRT_TAGN_INC_VLAN 0x0000000002000000ULL 375 #define PIP_PRT_TAGN_INC_PRT 0x0000000001000000ULL 376 #define PIP_PRT_TAGN_IP6_DPRT 0x0000000000800000ULL 377 #define PIP_PRT_TAGN_IP4_DPRT 0x0000000000400000ULL 378 #define PIP_PRT_TAGN_IP6_SPRT 0x0000000000200000ULL 379 #define PIP_PRT_TAGN_IP4_SPRT 0x0000000000100000ULL 380 #define PIP_PRT_TAGN_IP6_NXTH 0x0000000000080000ULL 381 #define PIP_PRT_TAGN_IP4_PCTL 0x0000000000040000ULL 382 #define PIP_PRT_TAGN_IP6_DST 0x0000000000020000ULL 383 #define PIP_PRT_TAGN_IP4_SRC 0x0000000000010000ULL 384 #define PIP_PRT_TAGN_IP6_SRC 0x0000000000008000ULL 385 #define PIP_PRT_TAGN_IP4_DST 0x0000000000004000ULL 386 #define PIP_PRT_TAGN_TCP6_TAG 0x0000000000003000ULL 387 #define PIP_PRT_TAGN_TCP6_TAG 0x0000000000003000ULL 388 #define PIP_PRT_TAGN_TCP6_TAG_SHIFT 12 389 #define PIP_PRT_TAGN_TCP6_TAG_ORDERED (0ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 390 #define PIP_PRT_TAGN_TCP6_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 391 #define PIP_PRT_TAGN_TCP6_TAG_NULL (2ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 392 #define PIP_PRT_TAGN_TCP6_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_TCP6_TAG_SHIFT) 393 #define PIP_PRT_TAGN_TCP4_TAG 0x0000000000000c00ULL 394 #define PIP_PRT_TAGN_TCP4_TAG_SHIFT 10 395 #define PIP_PRT_TAGN_TCP4_TAG_ORDERED (0ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 396 #define PIP_PRT_TAGN_TCP4_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 397 #define PIP_PRT_TAGN_TCP4_TAG_NULL (2ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 398 #define PIP_PRT_TAGN_TCP4_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_TCP4_TAG_SHIFT) 399 #define PIP_PRT_TAGN_IP6_TAG 0x0000000000000300ULL 400 #define PIP_PRT_TAGN_IP6_TAG_SHIFT 8 401 #define PIP_PRT_TAGN_IP6_TAG_ORDERED (0ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 402 #define PIP_PRT_TAGN_IP6_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 403 #define PIP_PRT_TAGN_IP6_TAG_NULL (2ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 404 #define PIP_PRT_TAGN_IP6_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_IP6_TAG_SHIFT) 405 #define PIP_PRT_TAGN_IP4_TAG 0x00000000000000c0ULL 406 #define PIP_PRT_TAGN_IP4_TAG_SHIFT 6 407 #define PIP_PRT_TAGN_IP4_TAG_ORDERED (0ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 408 #define PIP_PRT_TAGN_IP4_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 409 #define PIP_PRT_TAGN_IP4_TAG_NULL (2ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 410 #define PIP_PRT_TAGN_IP4_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_IP4_TAG_SHIFT) 411 #define PIP_PRT_TAGN_NON_TAG 0x0000000000000030ULL 412 #define PIP_PRT_TAGN_NON_TAG_SHIFT 4 413 #define PIP_PRT_TAGN_NON_TAG_ORDERED (0ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 414 #define PIP_PRT_TAGN_NON_TAG_ATOMIC (1ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 415 #define PIP_PRT_TAGN_NON_TAG_NULL (2ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 416 #define PIP_PRT_TAGN_NON_TAG_XXX_3 (3ULL << PIP_PRT_TAGN_NON_TAG_SHIFT) 417 #define PIP_PRT_TAGN_GRP 0x000000000000000fULL 418 419 /* 420 * PIP_QOS_DIFFN 421 */ 422 #define PIP_QOS_DIFF_63_3 0xfffffffffffffff8ULL 423 #define PIP_QOS_DIFF_QOS 0x0000000000000007ULL 424 425 /* 426 * PIP_TAG_INCN 427 */ 428 #define PIP_TAG_INCN_63_8 0xffffffffffffff00ULL 429 #define PIP_TAG_INCN_EN 0x00000000000000ffULL 430 431 /* 432 * PIP_STAT0_PRTN 433 */ 434 #define PIP_STAT0_PRTN_DRP_PKTS 0xffffffff00000000ULL 435 #define PIP_STAT0_PRTN_DRP_OCTS 0x00000000ffffffffULL 436 437 /* 438 * PIP_STAT1_PRTN 439 */ 440 #define PIP_STAT1_PRTN_63_48 0xffff000000000000ULL 441 #define PIP_STAT1_PRTN_OCTS 0x0000ffffffffffffULL 442 443 /* 444 * PIP_STAT2_PRTN 445 */ 446 #define PIP_STAT2_PRTN_PKTS 0xffffffff00000000ULL 447 #define PIP_STAT2_PRTN_RAW 0x00000000ffffffffULL 448 449 /* 450 * PIP_STAT3_PRTN 451 */ 452 #define PIP_STAT3_PRTN_BCST 0xffffffff00000000ULL 453 #define PIP_STAT3_PRTN_MCST 0x00000000ffffffffULL 454 455 /* 456 * PIP_STAT4_PRTN 457 */ 458 #define PIP_STAT4_PRTN_H65TO127 0xffffffff00000000ULL 459 #define PIP_STAT4_PRTN_H64 0x00000000ffffffffULL 460 461 /* 462 * PIP_STAT5_PRTN 463 */ 464 #define PIP_STAT5_PRTN_H256TO511 0xffffffff00000000ULL 465 #define PIP_STAT5_PRTN_H128TO255 0x00000000ffffffffULL 466 467 /* 468 * PIP_STAT6_PRTN 469 */ 470 #define PIP_STAT6_PRTN_H1024TO1518 0xffffffff00000000ULL 471 #define PIP_STAT6_PRTN_H512TO1023 0x00000000ffffffffULL 472 473 /* 474 * PIP_STAT7_PRTN 475 */ 476 #define PIP_STAT7_PRTN_FCS 0xffffffff00000000ULL 477 #define PIP_STAT7_PRTN_H1519 0x00000000ffffffffULL 478 479 /* 480 * PIP_STAT8_PRTN 481 */ 482 #define PIP_STAT8_PRTN_FRAG 0xffffffff00000000ULL 483 #define PIP_STAT8_PRTN_UNDERSZ 0x00000000ffffffffULL 484 485 /* 486 * PIP_STAT9_PRTN 487 */ 488 #define PIP_STAT9_PRTN_JABBER 0xffffffff00000000ULL 489 #define PIP_STAT9_PRTN_OVERSZ 0x00000000ffffffffULL 490 491 /* 492 * PIP_STAT_INB_PKTN 493 */ 494 #define PIP_STAT_INB_PKTSN 0xffffffff00000000ULL 495 #define PIP_STAT_INB_PKTSN_PKTS 0x00000000ffffffffULL 496 497 /* 498 * PIP_STAT_INB_OCTSN 499 */ 500 #define PIP_STAT_INB_OCTSN 0xffff000000000000ULL 501 #define PIP_STAT_INB_OCTSN_OCTS 0x0000ffffffffffffULL 502 503 /* 504 * PIP_STAT_INB_ERRS 505 */ 506 #define PIP_STAT_INB_ERRSN 0xffffffffffff0000ULL 507 #define PIP_STAT_INB_ERRSN_OCTS 0x000000000000ffffULL 508 509 /* 510 * Work-Queue Entry Format 511 */ 512 /* WORD0 */ 513 #define PIP_WQE_WORD0_HW_CSUM 0xffff000000000000ULL 514 #define PIP_WQE_WORD0_47_40 0x0000ff0000000000ULL 515 #define PIP_WQE_WORD0_POW_NEXT_PTR 0x000000ffffffffffULL 516 517 /* WORD 1 */ 518 #define PIP_WQE_WORD1_LEN 0xffff000000000000ULL 519 #define PIP_WQE_WORD1_IPRT 0x0000fc0000000000ULL 520 #define PIP_WQE_WORD1_QOS 0x0000038000000000ULL 521 #define PIP_WQE_WORD1_GRP 0x0000007800000000ULL 522 #define PIP_WQE_WORD1_TT 0x0000000700000000ULL 523 #define PIP_WQE_WORD1_TAG 0x00000000ffffffffULL 524 525 /* WORD 2 */ 526 #define PIP_WQE_WORD2_RAWFULL_BUFS 0xff00000000000000ULL 527 #define PIP_WQE_WORD2_RAWFULL_PIP_RAW_WORD 0x00ffffffffffffffULL 528 529 #define PIP_WQE_WORD2_IP_BUFS 0xff00000000000000ULL 530 #define PIP_WQE_WORD2_IP_OFFSET 0x00ff000000000000ULL 531 #define PIP_WQE_WORD2_IP_OFFSET_SHIFT 48 532 #define PIP_WQE_WORD2_IP_VV 0x0000800000000000ULL 533 #define PIP_WQE_WORD2_IP_VS 0x0000400000000000ULL 534 #define PIP_WQE_WORD2_IP_45 0x0000200000000000ULL 535 #define PIP_WQE_WORD2_IP_VC 0x0000100000000000ULL 536 #define PIP_WQE_WORD2_IP_VLAN_ID 0x00000fff00000000ULL 537 #define PIP_WQE_WORD2_IP_31_20 0x00000000fff00000ULL 538 #define PIP_WQE_WORD2_IP_CO 0x0000000000080000ULL 539 #define PIP_WQE_WORD2_IP_TU 0x0000000000040000ULL 540 #define PIP_WQE_WORD2_IP_SE 0x0000000000020000ULL 541 #define PIP_WQE_WORD2_IP_V6 0x0000000000010000ULL 542 #define PIP_WQE_WORD2_IP_15 0x0000000000008000ULL 543 #define PIP_WQE_WORD2_IP_LE 0x0000000000004000ULL 544 #define PIP_WQE_WORD2_IP_FR 0x0000000000002000ULL 545 #define PIP_WQE_WORD2_IP_IE 0x0000000000001000ULL 546 #define PIP_WQE_WORD2_IP_B 0x0000000000000800ULL 547 #define PIP_WQE_WORD2_IP_M 0x0000000000000400ULL 548 #define PIP_WQE_WORD2_IP_NI 0x0000000000000200ULL 549 #define PIP_WQE_WORD2_IP_RE 0x0000000000000100ULL 550 #define PIP_WQE_WORD2_IP_OPECODE 0x00000000000000ffULL 551 552 #define PIP_WQE_WORD2_NOIP_BUFS 0xff00000000000000ULL 553 #define PIP_WQE_WORD2_NOIP_55_48 0x00ff000000000000ULL 554 #define PIP_WQE_WORD2_NOIP_VV 0x0000800000000000ULL 555 #define PIP_WQE_WORD2_NOIP_VS 0x0000400000000000ULL 556 #define PIP_WQE_WORD2_NOIP_45 0x0000200000000000ULL 557 #define PIP_WQE_WORD2_NOIP_VC 0x0000100000000000ULL 558 #define PIP_WQE_WORD2_NOIP_VLAN_ID 0x00000fff00000000ULL 559 #define PIP_WQE_WORD2_NOIP_31_14 0x00000000ffffc000ULL 560 #define PIP_WQE_WORD2_NOIP_IR 0x0000000000002000ULL 561 #define PIP_WQE_WORD2_NOIP_IA 0x0000000000001000ULL 562 #define PIP_WQE_WORD2_NOIP_B 0x0000000000000800ULL 563 #define PIP_WQE_WORD2_NOIP_M 0x0000000000000400ULL 564 #define PIP_WQE_WORD2_NOIP_NI 0x0000000000000200ULL 565 #define PIP_WQE_WORD2_NOIP_RE 0x0000000000000100ULL 566 #define PIP_WQE_WORD2_NOIP_OPECODE 0x00000000000000ffULL 567 568 /* WORD 3 */ 569 #define PIP_WQE_WORD3_63 0x8000000000000000ULL 570 #define PIP_WQE_WORD3_BACK 0x7800000000000000ULL 571 #define PIP_WQE_WORD3_58_56 0x0700000000000000ULL 572 #define PIP_WQE_WORD3_SIZE 0x00ffff0000000000ULL 573 #define PIP_WQE_WORD3_ADDR 0x000000ffffffffffULL 574 575 /* opcode for WORD2[LE] */ 576 #define PIP_WQE_WORD2_LE_OPCODE_MAL 1ULL 577 #define PIP_WQE_WORD2_LE_OPCODE_CSUM 2ULL 578 #define PIP_WQE_WORD2_LE_OPCODE_UDPLEN 3ULL 579 #define PIP_WQE_WORD2_LE_OPCODE_PORT 4ULL 580 #define PIP_WQE_WORD2_LE_OPCODE_XXX_5 5ULL 581 #define PIP_WQE_WORD2_LE_OPCODE_XXX_6 6ULL 582 #define PIP_WQE_WORD2_LE_OPCODE_XXX_7 7ULL 583 #define PIP_WQE_WORD2_LE_OPCODE_FINO 8ULL 584 #define PIP_WQE_WORD2_LE_OPCODE_NOFL 9ULL 585 #define PIP_WQE_WORD2_LE_OPCODE_FINRST 10ULL 586 #define PIP_WQE_WORD2_LE_OPCODE_SYNURG 11ULL 587 #define PIP_WQE_WORD2_LE_OPCODE_SYNRST 12ULL 588 #define PIP_WQE_WORD2_LE_OPCODE_SYNFIN 13ULL 589 590 /* opcode for WORD2[IE] */ 591 #define PIP_WQE_WORD2_IE_OPCODE_NOTIP 1ULL 592 #define PIP_WQE_WORD2_IE_OPCODE_CSUM 2ULL 593 #define PIP_WQE_WORD2_IE_OPCODE_MALHDR 3ULL 594 #define PIP_WQE_WORD2_IE_OPCODE_MAL 4ULL 595 #define PIP_WQE_WORD2_IE_OPCODE_TTL 5ULL 596 #define PIP_WQE_WORD2_IE_OPCODE_OPT 6ULL 597 598 /* opcode for WORD2[RE] */ 599 #define PIP_WQE_WORD2_RE_OPCODE_PARTIAL 1ULL 600 #define PIP_WQE_WORD2_RE_OPCODE_JABBER 2ULL 601 #define PIP_WQE_WORD2_RE_OPCODE_OVRRUN 3ULL 602 #define PIP_WQE_WORD2_RE_OPCODE_OVRSZ 4ULL 603 #define PIP_WQE_WORD2_RE_OPCODE_ALIGN 5ULL 604 #define PIP_WQE_WORD2_RE_OPCODE_FRAG 6ULL 605 #define PIP_WQE_WORD2_RE_OPCODE_GMXFCS 7ULL 606 #define PIP_WQE_WORD2_RE_OPCODE_UDRSZ 8ULL 607 #define PIP_WQE_WORD2_RE_OPCODE_EXTEND 9ULL 608 #define PIP_WQE_WORD2_RE_OPCODE_LENGTH 10ULL 609 #define PIP_WQE_WORD2_RE_OPCODE_MIIRX 11ULL 610 #define PIP_WQE_WORD2_RE_OPCODE_MIISKIP 12ULL 611 #define PIP_WQE_WORD2_RE_OPCODE_MIINBL 13ULL 612 #define PIP_WQE_WORD2_RE_OPCODE_XXX_14 14ULL 613 #define PIP_WQE_WORD2_RE_OPCODE_XXX_15 15ULL 614 #define PIP_WQE_WORD2_RE_OPCODE_XXX_16 16ULL 615 #define PIP_WQE_WORD2_RE_OPCODE_SKIP 17ULL 616 #define PIP_WQE_WORD2_RE_OPCODE_L2MAL 18ULL 617 618 /* XXX backward compatibility */ 619 #define PIP_OVER_ERR PIP_WQE_WORD2_RE_OPCODE_OVRRUN 620 #define PIP_GMX_FCS_ERR PIP_WQE_WORD2_RE_OPCODE_GMXFCS 621 #define PIP_ALIGN_ERR PIP_WQE_WORD2_RE_OPCODE_ALIGN 622 623 #define PIP_BIST_STATUS_BITS \ 624 "\177" /* new format */ \ 625 "\177" /* seil ext */ \ 626 "\020" /* hex display */ \ 627 "\020" /* %016x format */ \ 628 "f\x12\x2e" "63_13\0" \ 629 "f\x00\x12" "BIST\0" 630 #define PIP_INT_REG_BITS \ 631 "\177" /* new format */ \ 632 "\177" /* seil ext */ \ 633 "\020" /* hex display */ \ 634 "\020" /* %016x format */ \ 635 "f\x09\x37" "63_9\0" \ 636 "b\x08" "BEPERR\0" \ 637 "b\x07" "FEPERR\0" \ 638 "b\x06" "6\0" \ 639 "b\x05" "SKPRUNT\0" \ 640 "b\x04" "BADTAG\0" \ 641 "b\x03" "PRTNXA\0" \ 642 "f\x01\x02" "2_1\0" \ 643 "b\x00" "PKTDRP\0" 644 #define PIP_INT_EN_BITS \ 645 "\177" /* new format */ \ 646 "\177" /* seil ext */ \ 647 "\020" /* hex display */ \ 648 "\020" /* %016x format */ \ 649 "f\x09\x37" "63_9\0" \ 650 "b\x08" "BEPERR\0" \ 651 "b\x07" "FEPERR\0" \ 652 "b\x06" "6\0" \ 653 "b\x05" "SKPRUNT\0" \ 654 "b\x04" "BADTAG\0" \ 655 "b\x03" "PRTNXA\0" \ 656 "f\x01\x02" "2_1\0" \ 657 "b\x00" "PKTDRP\0" 658 #define PIP_STAT_CTL_BITS \ 659 "\177" /* new format */ \ 660 "\177" /* seil ext */ \ 661 "\020" /* hex display */ \ 662 "\020" /* %016x format */ \ 663 "f\x01\x3f" "63_1\0" \ 664 "b\x00" "RDCLR\0" 665 #define PIP_GBL_CTL_BITS \ 666 "\177" /* new format */ \ 667 "\177" /* seil ext */ \ 668 "\020" /* hex display */ \ 669 "\020" /* %016x format */ \ 670 "f\x11\x2f" "63_17\0" \ 671 "b\x10" "IGNRS\0" \ 672 "b\x0f" "VS_WQE\0" \ 673 "b\x0e" "VS_QOS\0" \ 674 "b\x0d" "L2MAL\0" \ 675 "b\x0c" "TCP_FLAG\0" \ 676 "b\x0b" "L4_LEN\0" \ 677 "b\x0a" "L4_CHK\0" \ 678 "b\x09" "L4_PRT\0" \ 679 "b\x08" "L4_MAL\0" \ 680 "f\x06\x02" "7_6\0" \ 681 "f\x04\x02" "IP6_EEXT\0" \ 682 "b\x03" "IP4_OPTS\0" \ 683 "b\x02" "IP_HOP\0" \ 684 "b\x01" "IP_MAL\0" \ 685 "b\x00" "IP_CHK\0" 686 #define PIP_GBL_CFG_BITS \ 687 "\177" /* new format */ \ 688 "\177" /* seil ext */ \ 689 "\020" /* hex display */ \ 690 "\020" /* %016x format */ \ 691 "f\x13\x2d" "63_19\0" \ 692 "b\x12" "TAG_SYN\0" \ 693 "b\x11" "IP6_UDP\0" \ 694 "b\x10" "MAX_L2\0" \ 695 "f\x0b\x05" "15_11\0" \ 696 "f\x08\x03" "RAW_SHF\0" \ 697 "f\x03\x05" "7_3\0" \ 698 "f\x00\x03" "NIP_SHF\0" 699 #define PIP_SOFT_RST_BITS \ 700 "\177" /* new format */ \ 701 "\177" /* seil ext */ \ 702 "\020" /* hex display */ \ 703 "\020" /* %016x format */ \ 704 705 #define PIP_IP_OFFSET_BITS \ 706 "\177" /* new format */ \ 707 "\177" /* seil ext */ \ 708 "\020" /* hex display */ \ 709 "\020" /* %016x format */ \ 710 "f\x03\x3d" "63_3\0" \ 711 "f\x00\x03" "MASK_OFFSET\0" 712 #define PIP_TAG_SECRET_BITS \ 713 "\177" /* new format */ \ 714 "\177" /* seil ext */ \ 715 "\020" /* hex display */ \ 716 "\020" /* %016x format */ \ 717 "f\x20\x20" "63_3\0" \ 718 "f\x10\x10" "DST\0" \ 719 "f\x00\x10" "SRC\0" 720 #define PIP_TAG_MASK_BITS \ 721 "\177" /* new format */ \ 722 "\177" /* seil ext */ \ 723 "\020" /* hex display */ \ 724 "\020" /* %016x format */ \ 725 "f\x10\x30" "63_16\0" \ 726 "f\x00\x10" "MASK\0" 727 #define PIP_DEC_IPSECN_BITS \ 728 "\177" /* new format */ \ 729 "\177" /* seil ext */ \ 730 "\020" /* hex display */ \ 731 "\020" /* %016x format */ \ 732 "f\x12\x2e" "63_18\0" \ 733 "b\x11" "TCP\0" \ 734 "b\x10" "UDP\0" \ 735 "f\x00\x10" "DPRT\0" 736 #define PIP_DEC_IPSEC0_BITS PIP_DEC_IPSECN_BITS 737 #define PIP_DEC_IPSEC1_BITS PIP_DEC_IPSECN_BITS 738 #define PIP_DEC_IPSEC2_BITS PIP_DEC_IPSECN_BITS 739 #define PIP_DEC_IPSEC3_BITS PIP_DEC_IPSECN_BITS 740 #define PIP_RAW_WORD_BITS \ 741 "\177" /* new format */ \ 742 "\177" /* seil ext */ \ 743 "\020" /* hex display */ \ 744 "\020" /* %016x format */ \ 745 "f\x38\x08" "63_56\0" \ 746 "f\x00\x38" "WORD\0" 747 #define PIP_QOS_VLANN_BITS \ 748 "\177" /* new format */ \ 749 "\177" /* seil ext */ \ 750 "\020" /* hex display */ \ 751 "\020" /* %016x format */ \ 752 753 #define PIP_QOS_VLAN0_BITS PIP_QOS_VLANN_BITS 754 #define PIP_QOS_VLAN1_BITS PIP_QOS_VLANN_BITS 755 #define PIP_QOS_VLAN2_BITS PIP_QOS_VLANN_BITS 756 #define PIP_QOS_VLAN3_BITS PIP_QOS_VLANN_BITS 757 #define PIP_QOS_VLAN4_BITS PIP_QOS_VLANN_BITS 758 #define PIP_QOS_VLAN5_BITS PIP_QOS_VLANN_BITS 759 #define PIP_QOS_VLAN6_BITS PIP_QOS_VLANN_BITS 760 #define PIP_QOS_VLAN7_BITS PIP_QOS_VLANN_BITS 761 #define PIP_QOS_WATCHN_BITS \ 762 "\177" /* new format */ \ 763 "\177" /* seil ext */ \ 764 "\020" /* hex display */ \ 765 "\020" /* %016x format */ \ 766 "f\x30\x10" "63_48\0" \ 767 "f\x20\x10" "MASK\0" \ 768 "f\x1c\x04" "31_28\0" \ 769 "f\x18\x04" "GRP\0" \ 770 "b\x17" "23\0" \ 771 "f\x14\x03" "WATCHER\0" \ 772 "f\x12\x02" "19_18\0" \ 773 "f\x10\x02" "TYPE\0" \ 774 "f\x00\x10" "15_0\0" 775 #define PIP_QOS_WATCH0_BITS PIP_QOS_WATCHN_BITS 776 #define PIP_QOS_WATCH1_BITS PIP_QOS_WATCHN_BITS 777 #define PIP_QOS_WATCH2_BITS PIP_QOS_WATCHN_BITS 778 #define PIP_QOS_WATCH3_BITS PIP_QOS_WATCHN_BITS 779 #define PIP_PRT_CFGN_BITS \ 780 "\177" /* new format */ \ 781 "\177" /* seil ext */ \ 782 "\020" /* hex display */ \ 783 "\020" /* %016x format */ \ 784 "f\x25\x1b" "63_37\0" \ 785 "b\x24" "RAWDRP\0" \ 786 "f\x22\x02" "TAG_INC\0" \ 787 "b\x21" "DYN_RS\0" \ 788 "b\x20" "INST_HDR\0" \ 789 "f\x1c\x04" "GRP_WAT\0" \ 790 "b\x1b" "27\0" \ 791 "f\x18\x03" "QOS\0" \ 792 "f\x14\x04" "QOS_WAT\0" \ 793 "b\x13" "19\0" \ 794 "b\x12" "SPARE\0" \ 795 "b\x11" "QOS_DIFF\0" \ 796 "b\x10" "QOS_VLAN\0" \ 797 "f\x0d\x03" "15_13\0" \ 798 "b\x0c" "CRC_EN\0" \ 799 "f\x0a\x02" "11_10\0" \ 800 "f\x08\x02" "MODE\0" \ 801 "b\x07" "7\0" \ 802 "f\x00\x07" "SKIP\0" 803 #define PIP_PRT_CFG0_BITS PIP_PRT_CFGN_BITS 804 #define PIP_PRT_CFG1_BITS PIP_PRT_CFGN_BITS 805 #define PIP_PRT_CFG2_BITS PIP_PRT_CFGN_BITS 806 #define PIP_PRT_CFG32_BITS PIP_PRT_CFGN_BITS 807 #define PIP_PRT_TAGN_BITS \ 808 "\177" /* new format */ \ 809 "\177" /* seil ext */ \ 810 "\020" /* hex display */ \ 811 "\020" /* %016x format */ \ 812 "f\x28\x18" "63_40\0" \ 813 "f\x24\x04" "GRPTAGBASE\0" \ 814 "f\x20\x04" "GRPTAGMASK\0" \ 815 "b\x1f" "GRPTAG\0" \ 816 "b\x1e" "SPARE\0" \ 817 "f\x1c\x02" "TAG_MODE\0" \ 818 "f\x1a\x02" "INC_VS\0" \ 819 "b\x19" "INC_VLAN\0" \ 820 "b\x18" "INC_PRT\0" \ 821 "b\x17" "IP6_DPRT\0" \ 822 "b\x16" "IP4_DPRT\0" \ 823 "b\x15" "IP6_SPRT\0" \ 824 "b\x14" "IP4_SPRT\0" \ 825 "b\x13" "IP6_NXTH\0" \ 826 "b\x12" "IP4_PCTL\0" \ 827 "b\x11" "IP6_DST\0" \ 828 "b\x10" "IP4_SRC\0" \ 829 "b\x0f" "IP6_SRC\0" \ 830 "b\x0e" "IP4_DST\0" \ 831 "f\x0c\x02" "TCP6_TAG\0" \ 832 "f\x0a\x02" "TCP4_TAG\0" \ 833 "f\x08\x02" "IP6_TAG\0" \ 834 "f\x06\x02" "IP4_TAG\0" \ 835 "f\x04\x02" "NON_TAG\0" \ 836 "f\x00\x04" "GRP\0" 837 #define PIP_PRT_TAG0_BITS PIP_PRT_TAGN_BITS 838 #define PIP_PRT_TAG1_BITS PIP_PRT_TAGN_BITS 839 #define PIP_PRT_TAG2_BITS PIP_PRT_TAGN_BITS 840 #define PIP_PRT_TAG32_BITS PIP_PRT_TAGN_BITS 841 /* PIP_QOS_DIFF[0-63] */ 842 #define PIP_STAT0_PRTN_BITS \ 843 "\177" /* new format */ \ 844 "\177" /* seil ext */ \ 845 "\020" /* hex display */ \ 846 "\020" /* %016x format */ \ 847 "f\x20\x20" "DRP_PKTS\0" \ 848 "f\x00\x20" "DRP_OCTS\0" 849 #define PIP_STAT0_PRT0_BITS PIP_STAT0_PRTN_BITS 850 #define PIP_STAT0_PRT1_BITS PIP_STAT0_PRTN_BITS 851 #define PIP_STAT0_PRT2_BITS PIP_STAT0_PRTN_BITS 852 #define PIP_STAT0_PRT32_BITS PIP_STAT0_PRTN_BITS 853 #define PIP_STAT1_PRTN_BITS \ 854 "\177" /* new format */ \ 855 "\177" /* seil ext */ \ 856 "\020" /* hex display */ \ 857 "\020" /* %016x format */ \ 858 "f\x30\x10" "63_48\0" \ 859 "f\x00\x30" "OCTS\0" 860 #define PIP_STAT1_PRT0_BITS PIP_STAT1_PRTN_BITS 861 #define PIP_STAT1_PRT1_BITS PIP_STAT1_PRTN_BITS 862 #define PIP_STAT1_PRT2_BITS PIP_STAT1_PRTN_BITS 863 #define PIP_STAT1_PRT32_BITS PIP_STAT1_PRTN_BITS 864 #define PIP_STAT2_PRTN_BITS \ 865 "\177" /* new format */ \ 866 "\177" /* seil ext */ \ 867 "\020" /* hex display */ \ 868 "\020" /* %016x format */ \ 869 "f\x20\x20" "PKTS\0" \ 870 "f\x00\x20" "RAW\0" 871 #define PIP_STAT2_PRT0_BITS PIP_STAT2_PRTN_BITS 872 #define PIP_STAT2_PRT1_BITS PIP_STAT2_PRTN_BITS 873 #define PIP_STAT2_PRT2_BITS PIP_STAT2_PRTN_BITS 874 #define PIP_STAT2_PRT32_BITS PIP_STAT2_PRTN_BITS 875 #define PIP_STAT3_PRTN_BITS \ 876 "\177" /* new format */ \ 877 "\177" /* seil ext */ \ 878 "\020" /* hex display */ \ 879 "\020" /* %016x format */ \ 880 "f\x20\x20" "BCST\0" \ 881 "f\x00\x20" "MCST\0" 882 #define PIP_STAT3_PRT0_BITS PIP_STAT3_PRTN_BITS 883 #define PIP_STAT3_PRT1_BITS PIP_STAT3_PRTN_BITS 884 #define PIP_STAT3_PRT2_BITS PIP_STAT3_PRTN_BITS 885 #define PIP_STAT3_PRT32_BITS PIP_STAT3_PRTN_BITS 886 #define PIP_STAT4_PRTN_BITS \ 887 "\177" /* new format */ \ 888 "\177" /* seil ext */ \ 889 "\020" /* hex display */ \ 890 "\020" /* %016x format */ \ 891 "f\x20\x20" "H65TO127\0" \ 892 "f\x00\x20" "H64\0" 893 #define PIP_STAT4_PRT0_BITS PIP_STAT4_PRTN_BITS 894 #define PIP_STAT4_PRT1_BITS PIP_STAT4_PRTN_BITS 895 #define PIP_STAT4_PRT2_BITS PIP_STAT4_PRTN_BITS 896 #define PIP_STAT4_PRT32_BITS PIP_STAT4_PRTN_BITS 897 #define PIP_STAT5_PRTN_BITS \ 898 "\177" /* new format */ \ 899 "\177" /* seil ext */ \ 900 "\020" /* hex display */ \ 901 "\020" /* %016x format */ \ 902 "f\x20\x20" "H256TO511\0" \ 903 "f\x00\x20" "H128TO255\0" 904 #define PIP_STAT5_PRT0_BITS PIP_STAT5_PRTN_BITS 905 #define PIP_STAT5_PRT1_BITS PIP_STAT5_PRTN_BITS 906 #define PIP_STAT5_PRT2_BITS PIP_STAT5_PRTN_BITS 907 #define PIP_STAT5_PRT32_BITS PIP_STAT5_PRTN_BITS 908 #define PIP_STAT6_PRTN_BITS \ 909 "\177" /* new format */ \ 910 "\177" /* seil ext */ \ 911 "\020" /* hex display */ \ 912 "\020" /* %016x format */ \ 913 "f\x20\x20" "H1024TO1518\0" \ 914 "f\x00\x20" "H512TO1023\0" 915 #define PIP_STAT6_PRT0_BITS PIP_STAT6_PRTN_BITS 916 #define PIP_STAT6_PRT1_BITS PIP_STAT6_PRTN_BITS 917 #define PIP_STAT6_PRT2_BITS PIP_STAT6_PRTN_BITS 918 #define PIP_STAT6_PRT32_BITS PIP_STAT6_PRTN_BITS 919 #define PIP_STAT7_PRTN_BITS \ 920 "\177" /* new format */ \ 921 "\177" /* seil ext */ \ 922 "\020" /* hex display */ \ 923 "\020" /* %016x format */ \ 924 "f\x20\x20" "FCS\0" \ 925 "f\x00\x20" "H1519\0" 926 #define PIP_STAT7_PRT0_BITS PIP_STAT7_PRTN_BITS 927 #define PIP_STAT7_PRT1_BITS PIP_STAT7_PRTN_BITS 928 #define PIP_STAT7_PRT2_BITS PIP_STAT7_PRTN_BITS 929 #define PIP_STAT7_PRT32_BITS PIP_STAT7_PRTN_BITS 930 #define PIP_STAT8_PRTN_BITS \ 931 "\177" /* new format */ \ 932 "\177" /* seil ext */ \ 933 "\020" /* hex display */ \ 934 "\020" /* %016x format */ \ 935 "f\x20\x20" "FRAG\0" \ 936 "f\x00\x20" "UNDERSZ\0" 937 #define PIP_STAT8_PRT0_BITS PIP_STAT8_PRTN_BITS 938 #define PIP_STAT8_PRT1_BITS PIP_STAT8_PRTN_BITS 939 #define PIP_STAT8_PRT2_BITS PIP_STAT8_PRTN_BITS 940 #define PIP_STAT8_PRT32_BITS PIP_STAT8_PRTN_BITS 941 #define PIP_STAT9_PRTN_BITS \ 942 "\177" /* new format */ \ 943 "\177" /* seil ext */ \ 944 "\020" /* hex display */ \ 945 "\020" /* %016x format */ \ 946 "f\x20\x20" "JABBER\0" \ 947 "f\x00\x20" "OVERSZ\0" 948 #define PIP_STAT9_PRT0_BITS PIP_STAT9_PRTN_BITS 949 #define PIP_STAT9_PRT1_BITS PIP_STAT9_PRTN_BITS 950 #define PIP_STAT9_PRT2_BITS PIP_STAT9_PRTN_BITS 951 #define PIP_STAT9_PRT32_BITS PIP_STAT9_PRTN_BITS 952 /* PIP_TAG_INC[0-63] */ 953 #define PIP_STAT_INB_PKTSN_BITS \ 954 "\177" /* new format */ \ 955 "\177" /* seil ext */ \ 956 "\020" /* hex display */ \ 957 "\020" /* %016x format */ \ 958 "f\x20\x20" "PIP_STAT_INB_PKTSN\0" \ 959 "f\x00\x20" "PKTS\0" 960 #define PIP_STAT_INB_PKTS0_BITS PIP_STAT_INB_PKTSN_BITS 961 #define PIP_STAT_INB_PKTS1_BITS PIP_STAT_INB_PKTSN_BITS 962 #define PIP_STAT_INB_PKTS2_BITS PIP_STAT_INB_PKTSN_BITS 963 #define PIP_STAT_INB_PKTS32_BITS PIP_STAT_INB_PKTSN_BITS 964 #define PIP_STAT_INB_OCTSN_BITS \ 965 "\177" /* new format */ \ 966 "\177" /* seil ext */ \ 967 "\020" /* hex display */ \ 968 "\020" /* %016x format */ \ 969 "f\x30\x10" "PIP_STAT_INB_OCTSN\0" \ 970 "f\x00\x30" "OCTS\0" 971 #define PIP_STAT_INB_OCTS0_BITS PIP_STAT_INB_OCTSN_BITS 972 #define PIP_STAT_INB_OCTS1_BITS PIP_STAT_INB_OCTSN_BITS 973 #define PIP_STAT_INB_OCTS2_BITS PIP_STAT_INB_OCTSN_BITS 974 #define PIP_STAT_INB_OCTS32_BITS PIP_STAT_INB_OCTSN_BITS 975 #define PIP_STAT_INB_ERRSN_BITS \ 976 "\177" /* new format */ \ 977 "\177" /* seil ext */ \ 978 "\020" /* hex display */ \ 979 "\020" /* %016x format */ \ 980 "f\x10\x30" "PIP_STAT_INB_ERRSN\0" \ 981 "f\x00\x10" "OCTS\0" 982 #define PIP_STAT_INB_ERRS0_BITS PIP_STAT_INB_ERRSN_BITS 983 #define PIP_STAT_INB_ERRS1_BITS PIP_STAT_INB_ERRSN_BITS 984 #define PIP_STAT_INB_ERRS2_BITS PIP_STAT_INB_ERRSN_BITS 985 #define PIP_STAT_INB_ERRS32_BITS PIP_STAT_INB_ERRSN_BITS 986 987 #endif /* _CN30XXPIPREG_H_ */ 988