1 /* $OpenBSD: bus.h,v 1.4 2010/12/04 16:46:00 miod Exp $ */ 2 3 /* 4 * Copyright (c) 2003-2004 Opsycon AB Sweden. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _MACHINE_BUS_H_ 28 #define _MACHINE_BUS_H_ 29 30 #ifdef __STDC__ 31 #define CAT(a,b) a##b 32 #define CAT3(a,b,c) a##b##c 33 #else 34 #define CAT(a,b) a/**/b 35 #define CAT3(a,b,c) a/**/b/**/c 36 #endif 37 38 /* 39 * Bus access types. 40 */ 41 struct mips_bus_space; 42 typedef u_long bus_addr_t; 43 typedef u_long bus_size_t; 44 typedef u_long bus_space_handle_t; 45 typedef struct mips_bus_space *bus_space_tag_t; 46 typedef struct mips_bus_space bus_space_t; 47 48 struct mips_bus_space { 49 bus_addr_t bus_base; 50 void *bus_private; 51 u_int8_t (*_space_read_1)(bus_space_tag_t , bus_space_handle_t, 52 bus_size_t); 53 void (*_space_write_1)(bus_space_tag_t , bus_space_handle_t, 54 bus_size_t, u_int8_t); 55 u_int16_t (*_space_read_2)(bus_space_tag_t , bus_space_handle_t, 56 bus_size_t); 57 void (*_space_write_2)(bus_space_tag_t , bus_space_handle_t, 58 bus_size_t, u_int16_t); 59 u_int32_t (*_space_read_4)(bus_space_tag_t , bus_space_handle_t, 60 bus_size_t); 61 void (*_space_write_4)(bus_space_tag_t , bus_space_handle_t, 62 bus_size_t, u_int32_t); 63 u_int64_t (*_space_read_8)(bus_space_tag_t , bus_space_handle_t, 64 bus_size_t); 65 void (*_space_write_8)(bus_space_tag_t , bus_space_handle_t, 66 bus_size_t, u_int64_t); 67 void (*_space_read_raw_2)(bus_space_tag_t, bus_space_handle_t, 68 bus_addr_t, u_int8_t *, bus_size_t); 69 void (*_space_write_raw_2)(bus_space_tag_t, bus_space_handle_t, 70 bus_addr_t, const u_int8_t *, bus_size_t); 71 void (*_space_read_raw_4)(bus_space_tag_t, bus_space_handle_t, 72 bus_addr_t, u_int8_t *, bus_size_t); 73 void (*_space_write_raw_4)(bus_space_tag_t, bus_space_handle_t, 74 bus_addr_t, const u_int8_t *, bus_size_t); 75 void (*_space_read_raw_8)(bus_space_tag_t, bus_space_handle_t, 76 bus_addr_t, u_int8_t *, bus_size_t); 77 void (*_space_write_raw_8)(bus_space_tag_t, bus_space_handle_t, 78 bus_addr_t, const u_int8_t *, bus_size_t); 79 int (*_space_map)(bus_space_tag_t , bus_addr_t, 80 bus_size_t, int, bus_space_handle_t *); 81 void (*_space_unmap)(bus_space_tag_t, bus_space_handle_t, 82 bus_size_t); 83 int (*_space_subregion)(bus_space_tag_t, bus_space_handle_t, 84 bus_size_t, bus_size_t, bus_space_handle_t *); 85 void * (*_space_vaddr)(bus_space_tag_t, bus_space_handle_t); 86 }; 87 88 #define bus_space_read_1(t, h, o) (*(t)->_space_read_1)((t), (h), (o)) 89 #define bus_space_read_2(t, h, o) (*(t)->_space_read_2)((t), (h), (o)) 90 #define bus_space_read_4(t, h, o) (*(t)->_space_read_4)((t), (h), (o)) 91 #define bus_space_read_8(t, h, o) (*(t)->_space_read_8)((t), (h), (o)) 92 93 #define bus_space_write_1(t, h, o, v) (*(t)->_space_write_1)((t), (h), (o), (v)) 94 #define bus_space_write_2(t, h, o, v) (*(t)->_space_write_2)((t), (h), (o), (v)) 95 #define bus_space_write_4(t, h, o, v) (*(t)->_space_write_4)((t), (h), (o), (v)) 96 #define bus_space_write_8(t, h, o, v) (*(t)->_space_write_8)((t), (h), (o), (v)) 97 98 #define bus_space_read_raw_multi_2(t, h, a, b, l) \ 99 (*(t)->_space_read_raw_2)((t), (h), (a), (b), (l)) 100 #define bus_space_read_raw_multi_4(t, h, a, b, l) \ 101 (*(t)->_space_read_raw_4)((t), (h), (a), (b), (l)) 102 #define bus_space_read_raw_multi_8(t, h, a, b, l) \ 103 (*(t)->_space_read_raw_8)((t), (h), (a), (b), (l)) 104 105 #define bus_space_write_raw_multi_2(t, h, a, b, l) \ 106 (*(t)->_space_write_raw_2)((t), (h), (a), (b), (l)) 107 #define bus_space_write_raw_multi_4(t, h, a, b, l) \ 108 (*(t)->_space_write_raw_4)((t), (h), (a), (b), (l)) 109 #define bus_space_write_raw_multi_8(t, h, a, b, l) \ 110 (*(t)->_space_write_raw_8)((t), (h), (a), (b), (l)) 111 112 #define bus_space_map(t, o, s, c, p) (*(t)->_space_map)((t), (o), (s), (c), (p)) 113 #define bus_space_unmap(t, h, s) (*(t)->_space_unmap)((t), (h), (s)) 114 #define bus_space_subregion(t, h, o, s, p) \ 115 (*(t)->_space_subregion)((t), (h), (o), (s), (p)) 116 117 #define BUS_SPACE_MAP_CACHEABLE 0x01 118 #define BUS_SPACE_MAP_KSEG0 0x02 119 #define BUS_SPACE_MAP_LINEAR 0x04 120 #define BUS_SPACE_MAP_PREFETCHABLE 0x08 121 122 #define bus_space_vaddr(t, h) (*(t)->_space_vaddr)((t), (h)) 123 124 /*----------------------------------------------------------------------------*/ 125 #define bus_space_read_multi(n,m) \ 126 static __inline void \ 127 CAT(bus_space_read_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 128 bus_size_t o, CAT3(u_int,m,_t) *x, size_t cnt) \ 129 { \ 130 while (cnt--) \ 131 *x++ = CAT(bus_space_read_,n)(bst, bsh, o); \ 132 } 133 134 bus_space_read_multi(1,8) 135 bus_space_read_multi(2,16) 136 bus_space_read_multi(4,32) 137 bus_space_read_multi(8,64) 138 139 /*----------------------------------------------------------------------------*/ 140 #define bus_space_read_region(n,m) \ 141 static __inline void \ 142 CAT(bus_space_read_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 143 bus_addr_t ba, CAT3(u_int,m,_t) *x, size_t cnt) \ 144 { \ 145 while (cnt--) \ 146 *x++ = CAT(bus_space_read_,n)(bst, bsh, ba++); \ 147 } 148 149 bus_space_read_region(1,8) 150 bus_space_read_region(2,16) 151 bus_space_read_region(4,32) 152 bus_space_read_region(8,64) 153 154 /*----------------------------------------------------------------------------*/ 155 #define bus_space_read_raw_region(n,m) \ 156 static __inline void \ 157 CAT(bus_space_read_raw_region_,n)(bus_space_tag_t bst, \ 158 bus_space_handle_t bsh, \ 159 bus_addr_t ba, u_int8_t *x, size_t cnt) \ 160 { \ 161 cnt >>= ((n) >> 1); \ 162 while (cnt--) { \ 163 CAT(bus_space_read_raw_multi_,n)(bst, bsh, ba, x, (n)); \ 164 ba += (n); \ 165 x += (n); \ 166 } \ 167 } 168 169 bus_space_read_raw_region(2,16) 170 bus_space_read_raw_region(4,32) 171 bus_space_read_raw_region(8,64) 172 173 /*----------------------------------------------------------------------------*/ 174 #define bus_space_write_multi(n,m) \ 175 static __inline void \ 176 CAT(bus_space_write_multi_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 177 bus_size_t o, const CAT3(u_int,m,_t) *x, size_t cnt) \ 178 { \ 179 while (cnt--) { \ 180 CAT(bus_space_write_,n)(bst, bsh, o, *x++); \ 181 } \ 182 } 183 184 bus_space_write_multi(1,8) 185 bus_space_write_multi(2,16) 186 bus_space_write_multi(4,32) 187 bus_space_write_multi(8,64) 188 189 /*----------------------------------------------------------------------------*/ 190 #define bus_space_write_region(n,m) \ 191 static __inline void \ 192 CAT(bus_space_write_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 193 bus_addr_t ba, const CAT3(u_int,m,_t) *x, size_t cnt) \ 194 { \ 195 while (cnt--) { \ 196 CAT(bus_space_write_,n)(bst, bsh, ba, *x++); \ 197 ba += sizeof(x); \ 198 } \ 199 } 200 201 bus_space_write_region(1,8) 202 bus_space_write_region(2,16) 203 bus_space_write_region(4,32) 204 bus_space_write_region(8,64) 205 206 /*----------------------------------------------------------------------------*/ 207 #define bus_space_write_raw_region(n,m) \ 208 static __inline void \ 209 CAT(bus_space_write_raw_region_,n)(bus_space_tag_t bst, \ 210 bus_space_handle_t bsh, \ 211 bus_addr_t ba, const u_int8_t *x, size_t cnt) \ 212 { \ 213 cnt >>= ((n) >> 1); \ 214 while (cnt--) { \ 215 CAT(bus_space_write_raw_multi_,n)(bst, bsh, ba, x, (n)); \ 216 ba += (n); \ 217 x += (n); \ 218 } \ 219 } 220 221 bus_space_write_raw_region(2,16) 222 bus_space_write_raw_region(4,32) 223 bus_space_write_raw_region(8,64) 224 225 /*----------------------------------------------------------------------------*/ 226 #define bus_space_set_region(n,m) \ 227 static __inline void \ 228 CAT(bus_space_set_region_,n)(bus_space_tag_t bst, bus_space_handle_t bsh, \ 229 bus_addr_t ba, CAT3(u_int,m,_t) x, size_t cnt) \ 230 { \ 231 while (cnt--) { \ 232 CAT(bus_space_write_,n)(bst, bsh, ba, x); \ 233 ba += sizeof(x); \ 234 } \ 235 } 236 237 bus_space_set_region(1,8) 238 bus_space_set_region(2,16) 239 bus_space_set_region(4,32) 240 bus_space_set_region(8,64) 241 242 /*----------------------------------------------------------------------------*/ 243 static __inline void 244 bus_space_copy_1(void *v, bus_space_handle_t h1, bus_size_t o1, 245 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 246 { 247 char *s = (char *)(h1 + o1); 248 char *d = (char *)(h2 + o2); 249 250 while (c--) 251 *d++ = *s++; 252 } 253 254 255 static __inline void 256 bus_space_copy_2(void *v, bus_space_handle_t h1, bus_size_t o1, 257 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 258 { 259 short *s = (short *)(h1 + o1); 260 short *d = (short *)(h2 + o2); 261 262 while (c--) 263 *d++ = *s++; 264 } 265 266 static __inline void 267 bus_space_copy_4(void *v, bus_space_handle_t h1, bus_size_t o1, 268 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 269 { 270 int *s = (int *)(h1 + o1); 271 int *d = (int *)(h2 + o2); 272 273 while (c--) 274 *d++ = *s++; 275 } 276 277 static __inline void 278 bus_space_copy_8(void *v, bus_space_handle_t h1, bus_size_t o1, 279 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 280 { 281 int64_t *s = (int64_t *)(h1 + o1); 282 int64_t *d = (int64_t *)(h2 + o2); 283 284 while (c--) 285 *d++ = *s++; 286 } 287 288 /*----------------------------------------------------------------------------*/ 289 /* 290 * Bus read/write barrier methods. 291 * 292 * void bus_space_barrier(bus_space_tag_t tag, 293 * bus_space_handle_t bsh, bus_size_t offset, 294 * bus_size_t len, int flags); 295 * 296 */ 297 static inline void 298 bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t offset, 299 bus_size_t length, int flags) 300 { 301 __asm__ __volatile__ ("sync" ::: "memory"); 302 } 303 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ 304 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ 305 306 #define BUS_DMA_WAITOK 0x000 307 #define BUS_DMA_NOWAIT 0x001 308 #define BUS_DMA_ALLOCNOW 0x002 309 #define BUS_DMA_COHERENT 0x008 310 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 311 #define BUS_DMA_BUS2 0x020 312 #define BUS_DMA_BUS3 0x040 313 #define BUS_DMA_BUS4 0x080 314 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 315 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 316 #define BUS_DMA_STREAMING 0x400 /* hint: sequential, unidirectional */ 317 #define BUS_DMA_ZERO 0x800 /* zero memory in dmamem_alloc */ 318 319 /* Forwards needed by prototypes below. */ 320 struct mbuf; 321 struct proc; 322 struct uio; 323 324 #define BUS_DMASYNC_POSTREAD 0x0001 325 #define BUS_DMASYNC_POSTWRITE 0x0002 326 #define BUS_DMASYNC_PREREAD 0x0004 327 #define BUS_DMASYNC_PREWRITE 0x0008 328 329 typedef struct machine_bus_dma_tag *bus_dma_tag_t; 330 typedef struct machine_bus_dmamap *bus_dmamap_t; 331 332 /* 333 * bus_dma_segment_t 334 * 335 * Describes a single contiguous DMA transaction. Values 336 * are suitable for programming into DMA registers. 337 */ 338 struct machine_bus_dma_segment { 339 bus_addr_t ds_addr; /* DMA address */ 340 bus_size_t ds_len; /* length of transfer */ 341 342 paddr_t _ds_paddr; /* CPU address */ 343 vaddr_t _ds_vaddr; /* CPU address */ 344 }; 345 typedef struct machine_bus_dma_segment bus_dma_segment_t; 346 347 /* 348 * bus_dma_tag_t 349 * 350 * A machine-dependent opaque type describing the implementation of 351 * DMA for a given bus. 352 */ 353 354 struct machine_bus_dma_tag { 355 void *_cookie; /* cookie used in the guts */ 356 357 /* 358 * DMA mapping methods. 359 */ 360 int (*_dmamap_create)(bus_dma_tag_t , bus_size_t, int, 361 bus_size_t, bus_size_t, int, bus_dmamap_t *); 362 void (*_dmamap_destroy)(bus_dma_tag_t , bus_dmamap_t); 363 int (*_dmamap_load)(bus_dma_tag_t , bus_dmamap_t, void *, 364 bus_size_t, struct proc *, int); 365 int (*_dmamap_load_mbuf)(bus_dma_tag_t , bus_dmamap_t, 366 struct mbuf *, int); 367 int (*_dmamap_load_uio)(bus_dma_tag_t , bus_dmamap_t, 368 struct uio *, int); 369 int (*_dmamap_load_raw)(bus_dma_tag_t , bus_dmamap_t, 370 bus_dma_segment_t *, int, bus_size_t, int); 371 int (*_dmamap_load_buffer)(bus_dma_tag_t, bus_dmamap_t, void *, 372 bus_size_t, struct proc *, int, paddr_t *, int *, int); 373 void (*_dmamap_unload)(bus_dma_tag_t , bus_dmamap_t); 374 void (*_dmamap_sync)(bus_dma_tag_t , bus_dmamap_t, 375 bus_addr_t, bus_size_t, int); 376 377 /* 378 * DMA memory utility functions. 379 */ 380 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 381 bus_size_t, bus_dma_segment_t *, int, int *, int); 382 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); 383 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 384 int, size_t, caddr_t *, int); 385 void (*_dmamem_unmap)(bus_dma_tag_t, caddr_t, size_t); 386 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 387 int, off_t, int, int); 388 389 /* 390 * internal memory address translation information. 391 */ 392 bus_addr_t (*_pa_to_device)(paddr_t); 393 paddr_t (*_device_to_pa)(bus_addr_t); 394 bus_addr_t _dma_mask; 395 }; 396 397 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 398 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 399 #define bus_dmamap_destroy(t, p) \ 400 (*(t)->_dmamap_destroy)((t), (p)) 401 #define bus_dmamap_load(t, m, b, s, p, f) \ 402 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 403 #define bus_dmamap_load_mbuf(t, m, b, f) \ 404 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 405 #define bus_dmamap_load_uio(t, m, u, f) \ 406 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 407 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 408 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 409 #define bus_dmamap_unload(t, p) \ 410 (*(t)->_dmamap_unload)((t), (p)) 411 #define bus_dmamap_sync(t, p, a, l, o) \ 412 (void)((t)->_dmamap_sync ? \ 413 (*(t)->_dmamap_sync)((t), (p), (a), (l), (o)) : (void)0) 414 415 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 416 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 417 #define bus_dmamem_free(t, sg, n) \ 418 (*(t)->_dmamem_free)((t), (sg), (n)) 419 #define bus_dmamem_map(t, sg, n, s, k, f) \ 420 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 421 #define bus_dmamem_unmap(t, k, s) \ 422 (*(t)->_dmamem_unmap)((t), (k), (s)) 423 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 424 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 425 426 int _dmamap_create(bus_dma_tag_t, bus_size_t, int, 427 bus_size_t, bus_size_t, int, bus_dmamap_t *); 428 void _dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 429 int _dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, 430 bus_size_t, struct proc *, int); 431 int _dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); 432 int _dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); 433 int _dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, 434 bus_dma_segment_t *, int, bus_size_t, int); 435 int _dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *, 436 bus_size_t, struct proc *, int, paddr_t *, int *, int); 437 void _dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 438 void _dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 439 bus_size_t, int); 440 441 int _dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t, 442 bus_size_t, bus_dma_segment_t *, int, int *, int); 443 void _dmamem_free(bus_dma_tag_t, bus_dma_segment_t *, int); 444 int _dmamem_map(bus_dma_tag_t, bus_dma_segment_t *, 445 int, size_t, caddr_t *, int); 446 void _dmamem_unmap(bus_dma_tag_t, caddr_t, size_t); 447 paddr_t _dmamem_mmap(bus_dma_tag_t, bus_dma_segment_t *, int, off_t, int, int); 448 int _dmamem_alloc_range(bus_dma_tag_t, bus_size_t, bus_size_t, bus_size_t, 449 bus_dma_segment_t *, int, int *, int, vaddr_t, vaddr_t); 450 451 /* 452 * bus_dmamap_t 453 * 454 * Describes a DMA mapping. 455 */ 456 struct machine_bus_dmamap { 457 /* 458 * PRIVATE MEMBERS: not for use by machine-independent code. 459 */ 460 bus_size_t _dm_size; /* largest DMA transfer mappable */ 461 int _dm_segcnt; /* number of segs this map can map */ 462 bus_size_t _dm_maxsegsz; /* largest possible segment */ 463 bus_size_t _dm_boundary; /* don't cross this */ 464 int _dm_flags; /* misc. flags */ 465 466 void *_dm_cookie; /* cookie for bus-specific functions */ 467 468 /* 469 * PUBLIC MEMBERS: these are used by machine-independent code. 470 */ 471 bus_size_t dm_mapsize; /* size of the mapping */ 472 int dm_nsegs; /* # valid segments in mapping */ 473 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 474 }; 475 476 int generic_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, 477 bus_space_handle_t *); 478 void generic_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t); 479 int generic_space_region(bus_space_tag_t, bus_space_handle_t, bus_size_t, 480 bus_size_t, bus_space_handle_t *); 481 void *generic_space_vaddr(bus_space_tag_t, bus_space_handle_t); 482 uint8_t generic_space_read_1(bus_space_tag_t, bus_space_handle_t, bus_size_t); 483 uint16_t generic_space_read_2(bus_space_tag_t, bus_space_handle_t, bus_size_t); 484 uint32_t generic_space_read_4(bus_space_tag_t, bus_space_handle_t, bus_size_t); 485 uint64_t generic_space_read_8(bus_space_tag_t, bus_space_handle_t, bus_size_t); 486 void generic_space_read_raw_2(bus_space_tag_t, bus_space_handle_t, 487 bus_addr_t, uint8_t *, bus_size_t); 488 void generic_space_write_1(bus_space_tag_t, bus_space_handle_t, bus_size_t, 489 uint8_t); 490 void generic_space_write_2(bus_space_tag_t, bus_space_handle_t, bus_size_t, 491 uint16_t); 492 void generic_space_write_4(bus_space_tag_t, bus_space_handle_t, bus_size_t, 493 uint32_t); 494 void generic_space_write_8(bus_space_tag_t, bus_space_handle_t, bus_size_t, 495 uint64_t); 496 void generic_space_write_raw_2(bus_space_tag_t, bus_space_handle_t, 497 bus_addr_t, const uint8_t *, bus_size_t); 498 void generic_space_read_raw_4(bus_space_tag_t, bus_space_handle_t, 499 bus_addr_t, uint8_t *, bus_size_t); 500 void generic_space_write_raw_4(bus_space_tag_t, bus_space_handle_t, 501 bus_addr_t, const uint8_t *, bus_size_t); 502 void generic_space_read_raw_8(bus_space_tag_t, bus_space_handle_t, 503 bus_addr_t, uint8_t *, bus_size_t); 504 void generic_space_write_raw_8(bus_space_tag_t, bus_space_handle_t, 505 bus_addr_t, const uint8_t *, bus_size_t); 506 507 #endif /* _MACHINE_BUS_H_ */ 508