xref: /openbsd/sys/arch/sparc64/dev/pci_machdep.c (revision 404b540a)
1 /*	$OpenBSD: pci_machdep.c,v 1.39 2009/08/22 02:54:51 mk Exp $	*/
2 /*	$NetBSD: pci_machdep.c,v 1.22 2001/07/20 00:07:13 eeh Exp $	*/
3 
4 /*
5  * Copyright (c) 1999, 2000 Matthew R. Green
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. The name of the author may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
24  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
26  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
27  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 /*
33  * functions expected by the MI PCI code.
34  */
35 
36 #ifdef DEBUG
37 #define SPDB_CONF	0x01
38 #define SPDB_INTR	0x04
39 #define SPDB_INTMAP	0x08
40 #define SPDB_PROBE	0x20
41 int sparc_pci_debug = 0x0;
42 #define DPRINTF(l, s)	do { if (sparc_pci_debug & l) printf s; } while (0)
43 #else
44 #define DPRINTF(l, s)	do { } while (0)
45 #endif
46 
47 #include <sys/types.h>
48 #include <sys/param.h>
49 #include <sys/time.h>
50 #include <sys/systm.h>
51 #include <sys/errno.h>
52 #include <sys/device.h>
53 #include <sys/malloc.h>
54 
55 #define _SPARC_BUS_DMA_PRIVATE
56 #include <machine/bus.h>
57 #include <machine/autoconf.h>
58 #include <machine/openfirm.h>
59 #include <dev/pci/pcivar.h>
60 #include <dev/pci/pcireg.h>
61 
62 #include <dev/ofw/ofw_pci.h>
63 
64 #include <sparc64/dev/iommureg.h>
65 #include <sparc64/dev/iommuvar.h>
66 #include <sparc64/dev/psychoreg.h>
67 #include <sparc64/dev/psychovar.h>
68 #include <sparc64/sparc64/cache.h>
69 
70 /* this is a base to be copied */
71 struct sparc_pci_chipset _sparc_pci_chipset = {
72 	NULL,
73 };
74 
75 static int pci_bus_frequency(int node);
76 
77 /*
78  * functions provided to the MI code.
79  */
80 
81 void
82 pci_attach_hook(parent, self, pba)
83 	struct device *parent;
84 	struct device *self;
85 	struct pcibus_attach_args *pba;
86 {
87 	/* Don't do anything */
88 }
89 
90 int
91 pci_bus_maxdevs(pc, busno)
92 	pci_chipset_tag_t pc;
93 	int busno;
94 {
95 
96 	return 32;
97 }
98 
99 pcitag_t
100 pci_make_tag(pc, b, d, f)
101 	pci_chipset_tag_t pc;
102 	int b;
103 	int d;
104 	int f;
105 {
106 	struct ofw_pci_register reg;
107 	pcitag_t tag;
108 	int busrange[2];
109 	int node, len;
110 #ifdef DEBUG
111 	char name[80];
112 	bzero(name, sizeof(name));
113 #endif
114 
115 	if (pc->busnode[b])
116 		return PCITAG_CREATE(0, b, d, f);
117 
118 	/*
119 	 * Hunt for the node that corresponds to this device
120 	 *
121 	 * We could cache this info in an array in the parent
122 	 * device... except then we have problems with devices
123 	 * attached below pci-pci bridges, and we would need to
124 	 * add special code to the pci-pci bridge to cache this
125 	 * info.
126 	 */
127 
128 	tag = PCITAG_CREATE(-1, b, d, f);
129 	node = pc->rootnode;
130 
131 	/*
132 	 * Traverse all peers until we find the node or we find
133 	 * the right bridge.
134 	 */
135 	for (node = ((node)); node; node = OF_peer(node)) {
136 
137 #ifdef DEBUG
138 		if (sparc_pci_debug & SPDB_PROBE) {
139 			OF_getprop(node, "name", &name, sizeof(name));
140 			printf("checking node %x %s\n", node, name);
141 		}
142 #endif
143 
144 		/*
145 		 * Check for PCI-PCI bridges.  If the device we want is
146 		 * in the bus-range for that bridge, work our way down.
147 		 */
148 		while ((OF_getprop(node, "bus-range", (void *)&busrange,
149 			sizeof(busrange)) == sizeof(busrange)) &&
150 			(b >= busrange[0] && b <= busrange[1])) {
151 			/* Go down 1 level */
152 			node = OF_child(node);
153 #ifdef DEBUG
154 			if (sparc_pci_debug & SPDB_PROBE) {
155 				OF_getprop(node, "name", &name, sizeof(name));
156 				printf("going down to node %x %s\n",
157 					node, name);
158 			}
159 #endif
160 		}
161 
162 		/*
163 		 * We only really need the first `reg' property.
164 		 *
165 		 * For simplicity, we'll query the `reg' when we
166 		 * need it.  Otherwise we could malloc() it, but
167 		 * that gets more complicated.
168 		 */
169 		len = OF_getproplen(node, "reg");
170 		if (len < sizeof(reg))
171 			continue;
172 		if (OF_getprop(node, "reg", (void *)&reg, sizeof(reg)) != len)
173 			panic("pci_probe_bus: OF_getprop len botch");
174 
175 		if (b != OFW_PCI_PHYS_HI_BUS(reg.phys_hi))
176 			continue;
177 		if (d != OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi))
178 			continue;
179 		if (f != OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi))
180 			continue;
181 
182 		/* Got a match */
183 		tag = PCITAG_CREATE(node, b, d, f);
184 
185 		return (tag);
186 	}
187 	/* No device found -- return a dead tag */
188 	return (tag);
189 }
190 
191 void
192 pci_decompose_tag(pc, tag, bp, dp, fp)
193 	pci_chipset_tag_t pc;
194 	pcitag_t tag;
195 	int *bp, *dp, *fp;
196 {
197 
198 	if (bp != NULL)
199 		*bp = PCITAG_BUS(tag);
200 	if (dp != NULL)
201 		*dp = PCITAG_DEV(tag);
202 	if (fp != NULL)
203 		*fp = PCITAG_FUN(tag);
204 }
205 
206 static int
207 pci_bus_frequency(int node)
208 {
209 	int len, bus_frequency;
210 
211 	len = OF_getproplen(node, "clock-frequency");
212 	if (len < sizeof(bus_frequency)) {
213 		DPRINTF(SPDB_PROBE,
214 		    ("pci_bus_frequency: clock-frequency len %d too small\n",
215 		     len));
216 		return 33;
217 	}
218 	if (OF_getprop(node, "clock-frequency", &bus_frequency,
219 		       sizeof(bus_frequency)) != len) {
220 		DPRINTF(SPDB_PROBE,
221 		    ("pci_bus_frequency: could not read clock-frequency\n"));
222 		return 33;
223 	}
224 	return bus_frequency / 1000000;
225 }
226 
227 int
228 sparc64_pci_enumerate_bus(struct pci_softc *sc,
229     int (*match)(struct pci_attach_args *), struct pci_attach_args *pap)
230 {
231 	struct ofw_pci_register reg;
232 	pci_chipset_tag_t pc = sc->sc_pc;
233 	pcitag_t tag;
234 	pcireg_t class, csr, bhlc, ic;
235 	int node, b, d, f, ret;
236 	int bus_frequency, lt, cl, cacheline;
237 	char name[30];
238 
239 	if (sc->sc_bridgetag)
240 		node = PCITAG_NODE(*sc->sc_bridgetag);
241 	else
242 		node = pc->rootnode;
243 
244 	bus_frequency = pci_bus_frequency(node);
245 
246 	/*
247 	 * Make sure the cache line size is at least as big as the
248 	 * ecache line and the streaming cache (64 byte).
249 	 */
250 	cacheline = max(cacheinfo.ec_linesize, 64);
251 
252 	for (node = OF_child(node); node != 0 && node != -1;
253 	     node = OF_peer(node)) {
254 		if (!checkstatus(node))
255 			continue;
256 
257 		name[0] = name[29] = 0;
258 		OF_getprop(node, "name", name, sizeof(name));
259 
260 		if (OF_getprop(node, "class-code", &class, sizeof(class)) !=
261 		    sizeof(class))
262 			continue;
263 		if (OF_getprop(node, "reg", &reg, sizeof(reg)) < sizeof(reg))
264 			panic("pci_enumerate_bus: \"%s\" regs too small", name);
265 
266 		b = OFW_PCI_PHYS_HI_BUS(reg.phys_hi);
267 		d = OFW_PCI_PHYS_HI_DEVICE(reg.phys_hi);
268 		f = OFW_PCI_PHYS_HI_FUNCTION(reg.phys_hi);
269 
270 		if (sc->sc_bus != b) {
271 			printf("%s: WARNING: incorrect bus # for \"%s\" "
272 			"(%d/%d/%d)\n", sc->sc_dev.dv_xname, name, b, d, f);
273 			continue;
274 		}
275 
276 		tag = PCITAG_CREATE(node, b, d, f);
277 
278 		/*
279 		 * Turn on parity and fast-back-to-back for the device.
280 		 */
281 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
282 		if (csr & PCI_STATUS_BACKTOBACK_SUPPORT)
283 			csr |= PCI_COMMAND_BACKTOBACK_ENABLE;
284 		csr |= PCI_COMMAND_PARITY_ENABLE;
285 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
286 
287 		/*
288 		 * Initialize the latency timer register for busmaster
289 		 * devices to work properly.
290 		 *   latency-timer = min-grant * bus-freq / 4  (from FreeBSD)
291 		 * Also initialize the cache line size register.
292 		 * Solaris anytime sets this register to the value 0x10.
293 		 */
294 		bhlc = pci_conf_read(pc, tag, PCI_BHLC_REG);
295 		ic = pci_conf_read(pc, tag, PCI_INTERRUPT_REG);
296 
297 		lt = min(PCI_MIN_GNT(ic) * bus_frequency / 4, 255);
298 		if (lt == 0 || lt < PCI_LATTIMER(bhlc))
299 			lt = PCI_LATTIMER(bhlc);
300 
301 		cl = PCI_CACHELINE(bhlc);
302 		if (cl == 0)
303 			cl = cacheline;
304 
305 		bhlc &= ~((PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT) |
306 			  (PCI_CACHELINE_MASK << PCI_CACHELINE_SHIFT));
307 		bhlc |= (lt << PCI_LATTIMER_SHIFT) |
308 			(cl << PCI_CACHELINE_SHIFT);
309 		pci_conf_write(pc, tag, PCI_BHLC_REG, bhlc);
310 
311 		ret = pci_probe_device(sc, tag, match, pap);
312 		if (match != NULL && ret != 0)
313 			return (ret);
314 	}
315 
316 	return (0);
317 }
318 
319 pcireg_t
320 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
321 {
322         pcireg_t val = (pcireg_t)~0;
323 
324         if (PCITAG_NODE(tag) != -1)
325 		val = pc->conf_read(pc, tag, reg);
326 
327         return (val);
328 }
329 
330 void
331 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
332 {
333         if (PCITAG_NODE(tag) != -1)
334 		pc->conf_write(pc, tag, reg, data);
335 }
336 
337 /*
338  * interrupt mapping foo.
339  * XXX: how does this deal with multiple interrupts for a device?
340  */
341 int
342 pci_intr_map(pa, ihp)
343 	struct pci_attach_args *pa;
344 	pci_intr_handle_t *ihp;
345 {
346 	pcitag_t tag = pa->pa_tag;
347 	int interrupts[4], ninterrupts;
348 	int len, node = PCITAG_NODE(tag);
349 	char devtype[30];
350 
351 	len = OF_getproplen(node, "interrupts");
352 	if (len < 0 || len < sizeof(interrupts[0])) {
353 		DPRINTF(SPDB_INTMAP,
354 			("pci_intr_map: interrupts len %d too small\n", len));
355 		return (ENODEV);
356 	}
357 	if (OF_getprop(node, "interrupts", interrupts,
358 	    sizeof(interrupts)) != len) {
359 		DPRINTF(SPDB_INTMAP,
360 			("pci_intr_map: could not read interrupts\n"));
361 		return (ENODEV);
362 	}
363 
364 	/*
365 	 * If we have multiple interrupts for a device, choose the one
366 	 * that corresponds to the PCI function.  This makes the
367 	 * second PC Card slot on the UltraBook get the right interrupt.
368 	 */
369 	ninterrupts = len / sizeof(interrupts[0]);
370 	if (PCITAG_FUN(pa->pa_tag) < ninterrupts)
371 		interrupts[0] = interrupts[PCITAG_FUN(pa->pa_tag)];
372 
373 	if (OF_mapintr(node, &interrupts[0], sizeof(interrupts[0]),
374 	    sizeof(interrupts)) < 0) {
375 		interrupts[0] = -1;
376 	}
377 	/* Try to find an IPL for this type of device. */
378 	if (OF_getprop(node, "device_type", &devtype, sizeof(devtype)) > 0) {
379 		for (len = 0;  intrmap[len].in_class; len++)
380 			if (strcmp(intrmap[len].in_class, devtype) == 0) {
381 				interrupts[0] |= INTLEVENCODE(intrmap[len].in_lev);
382 				break;
383 			}
384 	}
385 
386 	/* XXXX -- we use the ino.  What if there is a valid IGN? */
387 	*ihp = interrupts[0];
388 
389 	if (pa->pa_pc->intr_map)
390 		return ((*pa->pa_pc->intr_map)(pa, ihp));
391 	else
392 		return (0);
393 }
394 
395 int
396 pci_intr_line(pci_chipset_tag_t pc, pci_intr_handle_t ih)
397 {
398 	return (ih);
399 }
400 
401 const char *
402 pci_intr_string(pc, ih)
403 	pci_chipset_tag_t pc;
404 	pci_intr_handle_t ih;
405 {
406 	static char str[16];
407 
408 	DPRINTF(SPDB_INTR, ("pci_intr_string: ih %u", ih));
409 	snprintf(str, sizeof str, "ivec 0x%x", INTVEC(ih));
410 	DPRINTF(SPDB_INTR, ("; returning %s\n", str));
411 
412 	return (str);
413 }
414 
415 void *
416 pci_intr_establish(pc, ih, level, func, arg, what)
417 	pci_chipset_tag_t pc;
418 	pci_intr_handle_t ih;
419 	int level;
420 	int (*func)(void *);
421 	void *arg;
422 	const char *what;
423 {
424 	void *cookie;
425 
426 	DPRINTF(SPDB_INTR, ("pci_intr_establish: ih %lu; level %d",
427 	    (u_long)ih, level));
428 	cookie = bus_intr_establish(pc->bustag, ih, level, 0, func, arg, what);
429 
430 	DPRINTF(SPDB_INTR, ("; returning handle %p\n", cookie));
431 	return (cookie);
432 }
433 
434 void
435 pci_intr_disestablish(pc, cookie)
436 	pci_chipset_tag_t pc;
437 	void *cookie;
438 {
439 
440 	DPRINTF(SPDB_INTR, ("pci_intr_disestablish: cookie %p\n", cookie));
441 
442 	/* XXX */
443 	printf("can't disestablish PCI interrupts yet\n");
444 }
445