1 /* $OpenBSD: acpireg.h,v 1.36 2016/07/10 20:36:41 kettenis Exp $ */ 2 /* 3 * Copyright (c) 2005 Thorsten Lockert <tholo@sigmasoft.com> 4 * Copyright (c) 2005 Marco Peereboom <marco@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _DEV_ACPI_ACPIREG_H_ 20 #define _DEV_ACPI_ACPIREG_H_ 21 22 /* Root System Descriptor Pointer */ 23 struct acpi_rsdp1 { 24 u_int8_t signature[8]; 25 #define RSDP_SIG "RSD PTR " 26 #define rsdp_signaturee rsdp1.signature 27 u_int8_t checksum; /* make sum == 0 */ 28 #define rsdp_checksum rsdp1.checksum 29 u_int8_t oemid[6]; 30 #define rsdp_oemid rsdp1.oemid 31 u_int8_t revision; /* 0 for 1, 2 for 2 */ 32 #define rsdp_revision rsdp1.revision 33 u_int32_t rsdt; /* physical */ 34 #define rsdp_rsdt rsdp1.rsdt 35 } __packed; 36 37 struct acpi_rsdp { 38 struct acpi_rsdp1 rsdp1; 39 /* 40 * The following values are only valid 41 * when rsdp_revision == 2 42 */ 43 u_int32_t rsdp_length; /* length of rsdp */ 44 u_int64_t rsdp_xsdt; /* physical */ 45 u_int8_t rsdp_extchecksum; /* entire table */ 46 u_int8_t rsdp_reserved[3]; /* must be zero */ 47 } __packed; 48 49 struct acpi_table_header { 50 u_int8_t signature[4]; 51 #define hdr_signature hdr.signature 52 u_int32_t length; 53 #define hdr_length hdr.length 54 u_int8_t revision; 55 #define hdr_revision hdr.revision 56 u_int8_t checksum; 57 #define hdr_checksum hdr.checksum 58 u_int8_t oemid[6]; 59 #define hdr_oemid hdr.oemid 60 u_int8_t oemtableid[8]; 61 #define hdr_oemtableid hdr.oemtableid 62 u_int32_t oemrevision; 63 #define hdr_oemrevision hdr.oemrevision 64 u_int8_t aslcompilerid[4]; 65 #define hdr_aslcompilerid hdr.aslcompilerid 66 u_int32_t aslcompilerrevision; 67 #define hdr_aslcompilerrevision hdr.aslcompilerrevision 68 } __packed; 69 70 struct acpi_rsdt { 71 struct acpi_table_header hdr; 72 #define RSDT_SIG "RSDT" 73 u_int32_t table_offsets[1]; 74 } __packed; 75 76 struct acpi_xsdt { 77 struct acpi_table_header hdr; 78 #define XSDT_SIG "XSDT" 79 u_int64_t table_offsets[1]; 80 } __packed; 81 82 struct acpi_gas { 83 u_int8_t address_space_id; 84 #define GAS_SYSTEM_MEMORY 0 85 #define GAS_SYSTEM_IOSPACE 1 86 #define GAS_PCI_CFG_SPACE 2 87 #define GAS_EMBEDDED 3 88 #define GAS_SMBUS 4 89 #define GAS_FUNCTIONAL_FIXED 127 90 u_int8_t register_bit_width; 91 u_int8_t register_bit_offset; 92 u_int8_t access_size; 93 #define GAS_ACCESS_UNDEFINED 0 94 #define GAS_ACCESS_BYTE 1 95 #define GAS_ACCESS_WORD 2 96 #define GAS_ACCESS_DWORD 3 97 #define GAS_ACCESS_QWORD 4 98 u_int64_t address; 99 } __packed; 100 101 struct acpi_fadt { 102 struct acpi_table_header hdr; 103 #define FADT_SIG "FACP" 104 u_int32_t firmware_ctl; /* phys addr FACS */ 105 u_int32_t dsdt; /* phys addr DSDT */ 106 u_int8_t int_model; /* interrupt model (hdr_revision < 3) */ 107 #define FADT_INT_DUAL_PIC 0 108 #define FADT_INT_MULTI_APIC 1 109 u_int8_t pm_profile; /* power mgmt profile */ 110 #define FADT_PM_UNSPEC 0 111 #define FADT_PM_DESKTOP 1 112 #define FADT_PM_MOBILE 2 113 #define FADT_PM_WORKSTATION 3 114 #define FADT_PM_ENT_SERVER 4 115 #define FADT_PM_SOHO_SERVER 5 116 #define FADT_PM_APPLIANCE 6 117 #define FADT_PM_PERF_SERVER 7 118 u_int16_t sci_int; /* SCI interrupt */ 119 u_int32_t smi_cmd; /* SMI command port */ 120 u_int8_t acpi_enable; /* value to enable */ 121 u_int8_t acpi_disable; /* value to disable */ 122 u_int8_t s4bios_req; /* value for S4 */ 123 u_int8_t pstate_cnt; /* value for performance (hdr_revision > 2) */ 124 u_int32_t pm1a_evt_blk; /* power management 1a */ 125 u_int32_t pm1b_evt_blk; /* power mangement 1b */ 126 u_int32_t pm1a_cnt_blk; /* pm control 1a */ 127 u_int32_t pm1b_cnt_blk; /* pm control 1b */ 128 u_int32_t pm2_cnt_blk; /* pm control 2 */ 129 u_int32_t pm_tmr_blk; 130 u_int32_t gpe0_blk; 131 u_int32_t gpe1_blk; 132 u_int8_t pm1_evt_len; 133 u_int8_t pm1_cnt_len; 134 u_int8_t pm2_cnt_len; 135 u_int8_t pm_tmr_len; 136 u_int8_t gpe0_blk_len; 137 u_int8_t gpe1_blk_len; 138 u_int8_t gpe1_base; 139 u_int8_t cst_cnt; /* (hdr_revision > 2) */ 140 u_int16_t p_lvl2_lat; 141 u_int16_t p_lvl3_lat; 142 u_int16_t flush_size; 143 u_int16_t flush_stride; 144 u_int8_t duty_offset; 145 u_int8_t duty_width; 146 u_int8_t day_alrm; 147 u_int8_t mon_alrm; 148 u_int8_t century; 149 u_int16_t iapc_boot_arch; /* (hdr_revision > 2) */ 150 #define FADT_LEGACY_DEVICES 0x0001 /* Legacy devices supported */ 151 #define FADT_i8042 0x0002 /* Keyboard controller present */ 152 #define FADT_NO_VGA 0x0004 /* Do not probe VGA */ 153 u_int8_t reserved1; 154 u_int32_t flags; 155 #define FADT_WBINVD 0x00000001 156 #define FADT_WBINVD_FLUSH 0x00000002 157 #define FADT_PROC_C1 0x00000004 158 #define FADT_P_LVL2_UP 0x00000008 159 #define FADT_PWR_BUTTON 0x00000010 160 #define FADT_SLP_BUTTON 0x00000020 161 #define FADT_FIX_RTC 0x00000040 162 #define FADT_RTC_S4 0x00000080 163 #define FADT_TMR_VAL_EXT 0x00000100 164 #define FADT_DCK_CAP 0x00000200 165 #define FADT_RESET_REG_SUP 0x00000400 166 #define FADT_SEALED_CASE 0x00000800 167 #define FADT_HEADLESS 0x00001000 168 #define FADT_CPU_SW_SLP 0x00002000 169 #define FADT_PCI_EXP_WAK 0x00004000 170 #define FADT_USE_PLATFORM_CLOCK 0x00008000 171 #define FADT_S4_RTC_STS_VALID 0x00010000 172 #define FADT_REMOTE_POWER_ON_CAPABLE 0x00020000 173 #define FADT_FORCE_APIC_CLUSTER_MODEL 0x00040000 174 #define FADT_FORCE_APIC_PHYS_DEST_MODE 0x00080000 175 #define FADT_HW_REDUCED_ACPI 0x00100000 176 #define FADT_POWER_S0_IDLE_CAPABLE 0x00200000 177 /* 178 * Following values only exist when rev > 1 179 * If the extended addresses exists, they 180 * must be used in preferense to the non- 181 * extended values above 182 */ 183 struct acpi_gas reset_reg; 184 u_int8_t reset_value; 185 u_int8_t reserved2a; 186 u_int8_t reserved2b; 187 u_int8_t reserved2c; 188 u_int64_t x_firmware_ctl; 189 u_int64_t x_dsdt; 190 struct acpi_gas x_pm1a_evt_blk; 191 struct acpi_gas x_pm1b_evt_blk; 192 struct acpi_gas x_pm1a_cnt_blk; 193 struct acpi_gas x_pm1b_cnt_blk; 194 struct acpi_gas x_pm2_cnt_blk; 195 struct acpi_gas x_pm_tmr_blk; 196 struct acpi_gas x_gpe0_blk; 197 struct acpi_gas x_gpe1_blk; 198 struct acpi_gas sleep_control_reg; 199 struct acpi_gas sleep_status_reg; 200 } __packed; 201 202 struct acpi_dsdt { 203 struct acpi_table_header hdr; 204 #define DSDT_SIG "DSDT" 205 u_int8_t aml[1]; 206 } __packed; 207 208 struct acpi_ssdt { 209 struct acpi_table_header hdr; 210 #define SSDT_SIG "SSDT" 211 u_int8_t aml[1]; 212 } __packed; 213 214 /* 215 * Table deprecated by ACPI 2.0 216 */ 217 struct acpi_psdt { 218 struct acpi_table_header hdr; 219 #define PSDT_SIG "PSDT" 220 } __packed; 221 222 struct acpi_madt { 223 struct acpi_table_header hdr; 224 #define MADT_SIG "APIC" 225 u_int32_t local_apic_address; 226 u_int32_t flags; 227 #define ACPI_APIC_PCAT_COMPAT 0x00000001 228 } __packed; 229 230 struct acpi_madt_lapic { 231 u_int8_t apic_type; 232 #define ACPI_MADT_LAPIC 0 233 u_int8_t length; 234 u_int8_t acpi_proc_id; 235 u_int8_t apic_id; 236 u_int32_t flags; 237 #define ACPI_PROC_ENABLE 0x00000001 238 } __packed; 239 240 struct acpi_madt_ioapic { 241 u_int8_t apic_type; 242 #define ACPI_MADT_IOAPIC 1 243 u_int8_t length; 244 u_int8_t acpi_ioapic_id; 245 u_int8_t reserved; 246 u_int32_t address; 247 u_int32_t global_int_base; 248 } __packed; 249 250 struct acpi_madt_override { 251 u_int8_t apic_type; 252 #define ACPI_MADT_OVERRIDE 2 253 u_int8_t length; 254 u_int8_t bus; 255 #define ACPI_OVERRIDE_BUS_ISA 0 256 u_int8_t source; 257 u_int32_t global_int; 258 u_int16_t flags; 259 #define ACPI_OVERRIDE_POLARITY_BITS 0x3 260 #define ACPI_OVERRIDE_POLARITY_BUS 0x0 261 #define ACPI_OVERRIDE_POLARITY_HIGH 0x1 262 #define ACPI_OVERRIDE_POLARITY_LOW 0x3 263 #define ACPI_OVERRIDE_TRIGGER_BITS 0xc 264 #define ACPI_OVERRIDE_TRIGGER_BUS 0x0 265 #define ACPI_OVERRIDE_TRIGGER_EDGE 0x4 266 #define ACPI_OVERRIDE_TRIGGER_LEVEL 0xc 267 } __packed; 268 269 struct acpi_madt_nmi { 270 u_int8_t apic_type; 271 #define ACPI_MADT_NMI 3 272 u_int8_t length; 273 u_int16_t flags; /* Same flags as acpi_madt_override */ 274 u_int32_t global_int; 275 } __packed; 276 277 struct acpi_madt_lapic_nmi { 278 u_int8_t apic_type; 279 #define ACPI_MADT_LAPIC_NMI 4 280 u_int8_t length; 281 u_int8_t acpi_proc_id; 282 u_int16_t flags; /* Same flags as acpi_madt_override */ 283 u_int8_t local_apic_lint; 284 } __packed; 285 286 struct acpi_madt_lapic_override { 287 u_int8_t apic_type; 288 #define ACPI_MADT_LAPIC_OVERRIDE 5 289 u_int8_t length; 290 u_int16_t reserved; 291 u_int64_t lapic_address; 292 } __packed; 293 294 struct acpi_madt_io_sapic { 295 u_int8_t apic_type; 296 #define ACPI_MADT_IO_SAPIC 6 297 u_int8_t length; 298 u_int8_t iosapic_id; 299 u_int8_t reserved; 300 u_int32_t global_int_base; 301 u_int64_t iosapic_address; 302 } __packed; 303 304 struct acpi_madt_local_sapic { 305 u_int8_t apic_type; 306 #define ACPI_MADT_LOCAL_SAPIC 7 307 u_int8_t length; 308 u_int8_t acpi_proc_id; 309 u_int8_t local_sapic_id; 310 u_int8_t local_sapic_eid; 311 u_int8_t reserved[3]; 312 u_int32_t flags; /* Same flags as acpi_madt_lapic */ 313 u_int32_t acpi_proc_uid; 314 u_int8_t acpi_proc_uid_string[1]; 315 } __packed; 316 317 struct acpi_madt_platform_int { 318 u_int8_t apic_type; 319 #define ACPI_MADT_PLATFORM_INT 8 320 u_int8_t length; 321 u_int16_t flags; /* Same flags as acpi_madt_override */ 322 u_int8_t int_type; 323 #define ACPI_MADT_PLATFORM_PMI 1 324 #define ACPI_MADT_PLATFORM_INIT 2 325 #define ACPI_MADT_PLATFORM_CORR_ERROR 3 326 u_int8_t proc_id; 327 u_int8_t proc_eid; 328 u_int8_t io_sapic_vec; 329 u_int32_t global_int; 330 u_int32_t platform_int_flags; 331 #define ACPI_MADT_PLATFORM_CPEI 0x00000001 332 } __packed; 333 334 struct acpi_madt_x2apic { 335 u_int8_t apic_type; 336 #define ACPI_MADT_X2APIC 9 337 u_int8_t length; 338 u_int8_t reserved[2]; 339 u_int32_t apic_id; 340 u_int32_t flags; /* Same flags as acpi_madt_lapic */ 341 u_int32_t acpi_proc_uid; 342 } __packed; 343 344 struct acpi_madt_x2apic_nmi { 345 u_int8_t apic_type; 346 #define ACPI_MADT_X2APIC_NMI 10 347 u_int8_t length; 348 u_int16_t flags; /* Same flags as acpi_madt_override */ 349 u_int32_t apic_proc_uid; 350 u_int8_t local_x2apic_lint; 351 u_int8_t reserved[3]; 352 } __packed; 353 354 union acpi_madt_entry { 355 struct acpi_madt_lapic madt_lapic; 356 struct acpi_madt_ioapic madt_ioapic; 357 struct acpi_madt_override madt_override; 358 struct acpi_madt_nmi madt_nmi; 359 struct acpi_madt_lapic_nmi madt_lapic_nmi; 360 struct acpi_madt_lapic_override madt_lapic_override; 361 struct acpi_madt_io_sapic madt_io_sapic; 362 struct acpi_madt_local_sapic madt_local_sapic; 363 struct acpi_madt_platform_int madt_platform_int; 364 struct acpi_madt_x2apic madt_x2apic; 365 struct acpi_madt_x2apic_nmi madt_x2apic_nmi; 366 } __packed; 367 368 struct acpi_sbst { 369 struct acpi_table_header hdr; 370 #define SBST_SIG "SBST" 371 u_int32_t warning_energy_level; 372 u_int32_t low_energy_level; 373 u_int32_t critical_energy_level; 374 } __packed; 375 376 struct acpi_ecdt { 377 struct acpi_table_header hdr; 378 #define ECDT_SIG "ECDT" 379 struct acpi_gas ec_control; 380 struct acpi_gas ec_data; 381 u_int32_t uid; 382 u_int8_t gpe_bit; 383 u_int8_t ec_id[1]; 384 } __packed; 385 386 struct acpi_srat { 387 struct acpi_table_header hdr; 388 #define SRAT_SIG "SRAT" 389 u_int32_t reserved1; 390 u_int64_t reserved2; 391 } __packed; 392 393 struct acpi_slit { 394 struct acpi_table_header hdr; 395 #define SLIT_SIG "SLIT" 396 u_int64_t number_of_localities; 397 } __packed; 398 399 struct acpi_hpet { 400 struct acpi_table_header hdr; 401 #define HPET_SIG "HPET" 402 u_int32_t event_timer_block_id; 403 struct acpi_gas base_address; 404 u_int8_t hpet_number; 405 u_int16_t main_counter_min_clock_tick; 406 u_int8_t page_protection; 407 } __packed; 408 409 struct acpi_mcfg { 410 struct acpi_table_header hdr; 411 #define MCFG_SIG "MCFG" 412 u_int8_t reserved[8]; 413 u_int64_t base_address; 414 u_int16_t segment; 415 u_int8_t min_bus_number; 416 u_int8_t max_bus_number; 417 u_int32_t reserved1; 418 } __packed; 419 420 struct acpi_facs { 421 u_int8_t signature[4]; 422 #define FACS_SIG "FACS" 423 u_int32_t length; 424 u_int32_t hardware_signature; 425 u_int32_t wakeup_vector; 426 u_int32_t global_lock; 427 #define FACS_LOCK_PENDING 0x00000001 428 #define FACS_LOCK_OWNED 0x00000002 429 u_int32_t flags; 430 #define FACS_S4BIOS_F 0x00000001 /* S4BIOS_REQ supported */ 431 uint64_t x_wakeup_vector; 432 u_int8_t version; 433 u_int8_t reserved[31]; 434 } __packed; 435 436 /* 437 * Intel ACPI DMA Remapping Entries 438 */ 439 struct acpidmar_devpath { 440 uint8_t device; 441 uint8_t function; 442 } __packed; 443 444 struct acpidmar_devscope { 445 uint8_t type; 446 #define DMAR_ENDPOINT 0x1 447 #define DMAR_BRIDGE 0x2 448 #define DMAR_IOAPIC 0x3 449 #define DMAR_HPET 0x4 450 uint8_t length; 451 uint16_t reserved; 452 uint8_t enumid; 453 uint8_t bus; 454 } __packed; 455 456 /* DMA Remapping Hardware Unit */ 457 struct acpidmar_drhd { 458 uint16_t type; 459 uint16_t length; 460 461 uint8_t flags; 462 uint8_t reserved; 463 uint16_t segment; 464 uint64_t address; 465 /* struct acpidmar_devscope[]; */ 466 } __packed; 467 468 /* Reserved Memory Region Reporting */ 469 struct acpidmar_rmrr { 470 uint16_t type; 471 uint16_t length; 472 473 uint16_t reserved; 474 uint16_t segment; 475 uint64_t base; 476 uint64_t limit; 477 /* struct acpidmar_devscope[]; */ 478 } __packed; 479 480 /* Root Port ATS Capability Reporting */ 481 struct acpidmar_atsr { 482 uint16_t type; 483 uint16_t length; 484 485 uint8_t flags; 486 uint8_t reserved; 487 uint16_t segment; 488 /* struct acpidmar_devscope[]; */ 489 } __packed; 490 491 union acpidmar_entry { 492 struct { 493 uint16_t type; 494 #define DMAR_DRHD 0x0 495 #define DMAR_RMRR 0x1 496 #define DMAR_ATSR 0x2 497 #define DMAR_RHSA 0x3 498 uint16_t length; 499 } __packed; 500 struct acpidmar_drhd drhd; 501 struct acpidmar_rmrr rmrr; 502 struct acpidmar_atsr atsr; 503 } __packed; 504 505 struct acpi_dmar { 506 struct acpi_table_header hdr; 507 #define DMAR_SIG "DMAR" 508 uint8_t haw; 509 uint8_t flags; 510 uint8_t reserved[10]; 511 /* struct acpidmar_entry[]; */ 512 } __packed; 513 514 /* 515 * AMD I/O Virtualization Remapping Entries 516 */ 517 union acpi_ivhd_entry { 518 uint8_t type; 519 #define IVHD_ALL 1 520 #define IVHD_SEL 2 521 #define IVHD_SOR 3 522 #define IVHD_EOR 4 523 #define IVHD_ALIAS_SEL 66 524 #define IVHD_ALIAS_SOR 67 525 #define IVHD_EXT_SEL 70 526 #define IVHD_EXT_SOR 71 527 #define IVHD_SPECIAL 72 528 struct { 529 uint8_t type; 530 uint16_t resvd; 531 uint8_t data; 532 } __packed all; 533 struct { 534 uint8_t type; 535 uint16_t devid; 536 uint8_t data; 537 } __packed sel; 538 struct { 539 uint8_t type; 540 uint16_t devid; 541 uint8_t data; 542 } __packed sor; 543 struct { 544 uint8_t type; 545 uint16_t devid; 546 uint8_t resvd; 547 } __packed eor; 548 struct { 549 uint8_t type; 550 uint16_t devid; 551 uint8_t data; 552 uint8_t resvd1; 553 uint16_t srcid; 554 uint8_t resvd2; 555 } __packed alias; 556 struct { 557 uint8_t type; 558 uint16_t devid; 559 uint8_t data; 560 uint32_t extdata; 561 #define IVHD_ATS_DIS (1L << 31) 562 } __packed ext; 563 struct { 564 uint8_t type; 565 uint16_t resvd; 566 uint8_t data; 567 uint8_t handle; 568 uint16_t devid; 569 uint8_t variety; 570 #define IVHD_IOAPIC 0x01 571 #define IVHD_HPET 0x02 572 } __packed special; 573 } __packed; 574 575 struct acpi_ivmd { 576 uint8_t type; 577 uint8_t flags; 578 #define IVMD_EXCLRANGE (1L << 3) 579 #define IVMD_IW (1L << 2) 580 #define IVMD_IR (1L << 1) 581 #define IVMD_UNITY (1L << 0) 582 uint16_t length; 583 uint16_t devid; 584 uint16_t auxdata; 585 uint8_t reserved[8]; 586 uint64_t base; 587 uint64_t limit; 588 } __packed; 589 590 struct acpi_ivhd { 591 uint8_t type; 592 uint8_t flags; 593 #define IVHD_IOTLB (1L << 4) 594 #define IVHD_ISOC (1L << 3) 595 #define IVHD_RESPASSPW (1L << 2) 596 #define IVHD_PASSPW (1L << 1) 597 #define IVHD_HTTUNEN (1L << 0) 598 uint16_t length; 599 uint16_t devid; 600 uint16_t cap; 601 uint64_t address; 602 uint16_t segment; 603 uint16_t info; 604 #define IVHD_UNITID_SHIFT 8 605 #define IVHD_UNITID_MASK 0x1F 606 #define IVHD_MSINUM_SHIFT 0 607 #define IVHD_MSINUM_MASK 0x1F 608 uint32_t reserved; 609 } __packed; 610 611 union acpi_ivrs_entry { 612 struct { 613 uint8_t type; 614 #define IVRS_IVHD 0x10 615 #define IVRS_IVMD_ALL 0x20 616 #define IVRS_IVMD_SPECIFIED 0x21 617 #define IVRS_IVMD_RANGE 0x22 618 uint8_t flags; 619 uint16_t length; 620 } __packed; 621 struct acpi_ivhd ivhd; 622 struct acpi_ivmd ivmd; 623 } __packed; 624 625 struct acpi_ivrs { 626 struct acpi_table_header hdr; 627 #define IVRS_SIG "IVRS" 628 uint32_t ivinfo; 629 #define IVRS_ATSRNG (1L << 22) 630 #define IVRS_VASIZE_SHIFT 15 631 #define IVRS_VASIZE_MASK 0x7F 632 #define IVRS_PASIZE_SHIFT 8 633 #define IVRS_PASIZE_MASK 0x7F 634 uint8_t reserved[8]; 635 } __packed; 636 637 638 #define ACPI_FREQUENCY 3579545 /* Per ACPI spec */ 639 640 /* 641 * PCI Configuration space 642 */ 643 #define ACPI_ADR_PCIDEV(addr) (u_int16_t)(addr >> 16) 644 #define ACPI_ADR_PCIFUN(addr) (u_int16_t)(addr & 0xFFFF) 645 #define ACPI_PCI_BUS(addr) (u_int16_t)((addr) >> 48) 646 #define ACPI_PCI_DEV(addr) (u_int16_t)((addr) >> 32) 647 #define ACPI_PCI_FN(addr) (u_int16_t)((addr) >> 16) 648 #define ACPI_PCI_REG(addr) (u_int16_t)(addr) 649 #define ACPI_PCI_ADDR(b,d,f,r) ((u_int64_t)(b)<<48LL | (u_int64_t)(d)<<32LL | (f)<<16LL | (r)) 650 651 /* 652 * PM1 Status Registers Fixed Hardware Feature Status Bits 653 */ 654 #define ACPI_PM1_STATUS 0x00 655 #define ACPI_PM1_TMR_STS 0x0001 656 #define ACPI_PM1_BM_STS 0x0010 657 #define ACPI_PM1_GBL_STS 0x0020 658 #define ACPI_PM1_PWRBTN_STS 0x0100 659 #define ACPI_PM1_SLPBTN_STS 0x0200 660 #define ACPI_PM1_RTC_STS 0x0400 661 #define ACPI_PM1_PCIEXP_WAKE_STS 0x4000 662 #define ACPI_PM1_WAK_STS 0x8000 663 664 #define ACPI_PM1_ALL_STS (ACPI_PM1_TMR_STS | ACPI_PM1_BM_STS | \ 665 ACPI_PM1_GBL_STS | ACPI_PM1_PWRBTN_STS | \ 666 ACPI_PM1_SLPBTN_STS | ACPI_PM1_RTC_STS | \ 667 ACPI_PM1_PCIEXP_WAKE_STS | ACPI_PM1_WAK_STS ) 668 669 /* 670 * PM1 Enable Registers 671 */ 672 #define ACPI_PM1_ENABLE 0x02 673 #define ACPI_PM1_TMR_EN 0x0001 674 #define ACPI_PM1_GBL_EN 0x0020 675 #define ACPI_PM1_PWRBTN_EN 0x0100 676 #define ACPI_PM1_SLPBTN_EN 0x0200 677 #define ACPI_PM1_RTC_EN 0x0400 678 #define ACPI_PM1_PCIEXP_WAKE_DIS 0x4000 679 680 /* 681 * PM1 Control Registers 682 */ 683 #define ACPI_PM1_CONTROL 0x00 684 #define ACPI_PM1_SCI_EN 0x0001 685 #define ACPI_PM1_BM_RLD 0x0002 686 #define ACPI_PM1_GBL_RLS 0x0004 687 #define ACPI_PM1_SLP_TYPX(x) ((x) << 10) 688 #define ACPI_PM1_SLP_TYPX_MASK 0x1c00 689 #define ACPI_PM1_SLP_EN 0x2000 690 691 /* 692 * PM2 Control Registers 693 */ 694 #define ACPI_PM2_CONTROL 0x06 695 #define ACPI_PM2_ARB_DIS 0x0001 696 697 /* 698 * Operation Region Address Space Identifiers 699 */ 700 #define ACPI_OPREG_SYSMEM 0 /* SystemMemory */ 701 #define ACPI_OPREG_SYSIO 1 /* SystemIO */ 702 #define ACPI_OPREG_PCICFG 2 /* PCI_Config */ 703 #define ACPI_OPREG_EC 3 /* EmbeddedControl */ 704 #define ACPI_OPREG_SMBUS 4 /* SMBus */ 705 #define ACPI_OPREG_CMOS 5 /* CMOS */ 706 #define ACPI_OPREG_PCIBAR 6 /* PCIBARTarget */ 707 #define ACPI_OPREG_IPMI 7 /* IPMI */ 708 #define ACPI_OPREG_GPIO 8 /* GeneralPurposeIO */ 709 #define ACPI_OPREG_GSB 9 /* GenericSerialBus */ 710 711 /* 712 * Sleeping States 713 */ 714 #define ACPI_STATE_S0 0 715 #define ACPI_STATE_S1 1 716 #define ACPI_STATE_S2 2 717 #define ACPI_STATE_S3 3 718 #define ACPI_STATE_S4 4 719 #define ACPI_STATE_S5 5 720 721 /* 722 * Device Power States 723 */ 724 #define ACPI_STATE_D0 0 725 #define ACPI_STATE_D1 1 726 #define ACPI_STATE_D2 2 727 #define ACPI_STATE_D3 3 728 729 /* 730 * ACPI Device IDs 731 */ 732 #define ACPI_DEV_TIM "PNP0100" /* System timer */ 733 #define ACPI_DEV_ACPI "PNP0C08" /* ACPI device */ 734 #define ACPI_DEV_PCIB "PNP0A03" /* PCI bus */ 735 #define ACPI_DEV_GISAB "PNP0A05" /* Generic ISA Bus */ 736 #define ACPI_DEV_EIOB "PNP0A06" /* Extended I/O Bus */ 737 #define ACPI_DEV_PCIEB "PNP0A08" /* PCIe bus */ 738 #define ACPI_DEV_MR "PNP0C02" /* Motherboard resources */ 739 #define ACPI_DEV_NPROC "PNP0C04" /* Numeric data processor */ 740 #define ACPI_DEV_CS "PNP0C08" /* ACPI-Compliant System */ 741 #define ACPI_DEV_ECD "PNP0C09" /* Embedded Controller Device */ 742 #define ACPI_DEV_CMB "PNP0C0A" /* Control Method Battery */ 743 #define ACPI_DEV_FAN "PNP0C0B" /* Fan Device */ 744 #define ACPI_DEV_PBD "PNP0C0C" /* Power Button Device */ 745 #define ACPI_DEV_LD "PNP0C0D" /* Lid Device */ 746 #define ACPI_DEV_SBD "PNP0C0E" /* Sleep Button Device */ 747 #define ACPI_DEV_PILD "PNP0C0F" /* PCI Interrupt Link Device */ 748 #define ACPI_DEV_HIDI2C "PNP0C50" /* HID over I2C device */ 749 #define ACPI_DEV_HIDI2C2 "ACPI0C50" /* HID over I2C device */ 750 #define ACPI_DEV_MEMD "PNP0C80" /* Memory Device */ 751 #define ACPI_DEV_MOUSE "PNP0F13" /* PS/2 Mouse */ 752 #define ACPI_DEV_SHC "ACPI0001" /* SMBus 1.0 Host Controller */ 753 #define ACPI_DEV_SMS1 "ACPI0002" /* Smart Battery Subsystem */ 754 #define ACPI_DEV_AC "ACPI0003" /* AC Device */ 755 #define ACPI_DEV_MD "ACPI0004" /* Module Device */ 756 #define ACPI_DEV_SMS2 "ACPI0005" /* SMBus 2.0 Host Controller */ 757 #define ACPI_DEV_GBD "ACPI0006" /* GPE Block Device */ 758 #define ACPI_DEV_PD "ACPI0007" /* Processor Device */ 759 #define ACPI_DEV_ALSD "ACPI0008" /* Ambient Light Sensor Device */ 760 #define ACPI_DEV_IOXA "ACPI0009" /* IO x APIC Device */ 761 #define ACPI_DEV_IOA "ACPI000A" /* IO APIC Device */ 762 #define ACPI_DEV_IOSA "ACPI000B" /* IO SAPIC Device */ 763 #define ACPI_DEV_THZ "THERMALZONE" /* Thermal Zone */ 764 #define ACPI_DEV_FFB "FIXEDBUTTON" /* Fixed Feature Button */ 765 #define ACPI_DEV_ASUS "ASUS010" /* ASUS Hotkeys */ 766 #define ACPI_DEV_ASUS1 "ATK0100" /* ASUS Special Device */ 767 #define ACPI_DEV_IBM "IBM0068" /* IBM ThinkPad support */ 768 #define ACPI_DEV_LENOVO "LEN0068" /* Lenovo ThinkPad support */ 769 #define ACPI_DEV_ASUSAIBOOSTER "ATK0110" /* ASUSTeK AI Booster */ 770 #define ACPI_DEV_TOSHIBA_LIBRETTO "TOS6200" /* Toshiba Libretto support */ 771 #define ACPI_DEV_TOSHIBA_DYNABOOK "TOS6207" /* Toshiba Dynabook support */ 772 #define ACPI_DEV_TOSHIBA_SPA40 "TOS6208" /* Toshiba SPA40 support */ 773 774 /* Synopsys DesignWare I2C controllers */ 775 #define ACPI_DEV_DWIIC1 "INT33C2" 776 #define ACPI_DEV_DWIIC2 "INT33C3" 777 #define ACPI_DEV_DWIIC3 "INT3432" 778 #define ACPI_DEV_DWIIC4 "INT3433" 779 #define ACPI_DEV_DWIIC5 "80860F41" 780 781 #endif /* !_DEV_ACPI_ACPIREG_H_ */ 782