1 /* $OpenBSD: ata_wdc.c,v 1.44 2011/11/15 17:14:14 deraadt Exp $ */ 2 /* $NetBSD: ata_wdc.c,v 1.21 1999/08/09 09:43:11 bouyer Exp $ */ 3 4 /* 5 * Copyright (c) 1998, 2001 Manuel Bouyer. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 /*- 30 * Copyright (c) 1998 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum, by Onno van der Linden and by Manuel Bouyer. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 46 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 49 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 50 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 51 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 52 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 53 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 54 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 55 * POSSIBILITY OF SUCH DAMAGE. 56 */ 57 58 #include <sys/param.h> 59 #include <sys/systm.h> 60 #include <sys/kernel.h> 61 #include <sys/file.h> 62 #include <sys/stat.h> 63 #include <sys/buf.h> 64 #include <sys/malloc.h> 65 #include <sys/device.h> 66 #include <sys/disklabel.h> 67 #include <sys/disk.h> 68 #include <sys/syslog.h> 69 #include <sys/proc.h> 70 71 #include <machine/intr.h> 72 #include <machine/bus.h> 73 74 #include <dev/ata/atareg.h> 75 #include <dev/ata/atavar.h> 76 #include <dev/ic/wdcreg.h> 77 #include <dev/ic/wdcvar.h> 78 #include <dev/ata/wdvar.h> 79 80 #ifdef HIBERNATE 81 #include <sys/hibernate.h> 82 #endif 83 84 #define DEBUG_INTR 0x01 85 #define DEBUG_XFERS 0x02 86 #define DEBUG_STATUS 0x04 87 #define DEBUG_FUNCS 0x08 88 #define DEBUG_PROBE 0x10 89 90 #ifdef WDCDEBUG 91 #ifndef WDCDEBUG_WD_MASK 92 #define WDCDEBUG_WD_MASK 0x00 93 #endif 94 int wdcdebug_wd_mask = WDCDEBUG_WD_MASK; 95 #define WDCDEBUG_PRINT(args, level) do { \ 96 if ((wdcdebug_wd_mask & (level)) != 0) \ 97 printf args; \ 98 } while (0) 99 #else 100 #define WDCDEBUG_PRINT(args, level) 101 #endif 102 103 #define ATA_DELAY 45000 /* 45s for a drive I/O */ 104 105 void wdc_ata_bio_start(struct channel_softc *, struct wdc_xfer *); 106 void _wdc_ata_bio_start(struct channel_softc *, struct wdc_xfer *); 107 int wdc_ata_bio_intr(struct channel_softc *, struct wdc_xfer *, int); 108 void wdc_ata_bio_kill_xfer(struct channel_softc *, struct wdc_xfer *); 109 void wdc_ata_bio_done(struct channel_softc *, struct wdc_xfer *); 110 int wdc_ata_ctrl_intr(struct channel_softc *, struct wdc_xfer *, int); 111 int wdc_ata_err(struct ata_drive_datas *, struct ata_bio *); 112 #define WDC_ATA_NOERR 0x00 /* Drive doesn't report an error */ 113 #define WDC_ATA_RECOV 0x01 /* There was a recovered error */ 114 #define WDC_ATA_ERR 0x02 /* Drive reports an error */ 115 116 #ifdef HIBERNATE 117 int 118 wd_hibernate_io(dev_t dev, daddr_t blkno, vaddr_t addr, size_t size, int op, void *page) 119 { 120 struct { 121 struct wd_softc wd; 122 struct wdc_xfer xfer; 123 struct channel_softc chp; 124 } *my = page; 125 struct wd_softc *real_wd, *wd = &my->wd; 126 struct wdc_xfer *xfer = &my->xfer; 127 struct channel_softc *chp = &my->chp; 128 struct ata_bio *ata_bio; 129 extern struct cfdriver wd_cd; 130 131 /* early call for initialization */ 132 if (op == HIB_INIT) 133 return(0); 134 135 real_wd = (struct wd_softc *)disk_lookup(&wd_cd, DISKUNIT(dev)); 136 if (real_wd == NULL) 137 return (ENODEV); 138 139 /* 140 * Craft a fake set of softc and related structures 141 * which we think the driver modifies. Some of these will 142 * have pointers which reach to unsafe places, but.. 143 */ 144 bcopy(real_wd->drvp->chnl_softc, &my->chp, sizeof my->chp); 145 chp->ch_drive[0].chnl_softc = chp; 146 chp->ch_drive[1].chnl_softc = chp; 147 148 bcopy(real_wd, &my->wd, sizeof my->wd); 149 ata_bio = &wd->sc_wdc_bio; 150 ata_bio->wd = wd; /* fixup ata_bio->wd */ 151 wd->drvp = &chp->ch_drive[real_wd->drvp->drive]; 152 153 /* Fill the request and submit it */ 154 wd->sc_wdc_bio.blkno = blkno; 155 wd->sc_wdc_bio.flags = ATA_POLL | ATA_LBA48; 156 if (op == HIB_R) 157 wd->sc_wdc_bio.flags |= ATA_READ; 158 wd->sc_wdc_bio.bcount = size; 159 wd->sc_wdc_bio.databuf = (caddr_t)addr; 160 wd->sc_wdc_bio.wd = wd; 161 162 bzero(&my->xfer, sizeof my->xfer); 163 xfer->c_flags |= C_PRIVATEXFER; /* Our xfer is totally private */ 164 xfer->c_flags |= C_POLL; 165 xfer->drive = wd->drvp->drive; 166 xfer->cmd = ata_bio; 167 xfer->databuf = ata_bio->databuf; 168 xfer->c_bcount = ata_bio->bcount; 169 xfer->c_start = wdc_ata_bio_start; 170 xfer->c_intr = wdc_ata_bio_intr; 171 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 172 wdc_exec_xfer(chp, xfer); 173 return (ata_bio->flags & ATA_ITSDONE) ? 0 : EIO; 174 } 175 #endif /* HIBERNATE */ 176 177 /* 178 * Handle block I/O operation. Return WDC_COMPLETE, WDC_QUEUED, or 179 * WDC_TRY_AGAIN. Must be called at splbio(). 180 */ 181 int 182 wdc_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 183 { 184 struct wdc_xfer *xfer; 185 struct channel_softc *chp = drvp->chnl_softc; 186 187 xfer = wdc_get_xfer(WDC_NOSLEEP); 188 if (xfer == NULL) 189 return WDC_TRY_AGAIN; 190 if (ata_bio->flags & ATA_POLL) 191 xfer->c_flags |= C_POLL; 192 if (!(ata_bio->flags & ATA_POLL) && 193 (drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 194 (ata_bio->flags & ATA_SINGLE) == 0 && 195 (ata_bio->bcount > 512 || 196 (chp->wdc->quirks & WDC_QUIRK_NOSHORTDMA) == 0)) 197 xfer->c_flags |= C_DMA; 198 xfer->drive = drvp->drive; 199 xfer->cmd = ata_bio; 200 xfer->databuf = ata_bio->databuf; 201 xfer->c_bcount = ata_bio->bcount; 202 xfer->c_start = wdc_ata_bio_start; 203 xfer->c_intr = wdc_ata_bio_intr; 204 xfer->c_kill_xfer = wdc_ata_bio_kill_xfer; 205 wdc_exec_xfer(chp, xfer); 206 return (ata_bio->flags & ATA_ITSDONE) ? WDC_COMPLETE : WDC_QUEUED; 207 } 208 209 void 210 wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer) 211 { 212 struct ata_bio *ata_bio = xfer->cmd; 213 WDCDEBUG_PRINT(("wdc_ata_bio_start %s:%d:%d\n", 214 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 215 DEBUG_XFERS); 216 217 /* start timeout machinery */ 218 if ((ata_bio->flags & ATA_POLL) == 0) 219 timeout_add_msec(&chp->ch_timo, ATA_DELAY); 220 _wdc_ata_bio_start(chp, xfer); 221 } 222 223 void 224 _wdc_ata_bio_start(struct channel_softc *chp, struct wdc_xfer *xfer) 225 { 226 struct ata_bio *ata_bio = xfer->cmd; 227 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 228 u_int16_t cyl; 229 u_int8_t head, sect, cmd = 0; 230 int nblks; 231 int ata_delay; 232 int error, dma_flags = 0; 233 234 WDCDEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n", 235 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 236 DEBUG_INTR | DEBUG_XFERS); 237 /* Do control operations specially. */ 238 if (drvp->state < READY) { 239 /* 240 * Actually, we want to be careful not to mess with the control 241 * state if the device is currently busy, but we can assume 242 * that we never get to this point if that's the case. 243 */ 244 /* at this point, we should only be in RECAL state */ 245 if (drvp->state != RECAL) { 246 printf("%s:%d:%d: bad state %d in _wdc_ata_bio_start\n", 247 chp->wdc->sc_dev.dv_xname, chp->channel, 248 xfer->drive, drvp->state); 249 panic("_wdc_ata_bio_start: bad state"); 250 } 251 xfer->c_intr = wdc_ata_ctrl_intr; 252 wdc_set_drive(chp, xfer->drive); 253 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, ATA_DELAY) != 0) 254 goto timeout; 255 wdccommandshort(chp, xfer->drive, WDCC_RECAL); 256 drvp->state = RECAL_WAIT; 257 if ((ata_bio->flags & ATA_POLL) == 0) { 258 chp->ch_flags |= WDCF_IRQ_WAIT; 259 } else { 260 /* Wait for at last 400ns for status bit to be valid */ 261 DELAY(1); 262 wdc_ata_ctrl_intr(chp, xfer, 0); 263 } 264 return; 265 } 266 267 if (xfer->c_flags & C_DMA) { 268 if (drvp->n_xfers <= NXFER) 269 drvp->n_xfers++; 270 dma_flags = (ata_bio->flags & ATA_READ) ? WDC_DMA_READ : 0; 271 if (ata_bio->flags & ATA_LBA48) 272 dma_flags |= WDC_DMA_LBA48; 273 } 274 if (ata_bio->flags & ATA_SINGLE) 275 ata_delay = ATA_DELAY; 276 else 277 ata_delay = ATA_DELAY; 278 again: 279 /* 280 * 281 * When starting a multi-sector transfer, or doing single-sector 282 * transfers... 283 */ 284 if (xfer->c_skip == 0 || (ata_bio->flags & ATA_SINGLE) != 0) { 285 if (ata_bio->flags & ATA_SINGLE) 286 nblks = 1; 287 else 288 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 289 if (ata_bio->flags & ATA_LBA) { 290 sect = (ata_bio->blkno >> 0) & 0xff; 291 cyl = (ata_bio->blkno >> 8) & 0xffff; 292 head = (ata_bio->blkno >> 24) & 0x0f; 293 head |= WDSD_LBA; 294 } else { 295 int blkno = ata_bio->blkno; 296 sect = blkno % ata_bio->lp->d_nsectors; 297 sect++; /* Sectors begin with 1, not 0. */ 298 blkno /= ata_bio->lp->d_nsectors; 299 head = blkno % ata_bio->lp->d_ntracks; 300 blkno /= ata_bio->lp->d_ntracks; 301 cyl = blkno; 302 head |= WDSD_CHS; 303 } 304 if (xfer->c_flags & C_DMA) { 305 ata_bio->nblks = nblks; 306 ata_bio->nbytes = xfer->c_bcount; 307 if (ata_bio->flags & ATA_LBA48) 308 cmd = (ata_bio->flags & ATA_READ) ? 309 WDCC_READDMA_EXT : WDCC_WRITEDMA_EXT; 310 else 311 cmd = (ata_bio->flags & ATA_READ) ? 312 WDCC_READDMA : WDCC_WRITEDMA; 313 /* Init the DMA channel. */ 314 error = (*chp->wdc->dma_init)(chp->wdc->dma_arg, 315 chp->channel, xfer->drive, 316 (char *)xfer->databuf + xfer->c_skip, 317 ata_bio->nbytes, dma_flags); 318 if (error) { 319 if (error == EINVAL) { 320 /* 321 * We can't do DMA on this transfer 322 * for some reason. Fall back to 323 * PIO. 324 */ 325 xfer->c_flags &= ~C_DMA; 326 error = 0; 327 goto do_pio; 328 } 329 ata_bio->error = ERR_DMA; 330 ata_bio->r_error = 0; 331 wdc_ata_bio_done(chp, xfer); 332 return; 333 } 334 /* Initiate command */ 335 wdc_set_drive(chp, xfer->drive); 336 if (wait_for_ready(chp, ata_delay) < 0) 337 goto timeout; 338 339 /* start the DMA channel (before) */ 340 if (chp->ch_flags & WDCF_DMA_BEFORE_CMD) 341 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 342 chp->channel, xfer->drive); 343 344 if (ata_bio->flags & ATA_LBA48) { 345 wdccommandext(chp, xfer->drive, cmd, 346 (u_int64_t)ata_bio->blkno, nblks); 347 } else { 348 wdccommand(chp, xfer->drive, cmd, cyl, 349 head, sect, nblks, 0); 350 } 351 352 /* start the DMA channel (after) */ 353 if ((chp->ch_flags & WDCF_DMA_BEFORE_CMD) == 0) 354 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 355 chp->channel, xfer->drive); 356 357 chp->ch_flags |= WDCF_DMA_WAIT; 358 /* wait for irq */ 359 goto intr; 360 } /* else not DMA */ 361 do_pio: 362 ata_bio->nblks = min(nblks, ata_bio->multi); 363 ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize; 364 KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0); 365 if (ata_bio->nblks > 1) { 366 if (ata_bio->flags & ATA_LBA48) 367 cmd = (ata_bio->flags & ATA_READ) ? 368 WDCC_READMULTI_EXT : WDCC_WRITEMULTI_EXT; 369 else 370 cmd = (ata_bio->flags & ATA_READ) ? 371 WDCC_READMULTI : WDCC_WRITEMULTI; 372 } else { 373 if (ata_bio->flags & ATA_LBA48) 374 cmd = (ata_bio->flags & ATA_READ) ? 375 WDCC_READ_EXT : WDCC_WRITE_EXT; 376 else 377 cmd = (ata_bio->flags & ATA_READ) ? 378 WDCC_READ : WDCC_WRITE; 379 } 380 /* Initiate command! */ 381 wdc_set_drive(chp, xfer->drive); 382 if (wait_for_ready(chp, ata_delay) < 0) 383 goto timeout; 384 if (ata_bio->flags & ATA_LBA48) { 385 wdccommandext(chp, xfer->drive, cmd, 386 (u_int64_t)ata_bio->blkno, nblks); 387 } else { 388 wdccommand(chp, xfer->drive, cmd, cyl, 389 head, sect, nblks, 390 (ata_bio->lp->d_type == DTYPE_ST506) ? 391 ata_bio->lp->d_precompcyl / 4 : 0); 392 } 393 } else if (ata_bio->nblks > 1) { 394 /* The number of blocks in the last stretch may be smaller. */ 395 nblks = xfer->c_bcount / ata_bio->lp->d_secsize; 396 if (ata_bio->nblks > nblks) { 397 ata_bio->nblks = nblks; 398 ata_bio->nbytes = xfer->c_bcount; 399 } 400 } 401 /* If this was a write and not using DMA, push the data. */ 402 if ((ata_bio->flags & ATA_READ) == 0) { 403 if (wait_for_drq(chp, ata_delay) != 0) { 404 printf("%s:%d:%d: timeout waiting for DRQ, " 405 "st=0x%b, err=0x%02x\n", 406 chp->wdc->sc_dev.dv_xname, chp->channel, 407 xfer->drive, chp->ch_status, WDCS_BITS, 408 chp->ch_error); 409 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 410 ata_bio->error = TIMEOUT; 411 wdc_ata_bio_done(chp, xfer); 412 return; 413 } 414 if (wdc_ata_err(drvp, ata_bio) == WDC_ATA_ERR) { 415 wdc_ata_bio_done(chp, xfer); 416 return; 417 } 418 wdc_output_bytes(drvp, (char *)xfer->databuf + xfer->c_skip, 419 ata_bio->nbytes); 420 } 421 422 intr: /* Wait for IRQ (either real or polled) */ 423 if ((ata_bio->flags & ATA_POLL) == 0) { 424 chp->ch_flags |= WDCF_IRQ_WAIT; 425 } else { 426 /* Wait for at last 400ns for status bit to be valid */ 427 delay(1); 428 if (chp->ch_flags & WDCF_DMA_WAIT) { 429 wdc_dmawait(chp, xfer, ATA_DELAY); 430 chp->ch_flags &= ~WDCF_DMA_WAIT; 431 } 432 wdc_ata_bio_intr(chp, xfer, 0); 433 if ((ata_bio->flags & ATA_ITSDONE) == 0) 434 goto again; 435 } 436 return; 437 timeout: 438 if (chp->ch_status == 0xff) 439 return; 440 printf("%s:%d:%d: not ready, st=0x%b, err=0x%02x\n", 441 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 442 chp->ch_status, WDCS_BITS, chp->ch_error); 443 if (wdc_ata_err(drvp, ata_bio) != WDC_ATA_ERR) 444 ata_bio->error = TIMEOUT; 445 wdc_ata_bio_done(chp, xfer); 446 return; 447 } 448 449 int 450 wdc_ata_bio_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq) 451 { 452 struct ata_bio *ata_bio = xfer->cmd; 453 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 454 int drv_err; 455 456 WDCDEBUG_PRINT(("wdc_ata_bio_intr %s:%d:%d\n", 457 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive), 458 DEBUG_INTR | DEBUG_XFERS); 459 460 461 /* Is it not a transfer, but a control operation? */ 462 if (drvp->state < READY) { 463 printf("%s:%d:%d: bad state %d in wdc_ata_bio_intr\n", 464 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 465 drvp->state); 466 panic("wdc_ata_bio_intr: bad state"); 467 } 468 469 /* 470 * reset on timeout. This will cause extra resets in the case 471 * of occasional lost interrupts 472 */ 473 if (xfer->c_flags & C_TIMEOU) 474 goto timeout; 475 476 /* Ack interrupt done by wait_for_unbusy */ 477 if (wait_for_unbusy(chp, 478 (irq == 0) ? ATA_DELAY : 0) < 0) { 479 if (irq) 480 return 0; /* IRQ was not for us */ 481 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip%d\n", 482 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 483 xfer->c_bcount, xfer->c_skip); 484 485 goto timeout; 486 } 487 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 488 chp->wdc->irqack(chp); 489 490 drv_err = wdc_ata_err(drvp, ata_bio); 491 492 if (xfer->c_flags & C_DMA) { 493 if (chp->wdc->dma_status != 0) { 494 if (drv_err != WDC_ATA_ERR) { 495 ata_bio->error = ERR_DMA; 496 drv_err = WDC_ATA_ERR; 497 } 498 } 499 if (chp->ch_status & WDCS_DRQ) { 500 if (drv_err != WDC_ATA_ERR) { 501 printf("%s:%d:%d: intr with DRQ (st=0x%b)\n", 502 chp->wdc->sc_dev.dv_xname, chp->channel, 503 xfer->drive, chp->ch_status, WDCS_BITS); 504 ata_bio->error = TIMEOUT; 505 drv_err = WDC_ATA_ERR; 506 } 507 } 508 if (drv_err != WDC_ATA_ERR) 509 goto end; 510 ata_dmaerr(drvp); 511 } 512 513 /* if we had an error, end */ 514 if (drv_err == WDC_ATA_ERR) { 515 wdc_ata_bio_done(chp, xfer); 516 return 1; 517 } 518 519 /* If this was a read and not using DMA, fetch the data. */ 520 if ((ata_bio->flags & ATA_READ) != 0) { 521 if ((chp->ch_status & WDCS_DRQ) != WDCS_DRQ) { 522 printf("%s:%d:%d: read intr before drq\n", 523 chp->wdc->sc_dev.dv_xname, chp->channel, 524 xfer->drive); 525 ata_bio->error = TIMEOUT; 526 wdc_ata_bio_done(chp, xfer); 527 return 1; 528 } 529 wdc_input_bytes(drvp, (char *)xfer->databuf + xfer->c_skip, 530 ata_bio->nbytes); 531 } 532 end: 533 ata_bio->blkno += ata_bio->nblks; 534 ata_bio->blkdone += ata_bio->nblks; 535 xfer->c_skip += ata_bio->nbytes; 536 xfer->c_bcount -= ata_bio->nbytes; 537 /* See if this transfer is complete. */ 538 if (xfer->c_bcount > 0) { 539 if ((ata_bio->flags & ATA_POLL) == 0) { 540 /* Start the next operation */ 541 _wdc_ata_bio_start(chp, xfer); 542 } else { 543 /* Let _wdc_ata_bio_start do the loop */ 544 return 1; 545 } 546 } else { /* Done with this transfer */ 547 ata_bio->error = NOERROR; 548 wdc_ata_bio_done(chp, xfer); 549 } 550 return 1; 551 552 timeout: 553 if (xfer->c_flags & C_DMA) 554 ata_dmaerr(drvp); 555 556 ata_bio->error = TIMEOUT; 557 wdc_ata_bio_done(chp, xfer); 558 return 1; 559 } 560 561 void 562 wdc_ata_bio_kill_xfer(struct channel_softc *chp, struct wdc_xfer *xfer) 563 { 564 struct ata_bio *ata_bio = xfer->cmd; 565 566 timeout_del(&chp->ch_timo); 567 /* remove this command from xfer queue */ 568 wdc_free_xfer(chp, xfer); 569 570 ata_bio->flags |= ATA_ITSDONE; 571 ata_bio->error = ERR_NODEV; 572 ata_bio->r_error = WDCE_ABRT; 573 if ((ata_bio->flags & ATA_POLL) == 0) { 574 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 575 wddone(ata_bio->wd); 576 } 577 } 578 579 void 580 wdc_ata_bio_done(struct channel_softc *chp, struct wdc_xfer *xfer) 581 { 582 struct ata_bio *ata_bio = xfer->cmd; 583 584 WDCDEBUG_PRINT(("wdc_ata_bio_done %s:%d:%d: flags 0x%x\n", 585 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 586 (u_int)xfer->c_flags), 587 DEBUG_XFERS); 588 589 if ((xfer->c_flags & C_PRIVATEXFER) == 0) 590 timeout_del(&chp->ch_timo); 591 592 /* feed back residual bcount to our caller */ 593 ata_bio->bcount = xfer->c_bcount; 594 595 /* remove this command from xfer queue */ 596 wdc_free_xfer(chp, xfer); 597 598 ata_bio->flags |= ATA_ITSDONE; 599 if ((ata_bio->flags & ATA_POLL) == 0) { 600 WDCDEBUG_PRINT(("wdc_ata_done: wddone\n"), DEBUG_XFERS); 601 wddone(ata_bio->wd); 602 } 603 WDCDEBUG_PRINT(("wdcstart from wdc_ata_done, flags 0x%x\n", 604 chp->ch_flags), DEBUG_XFERS); 605 wdcstart(chp); 606 } 607 608 /* 609 * Implement operations needed before read/write. 610 */ 611 int 612 wdc_ata_ctrl_intr(struct channel_softc *chp, struct wdc_xfer *xfer, int irq) 613 { 614 struct ata_bio *ata_bio = xfer->cmd; 615 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 616 char *errstring = NULL; 617 int delay = (irq == 0) ? ATA_DELAY : 0; 618 619 WDCDEBUG_PRINT(("wdc_ata_ctrl_intr: state %d\n", drvp->state), 620 DEBUG_FUNCS); 621 622 again: 623 switch (drvp->state) { 624 case RECAL: /* Should not be in this state here */ 625 panic("wdc_ata_ctrl_intr: state==RECAL"); 626 break; 627 628 case RECAL_WAIT: 629 errstring = "recal"; 630 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 631 goto timeout; 632 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 633 chp->wdc->irqack(chp); 634 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 635 goto error; 636 /* FALLTHROUGH */ 637 638 case PIOMODE: 639 /* Don't try to set modes if controller can't be adjusted */ 640 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 641 goto geometry; 642 /* Also don't try if the drive didn't report its mode */ 643 if ((drvp->drive_flags & DRIVE_MODE) == 0) 644 goto geometry; 645 /* SET FEATURES 0x08 is only for PIO mode > 2 */ 646 if (drvp->PIO_mode <= 2) 647 goto geometry; 648 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 649 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 650 drvp->state = PIOMODE_WAIT; 651 break; 652 653 case PIOMODE_WAIT: 654 errstring = "piomode"; 655 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 656 goto timeout; 657 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 658 chp->wdc->irqack(chp); 659 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 660 goto error; 661 /* FALLTHROUGH */ 662 663 case DMAMODE: 664 if (drvp->drive_flags & DRIVE_UDMA) { 665 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 666 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 667 } else if (drvp->drive_flags & DRIVE_DMA) { 668 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 669 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 670 } else { 671 goto geometry; 672 } 673 drvp->state = DMAMODE_WAIT; 674 break; 675 case DMAMODE_WAIT: 676 errstring = "dmamode"; 677 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 678 goto timeout; 679 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 680 chp->wdc->irqack(chp); 681 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 682 goto error; 683 /* FALLTHROUGH */ 684 685 case GEOMETRY: 686 geometry: 687 if (ata_bio->flags & ATA_LBA) 688 goto multimode; 689 wdccommand(chp, xfer->drive, WDCC_IDP, 690 ata_bio->lp->d_ncylinders, 691 ata_bio->lp->d_ntracks - 1, 0, ata_bio->lp->d_nsectors, 692 (ata_bio->lp->d_type == DTYPE_ST506) ? 693 ata_bio->lp->d_precompcyl / 4 : 0); 694 drvp->state = GEOMETRY_WAIT; 695 break; 696 697 case GEOMETRY_WAIT: 698 errstring = "geometry"; 699 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 700 goto timeout; 701 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 702 chp->wdc->irqack(chp); 703 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 704 goto error; 705 /* FALLTHROUGH */ 706 707 case MULTIMODE: 708 multimode: 709 if (ata_bio->multi == 1) 710 goto ready; 711 wdccommand(chp, xfer->drive, WDCC_SETMULTI, 0, 0, 0, 712 ata_bio->multi, 0); 713 drvp->state = MULTIMODE_WAIT; 714 break; 715 716 case MULTIMODE_WAIT: 717 errstring = "setmulti"; 718 if (wdcwait(chp, WDCS_DRDY, WDCS_DRDY, delay)) 719 goto timeout; 720 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 721 chp->wdc->irqack(chp); 722 if (chp->ch_status & (WDCS_ERR | WDCS_DWF)) 723 goto error; 724 /* FALLTHROUGH */ 725 726 case READY: 727 ready: 728 drvp->state = READY; 729 /* 730 * The drive is usable now 731 */ 732 xfer->c_intr = wdc_ata_bio_intr; 733 _wdc_ata_bio_start(chp, xfer); 734 return 1; 735 } 736 737 if ((ata_bio->flags & ATA_POLL) == 0) { 738 chp->ch_flags |= WDCF_IRQ_WAIT; 739 } else { 740 goto again; 741 } 742 return 1; 743 744 timeout: 745 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 746 return 0; /* IRQ was not for us */ 747 } 748 printf("%s:%d:%d: %s timed out\n", 749 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 750 ata_bio->error = TIMEOUT; 751 drvp->state = 0; 752 wdc_ata_bio_done(chp, xfer); 753 return 0; 754 error: 755 printf("%s:%d:%d: %s ", 756 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 757 errstring); 758 if (chp->ch_status & WDCS_DWF) { 759 printf("drive fault\n"); 760 ata_bio->error = ERR_DF; 761 } else { 762 printf("error (%x)\n", chp->ch_error); 763 ata_bio->r_error = chp->ch_error; 764 ata_bio->error = ERROR; 765 } 766 drvp->state = 0; 767 wdc_ata_bio_done(chp, xfer); 768 return 1; 769 } 770 771 int 772 wdc_ata_err(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 773 { 774 struct channel_softc *chp = drvp->chnl_softc; 775 ata_bio->error = 0; 776 777 if (chp->ch_status == 0xff) { 778 ata_bio->error = ERR_NODEV; 779 return WDC_ATA_ERR; 780 } 781 if (chp->ch_status & WDCS_BSY) { 782 ata_bio->error = TIMEOUT; 783 return WDC_ATA_ERR; 784 } 785 786 if (chp->ch_status & WDCS_DWF) { 787 ata_bio->error = ERR_DF; 788 return WDC_ATA_ERR; 789 } 790 791 if (chp->ch_status & WDCS_ERR) { 792 ata_bio->error = ERROR; 793 ata_bio->r_error = chp->ch_error; 794 if (drvp->drive_flags & DRIVE_UDMA && 795 (ata_bio->r_error & WDCE_CRC)) { 796 /* 797 * Record the CRC error, to avoid downgrading to 798 * multiword DMA 799 */ 800 drvp->drive_flags |= DRIVE_DMAERR; 801 } 802 if (ata_bio->r_error & (WDCE_BBK | WDCE_UNC | WDCE_IDNF | 803 WDCE_ABRT | WDCE_TK0NF | WDCE_AMNF)) 804 return WDC_ATA_ERR; 805 return WDC_ATA_NOERR; 806 } 807 808 if (chp->ch_status & WDCS_CORR) 809 ata_bio->flags |= ATA_CORR; 810 return WDC_ATA_NOERR; 811 } 812 813 #if 0 814 int 815 wdc_ata_addref(drvp) 816 struct ata_drive_datas *drvp; 817 { 818 struct channel_softc *chp = drvp->chnl_softc; 819 820 return (wdc_addref(chp)); 821 } 822 823 void 824 wdc_ata_delref(drvp) 825 struct ata_drive_datas *drvp; 826 { 827 struct channel_softc *chp = drvp->chnl_softc; 828 829 wdc_delref(chp); 830 } 831 #endif 832