1 /* $OpenBSD: if_le_dec.c,v 1.6 2014/12/22 02:28:51 tedu Exp $ */ 2 /* $NetBSD: if_le_dec.c,v 1.12 2001/11/13 12:49:45 lukem Exp $ */ 3 4 /*- 5 * Copyright (c) 1997 Jonathan Stone. All rights reserved. 6 * Copyright (c) 1995 Charles M. Hannum. All rights reserved. 7 * Copyright (c) 1992, 1993 8 * The Regents of the University of California. All rights reserved. 9 * 10 * This code is derived from software contributed to Berkeley by 11 * Ralph Campbell and Rick Macklem. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 3. Neither the name of the University nor the names of its contributors 22 * may be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * @(#)if_le.c 8.2 (Berkeley) 11/16/93 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/mbuf.h> 43 #include <sys/syslog.h> 44 #include <sys/socket.h> 45 #include <sys/device.h> 46 47 #include <net/if.h> 48 #include <net/if_media.h> 49 50 #include <netinet/in.h> 51 #include <netinet/if_ether.h> 52 53 #include <dev/ic/lancereg.h> 54 #include <dev/ic/lancevar.h> 55 #include <dev/ic/am7990reg.h> 56 #include <dev/ic/am7990var.h> 57 58 #include <dev/tc/if_levar.h> 59 #include <dev/tc/tcvar.h> 60 61 #include <machine/bus.h> 62 63 /* access LANCE registers */ 64 void le_dec_writereg(volatile u_short *regptr, u_short val); 65 #define LERDWR(cntl, src, dst) { (dst) = (src); tc_mb(); } 66 #define LEWREG(src, dst) le_dec_writereg(&(dst), (src)) 67 68 void le_dec_wrcsr(struct lance_softc *, u_int16_t, u_int16_t); 69 u_int16_t le_dec_rdcsr(struct lance_softc *, u_int16_t); 70 71 void 72 dec_le_common_attach(struct am7990_softc *sc, u_char *eap) 73 { 74 struct lance_softc *lsc = &sc->lsc; 75 int i; 76 77 lsc->sc_rdcsr = le_dec_rdcsr; 78 lsc->sc_wrcsr = le_dec_wrcsr; 79 lsc->sc_hwinit = NULL; 80 81 lsc->sc_conf3 = 0; 82 lsc->sc_addr = 0; 83 lsc->sc_memsize = 65536; 84 85 /* 86 * Get the ethernet address out of rom 87 */ 88 for (i = 0; i < sizeof(lsc->sc_arpcom.ac_enaddr); i++) { 89 lsc->sc_arpcom.ac_enaddr[i] = *eap; 90 eap += 4; 91 } 92 93 am7990_config(sc); 94 } 95 96 void 97 le_dec_wrcsr(struct lance_softc *sc, u_int16_t port, u_int16_t val) 98 { 99 struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; 100 101 LEWREG(port, ler1->ler1_rap); 102 LERDWR(port, val, ler1->ler1_rdp); 103 } 104 105 u_int16_t 106 le_dec_rdcsr(struct lance_softc *sc, u_int16_t port) 107 { 108 struct lereg1 *ler1 = ((struct le_softc *)sc)->sc_r1; 109 u_int16_t val; 110 111 LEWREG(port, ler1->ler1_rap); 112 LERDWR(0, ler1->ler1_rdp, val); 113 return (val); 114 } 115 116 /* 117 * Write a lance register port, reading it back to ensure success. This seems 118 * to be necessary during initialization, since the chip appears to be a bit 119 * pokey sometimes. 120 */ 121 void 122 le_dec_writereg(volatile u_short *regptr, u_short val) 123 { 124 int i = 0; 125 126 while (*regptr != val) { 127 *regptr = val; 128 tc_mb(); 129 if (++i > 10000) { 130 printf("le: Reg did not settle (to x%x): x%x\n", val, 131 *regptr); 132 return; 133 } 134 DELAY(100); 135 } 136 } 137 138 /* 139 * Routines for accessing the transmit and receive buffers are provided 140 * by lance.c, because of the LE_NEED_BUF_* macros defined above. 141 * Unfortunately, CPU addressing of these buffers is done in one of 142 * 3 ways: 143 * - contiguous (for the 3max and turbochannel option card) 144 * - gap2, which means shorts (2 bytes) interspersed with short (2 byte) 145 * spaces (for the pmax, vax 3400, and ioasic LANCE descriptors) 146 * - gap16, which means 16bytes interspersed with 16byte spaces 147 * for buffers which must begin on a 32byte boundary (for 3min, maxine, 148 * and alpha) 149 * The buffer offset is the logical byte offset, assuming contiguous storage. 150 */ 151