1 /* Public Domain */ 2 3 #define RK3399_PLL_CPLL 4 4 #define RK3399_PLL_GPLL 5 5 #define RK3399_PLL_NPLL 6 6 7 #define RK3399_CLK_SDMMC 76 8 #define RK3399_CLK_EMMC 78 9 #define RK3399_CLK_UART0 81 10 #define RK3399_CLK_UART1 82 11 #define RK3399_CLK_UART2 83 12 #define RK3399_CLK_UART3 84 13 #define RK3399_CLK_MAC_RX 103 14 #define RK3399_CLK_MAC_TX 104 15 #define RK3399_CLK_MAC 105 16 17 #define RK3399_CLK_SDMMC_DRV 154 18 #define RK3399_CLK_SDMMC_SAMPLE 155 19 20 #define RK3399_ACLK_GMAC 213 21 #define RK3399_ACLK_EMMC 240 22 23 #define RK3399_PCLK_GMAC 358 24 25 #define RK3399_HCLK_HOST0 456 26 #define RK3399_HCLK_HOST0_ARB 457 27 #define RK3399_HCLK_HOST1 458 28 #define RK3399_HCLK_HOST1_ARB 459 29 30 #define RK3399_HCLK_SDMMC 462 31