xref: /openbsd/sys/dev/i2c/pcf8523.c (revision 097a140d)
1 /*	$OpenBSD: pcf8523.c,v 1.5 2021/04/24 10:15:15 mpi Exp $	*/
2 
3 /*
4  * Copyright (c) 2005 Kimihiro Nonaka
5  * Copyright (c) 2016 Mark Kettenis
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
21  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  * POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/device.h>
33 #include <sys/kernel.h>
34 #include <sys/fcntl.h>
35 #include <sys/uio.h>
36 #include <sys/conf.h>
37 #include <sys/event.h>
38 
39 #include <dev/clock_subr.h>
40 
41 #include <dev/i2c/i2cvar.h>
42 
43 /*
44  * PCF8523 Real-Time Clock
45  */
46 
47 #define	PCF8523_ADDR		0x68	/* Fixed I2C Slave Address */
48 
49 #define PCF8523_CONTROL1	0x00
50 #define PCF8523_CONTROL2	0x01
51 #define PCF8523_CONTROL3	0x02
52 #define PCF8523_SECONDS		0x03
53 #define PCF8523_MINUTES		0x04
54 #define PCF8523_HOURS		0x05
55 #define PCF8523_DAY		0x06
56 #define PCF8523_WDAY		0x07
57 #define PCF8523_MONTH		0x08
58 #define PCF8523_YEAR		0x09
59 #define PCF8523_ALARM_MIN	0x0a
60 #define PCF8523_ALARM_HOUR	0x0b
61 #define PCF8523_ALARM_DAY	0x0c
62 #define PCF8523_ALARM_WDAY	0x0d
63 #define PCF8523_OFFSET		0x0e
64 
65 #define	PCF8523_NREGS		20
66 #define	PCF8523_NRTC_REGS	7
67 
68 /*
69  * Bit definitions.
70  */
71 #define	PCF8523_CONTROL1_12_24	(1 << 3)
72 #define	PCF8523_CONTROL1_STOP	(1 << 5)
73 #define	PCF8523_CONTROL3_PM_MASK 0xe0
74 #define PCF8523_CONTROL3_PM_BLD	(1 << 7)
75 #define PCF8523_CONTROL3_PM_VDD	(1 << 6)
76 #define PCF8523_CONTROL3_PM_DSM	(1 << 5)
77 #define PCF8523_CONTROL3_BLF	(1 << 2)
78 #define	PCF8523_SECONDS_MASK	0x7f
79 #define	PCF8523_SECONDS_OS	(1 << 7)
80 #define	PCF8523_MINUTES_MASK	0x7f
81 #define	PCF8523_HOURS_12HRS_PM	(1 << 5)	/* If 12 hr mode, set = PM */
82 #define	PCF8523_HOURS_12MASK	0x1f
83 #define	PCF8523_HOURS_24MASK	0x3f
84 #define	PCF8523_DAY_MASK	0x3f
85 #define	PCF8523_WDAY_MASK	0x07
86 #define	PCF8523_MONTH_MASK	0x1f
87 
88 struct pcfrtc_softc {
89 	struct device sc_dev;
90 	i2c_tag_t sc_tag;
91 	int sc_address;
92 	struct todr_chip_handle sc_todr;
93 };
94 
95 int pcfrtc_match(struct device *, void *, void *);
96 void pcfrtc_attach(struct device *, struct device *, void *);
97 
98 struct cfattach pcfrtc_ca = {
99 	sizeof(struct pcfrtc_softc), pcfrtc_match, pcfrtc_attach
100 };
101 
102 struct cfdriver pcfrtc_cd = {
103 	NULL, "pcfrtc", DV_DULL
104 };
105 
106 uint8_t pcfrtc_reg_read(struct pcfrtc_softc *, int);
107 void pcfrtc_reg_write(struct pcfrtc_softc *, int, uint8_t);
108 int pcfrtc_clock_read(struct pcfrtc_softc *, struct clock_ymdhms *);
109 int pcfrtc_clock_write(struct pcfrtc_softc *, struct clock_ymdhms *);
110 int pcfrtc_gettime(struct todr_chip_handle *, struct timeval *);
111 int pcfrtc_settime(struct todr_chip_handle *, struct timeval *);
112 
113 int
114 pcfrtc_match(struct device *parent, void *v, void *arg)
115 {
116 	struct i2c_attach_args *ia = arg;
117 
118 	if (strcmp(ia->ia_name, "nxp,pcf8523") == 0 &&
119 	    ia->ia_addr == PCF8523_ADDR)
120 		return (1);
121 
122 	return (0);
123 }
124 
125 void
126 pcfrtc_attach(struct device *parent, struct device *self, void *arg)
127 {
128 	struct pcfrtc_softc *sc = (struct pcfrtc_softc *)self;
129 	struct i2c_attach_args *ia = arg;
130 	uint8_t reg;
131 
132 	sc->sc_tag = ia->ia_tag;
133 	sc->sc_address = ia->ia_addr;
134 	sc->sc_todr.cookie = sc;
135 	sc->sc_todr.todr_gettime = pcfrtc_gettime;
136 	sc->sc_todr.todr_settime = pcfrtc_settime;
137 	sc->sc_todr.todr_setwen = NULL;
138 
139 #if 0
140 	todr_attach(&sc->sc_todr);
141 #else
142 	/* XXX */
143 	{
144 	extern todr_chip_handle_t todr_handle;
145 	todr_handle = &sc->sc_todr;
146 	}
147 #endif
148 
149 	/*
150 	 * Enable battery switch-over and battery low detection in
151 	 * standard mode, and switch to 24 hour mode.
152 	 */
153 	reg = pcfrtc_reg_read(sc, PCF8523_CONTROL3);
154 	reg &= ~PCF8523_CONTROL3_PM_MASK;
155 	pcfrtc_reg_write(sc, PCF8523_CONTROL3, reg);
156 	reg = pcfrtc_reg_read(sc, PCF8523_CONTROL1);
157 	reg &= ~PCF8523_CONTROL1_12_24;
158 	reg &= ~PCF8523_CONTROL1_STOP;
159 	pcfrtc_reg_write(sc, PCF8523_CONTROL1, reg);
160 
161 	/* Report battery status. */
162 	reg = pcfrtc_reg_read(sc, PCF8523_CONTROL3);
163 	printf(": battery %s\n", (reg & PCF8523_CONTROL3_BLF) ? "low" : "ok");
164 }
165 
166 int
167 pcfrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
168 {
169 	struct pcfrtc_softc *sc = ch->cookie;
170 	struct clock_ymdhms dt;
171 
172 	memset(&dt, 0, sizeof(dt));
173 	if (pcfrtc_clock_read(sc, &dt) == 0)
174 		return (-1);
175 
176 	tv->tv_sec = clock_ymdhms_to_secs(&dt);
177 	tv->tv_usec = 0;
178 	return (0);
179 }
180 
181 int
182 pcfrtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
183 {
184 	struct pcfrtc_softc *sc = ch->cookie;
185 	struct clock_ymdhms dt;
186 	uint8_t reg;
187 
188 	clock_secs_to_ymdhms(tv->tv_sec, &dt);
189 	if (pcfrtc_clock_write(sc, &dt) == 0)
190 		return (-1);
191 
192 	/* Clear OS flag.  */
193 	reg = pcfrtc_reg_read(sc, PCF8523_SECONDS);
194 	if (reg & PCF8523_SECONDS_OS) {
195 		reg &= ~PCF8523_SECONDS_OS;
196 		pcfrtc_reg_write(sc, PCF8523_SECONDS, reg);
197 	}
198 
199 	return (0);
200 }
201 
202 uint8_t
203 pcfrtc_reg_read(struct pcfrtc_softc *sc, int reg)
204 {
205 	uint8_t cmd = reg;
206 	uint8_t val;
207 
208 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
209 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
210 	    NULL, 0, &cmd, sizeof cmd, I2C_F_POLL) ||
211 	    iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
212 	    NULL, 0, &val, sizeof val, I2C_F_POLL)) {
213 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
214 		printf("%s: pcfrtc_reg_read: failed to read reg%d\n",
215 		    sc->sc_dev.dv_xname, reg);
216 		return 0;
217 	}
218 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
219 	return val;
220 }
221 
222 void
223 pcfrtc_reg_write(struct pcfrtc_softc *sc, int reg, uint8_t val)
224 {
225 	uint8_t cmd = reg;
226 
227 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
228 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
229 	    &cmd, sizeof cmd, &val, sizeof val, I2C_F_POLL)) {
230 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
231 		printf("%s: pcfrtc_reg_write: failed to write reg%d\n",
232 		    sc->sc_dev.dv_xname, reg);
233 		return;
234 	}
235 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
236 }
237 
238 int
239 pcfrtc_clock_read(struct pcfrtc_softc *sc, struct clock_ymdhms *dt)
240 {
241 	uint8_t regs[PCF8523_NRTC_REGS];
242 	uint8_t cmd = PCF8523_SECONDS;
243 
244 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
245 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
246 	    NULL, 0, &cmd, sizeof cmd, I2C_F_POLL) ||
247 	    iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
248 	    NULL, 0, regs, PCF8523_NRTC_REGS, I2C_F_POLL)) {
249 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
250 		printf("%s: pcfrtc_clock_read: failed to read rtc\n",
251 		    sc->sc_dev.dv_xname);
252 		return (0);
253 	}
254 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
255 
256 	/*
257 	 * Convert the PCF8523's register values into something useable
258 	 */
259 	dt->dt_sec = FROMBCD(regs[0] & PCF8523_SECONDS_MASK);
260 	dt->dt_min = FROMBCD(regs[1] & PCF8523_MINUTES_MASK);
261 	dt->dt_hour = FROMBCD(regs[2] & PCF8523_HOURS_24MASK);
262 	dt->dt_day = FROMBCD(regs[3] & PCF8523_DAY_MASK);
263 	dt->dt_mon = FROMBCD(regs[5] & PCF8523_MONTH_MASK);
264 	dt->dt_year = FROMBCD(regs[6]) + 2000;
265 
266 	if ((regs[0] & PCF8523_SECONDS_OS))
267 		return (0);
268 
269 	return (1);
270 }
271 
272 int
273 pcfrtc_clock_write(struct pcfrtc_softc *sc, struct clock_ymdhms *dt)
274 {
275 	uint8_t regs[PCF8523_NRTC_REGS];
276 	uint8_t cmd = PCF8523_SECONDS;
277 
278 	/*
279 	 * Convert our time representation into something the PCF8523
280 	 * can understand.
281 	 */
282 	regs[0] = TOBCD(dt->dt_sec);
283 	regs[1] = TOBCD(dt->dt_min);
284 	regs[2] = TOBCD(dt->dt_hour);
285 	regs[3] = TOBCD(dt->dt_day);
286 	regs[4] = TOBCD(dt->dt_wday);
287 	regs[5] = TOBCD(dt->dt_mon);
288 	regs[6] = TOBCD(dt->dt_year - 2000);
289 
290 	iic_acquire_bus(sc->sc_tag, I2C_F_POLL);
291 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
292 	    &cmd, sizeof cmd, regs, PCF8523_NRTC_REGS, I2C_F_POLL)) {
293 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
294 		printf("%s: pcfrtc_clock_write: failed to write rtc\n",
295 		    sc->sc_dev.dv_xname);
296 		return (0);
297 	}
298 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
299 	return (1);
300 }
301