1*4b1a56afSjsg /* $OpenBSD: aacreg.h,v 1.12 2022/01/09 05:42:37 jsg Exp $ */ 2c4d1da1fSniklas 3c4d1da1fSniklas /*- 4c4d1da1fSniklas * Copyright (c) 2000 Michael Smith 52b51a117Snate * Copyright (c) 2000-2001 Scott Long 6c4d1da1fSniklas * Copyright (c) 2000 BSDi 72b51a117Snate * Copyright (c) 2001 Adaptec, Inc. 8c4d1da1fSniklas * Copyright (c) 2000 Niklas Hallqvist 9c4d1da1fSniklas * All rights reserved. 10c4d1da1fSniklas * 11c4d1da1fSniklas * Redistribution and use in source and binary forms, with or without 12c4d1da1fSniklas * modification, are permitted provided that the following conditions 13c4d1da1fSniklas * are met: 14c4d1da1fSniklas * 1. Redistributions of source code must retain the above copyright 15c4d1da1fSniklas * notice, this list of conditions and the following disclaimer. 16c4d1da1fSniklas * 2. Redistributions in binary form must reproduce the above copyright 17c4d1da1fSniklas * notice, this list of conditions and the following disclaimer in the 18c4d1da1fSniklas * documentation and/or other materials provided with the distribution. 19c4d1da1fSniklas * 20c4d1da1fSniklas * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 21c4d1da1fSniklas * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22c4d1da1fSniklas * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23c4d1da1fSniklas * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 24c4d1da1fSniklas * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25c4d1da1fSniklas * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26c4d1da1fSniklas * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27c4d1da1fSniklas * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28c4d1da1fSniklas * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29c4d1da1fSniklas * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30c4d1da1fSniklas * SUCH DAMAGE. 31c4d1da1fSniklas * 322b51a117Snate * $FreeBSD$ 33c4d1da1fSniklas */ 34c4d1da1fSniklas 35c4d1da1fSniklas /* 36c4d1da1fSniklas * Data structures defining the interface between the driver and the Adaptec 37c4d1da1fSniklas * 'FSA' adapters. Note that many field names and comments here are taken 38c4d1da1fSniklas * verbatim from the Adaptec driver source in order to make comparing the 39c4d1da1fSniklas * two slightly easier. 40c4d1da1fSniklas */ 41c4d1da1fSniklas 42c4d1da1fSniklas /* 43c4d1da1fSniklas * Misc. magic numbers. 44c4d1da1fSniklas */ 45c4d1da1fSniklas #define AAC_MAX_CONTAINERS 64 46c4d1da1fSniklas #define AAC_BLOCK_SIZE 512 47c4d1da1fSniklas 48c4d1da1fSniklas /* 49c4d1da1fSniklas * Communications interface. 50c4d1da1fSniklas * 51c4d1da1fSniklas * Where datastructure layouts are closely parallel to the Adaptec sample code, 52c4d1da1fSniklas * retain their naming conventions (for now) to aid in cross-referencing. 53c4d1da1fSniklas */ 54c4d1da1fSniklas 55c4d1da1fSniklas /* 56c4d1da1fSniklas * We establish 4 command queues and matching response queues. Queues must 57c4d1da1fSniklas * be 16-byte aligned, and are sized as follows: 58c4d1da1fSniklas */ 592b51a117Snate #define AAC_HOST_NORM_CMD_ENTRIES 8 /* command adapter->host, 602b51a117Snate * normal priority */ 612b51a117Snate #define AAC_HOST_HIGH_CMD_ENTRIES 4 /* command adapter->host, 622b51a117Snate * high priority */ 632b51a117Snate #define AAC_ADAP_NORM_CMD_ENTRIES 512 /* command host->adapter, 642b51a117Snate * normal priority */ 652b51a117Snate #define AAC_ADAP_HIGH_CMD_ENTRIES 4 /* command host->adapter, 662b51a117Snate * high priority */ 672b51a117Snate #define AAC_HOST_NORM_RESP_ENTRIES 512 /* response, adapter->host, 682b51a117Snate * normal priority */ 692b51a117Snate #define AAC_HOST_HIGH_RESP_ENTRIES 4 /* response, adapter->host, 702b51a117Snate * high priority */ 712b51a117Snate #define AAC_ADAP_NORM_RESP_ENTRIES 8 /* response, host->adapter, 722b51a117Snate * normal priority */ 732b51a117Snate #define AAC_ADAP_HIGH_RESP_ENTRIES 4 /* response, host->adapter, 742b51a117Snate * high priority */ 75c4d1da1fSniklas 762b51a117Snate #define AAC_TOTALQ_LENGTH (AAC_HOST_HIGH_CMD_ENTRIES + \ 772b51a117Snate AAC_HOST_NORM_CMD_ENTRIES + \ 782b51a117Snate AAC_ADAP_HIGH_CMD_ENTRIES + \ 792b51a117Snate AAC_ADAP_NORM_CMD_ENTRIES + \ 802b51a117Snate AAC_HOST_HIGH_RESP_ENTRIES + \ 812b51a117Snate AAC_HOST_NORM_RESP_ENTRIES + \ 822b51a117Snate AAC_ADAP_HIGH_RESP_ENTRIES + \ 832b51a117Snate AAC_ADAP_NORM_RESP_ENTRIES) 84c4d1da1fSniklas #define AAC_QUEUE_COUNT 8 85c4d1da1fSniklas #define AAC_QUEUE_ALIGN 16 86c4d1da1fSniklas 87c4d1da1fSniklas struct aac_queue_entry { 88c4d1da1fSniklas u_int32_t aq_fib_size; /* FIB size in bytes */ 89c4d1da1fSniklas u_int32_t aq_fib_addr; /* receiver-space address of the FIB */ 908bfba773Sgilles } __packed; 91c4d1da1fSniklas 92c4d1da1fSniklas #define AAC_PRODUCER_INDEX 0 93c4d1da1fSniklas #define AAC_CONSUMER_INDEX 1 94c4d1da1fSniklas 95c4d1da1fSniklas /* 96c4d1da1fSniklas * Table of queue indices and queues used to communicate with the 97c4d1da1fSniklas * controller. This structure must be aligned to AAC_QUEUE_ALIGN 98c4d1da1fSniklas */ 99c4d1da1fSniklas struct aac_queue_table { 100c4d1da1fSniklas /* queue consumer/producer indexes (layout mandated by adapter) */ 101c4d1da1fSniklas u_int32_t qt_qindex[AAC_QUEUE_COUNT][2]; 102c4d1da1fSniklas 103c4d1da1fSniklas /* queue entry structures (layout mandated by adapter) */ 104c4d1da1fSniklas struct aac_queue_entry qt_HostNormCmdQueue [AAC_HOST_NORM_CMD_ENTRIES]; 105c4d1da1fSniklas struct aac_queue_entry qt_HostHighCmdQueue [AAC_HOST_HIGH_CMD_ENTRIES]; 106c4d1da1fSniklas struct aac_queue_entry qt_AdapNormCmdQueue [AAC_ADAP_NORM_CMD_ENTRIES]; 107c4d1da1fSniklas struct aac_queue_entry qt_AdapHighCmdQueue [AAC_ADAP_HIGH_CMD_ENTRIES]; 1082b51a117Snate struct aac_queue_entry qt_HostNormRespQueue[AAC_HOST_NORM_RESP_ENTRIES]; 1092b51a117Snate struct aac_queue_entry qt_HostHighRespQueue[AAC_HOST_HIGH_RESP_ENTRIES]; 1102b51a117Snate struct aac_queue_entry qt_AdapNormRespQueue[AAC_ADAP_NORM_RESP_ENTRIES]; 1112b51a117Snate struct aac_queue_entry qt_AdapHighRespQueue[AAC_ADAP_HIGH_RESP_ENTRIES]; 1128bfba773Sgilles } __packed; 113c4d1da1fSniklas 114c4d1da1fSniklas /* 115c4d1da1fSniklas * Queue names 116c4d1da1fSniklas * 117c4d1da1fSniklas * Note that we base these at 0 in order to use them as array indices. Adaptec 118c4d1da1fSniklas * used base 1 for some unknown reason, and sorted them in a different order. 119c4d1da1fSniklas */ 120c4d1da1fSniklas #define AAC_HOST_NORM_CMD_QUEUE 0 121c4d1da1fSniklas #define AAC_HOST_HIGH_CMD_QUEUE 1 122c4d1da1fSniklas #define AAC_ADAP_NORM_CMD_QUEUE 2 123c4d1da1fSniklas #define AAC_ADAP_HIGH_CMD_QUEUE 3 124c4d1da1fSniklas #define AAC_HOST_NORM_RESP_QUEUE 4 125c4d1da1fSniklas #define AAC_HOST_HIGH_RESP_QUEUE 5 126c4d1da1fSniklas #define AAC_ADAP_NORM_RESP_QUEUE 6 127c4d1da1fSniklas #define AAC_ADAP_HIGH_RESP_QUEUE 7 128c4d1da1fSniklas 129c4d1da1fSniklas /* 130c4d1da1fSniklas * List structure used to chain FIBs (used by the adapter - we hang FIBs off 131c4d1da1fSniklas * our private command structure and don't touch these) 132c4d1da1fSniklas */ 133c4d1da1fSniklas struct aac_fib_list_entry { 1342b51a117Snate u_int32_t Flink; 1352b51a117Snate u_int32_t Blink; 1368bfba773Sgilles } __packed; 137c4d1da1fSniklas 138c4d1da1fSniklas /* 1392b51a117Snate * FIB (FSA Interface Block?); this is the datastructure passed between the host 1402b51a117Snate * and adapter. 141c4d1da1fSniklas */ 142c4d1da1fSniklas struct aac_fib_header { 143c4d1da1fSniklas u_int32_t XferState; 144c4d1da1fSniklas u_int16_t Command; 145c4d1da1fSniklas u_int8_t StructType; 146c4d1da1fSniklas u_int8_t Flags; 147c4d1da1fSniklas u_int16_t Size; 148c4d1da1fSniklas u_int16_t SenderSize; 149c4d1da1fSniklas u_int32_t SenderFibAddress; 150c4d1da1fSniklas u_int32_t ReceiverFibAddress; 151c4d1da1fSniklas u_int32_t SenderData; 152c4d1da1fSniklas union { 153c4d1da1fSniklas struct { 154c4d1da1fSniklas u_int32_t ReceiverTimeStart; 155c4d1da1fSniklas u_int32_t ReceiverTimeDone; 156c4d1da1fSniklas } _s; 157c4d1da1fSniklas struct aac_fib_list_entry FibLinks; 158c4d1da1fSniklas } _u; 1598bfba773Sgilles } __packed; 160c4d1da1fSniklas 161c4d1da1fSniklas #define AAC_FIB_DATASIZE (512 - sizeof(struct aac_fib_header)) 162c4d1da1fSniklas 163c4d1da1fSniklas struct aac_fib { 164c4d1da1fSniklas struct aac_fib_header Header; 165c4d1da1fSniklas u_int8_t data[AAC_FIB_DATASIZE]; 1668bfba773Sgilles } __packed; 167c4d1da1fSniklas 168c4d1da1fSniklas /* 169c4d1da1fSniklas * FIB commands 170c4d1da1fSniklas */ 171c4d1da1fSniklas typedef enum { 172c4d1da1fSniklas TestCommandResponse = 1, 173c4d1da1fSniklas TestAdapterCommand = 2, 174c4d1da1fSniklas 175c4d1da1fSniklas /* lowlevel and comm commands */ 176c4d1da1fSniklas LastTestCommand = 100, 177c4d1da1fSniklas ReinitHostNormCommandQueue = 101, 178c4d1da1fSniklas ReinitHostHighCommandQueue = 102, 179c4d1da1fSniklas ReinitHostHighRespQueue = 103, 180c4d1da1fSniklas ReinitHostNormRespQueue = 104, 181c4d1da1fSniklas ReinitAdapNormCommandQueue = 105, 182c4d1da1fSniklas ReinitAdapHighCommandQueue = 107, 183c4d1da1fSniklas ReinitAdapHighRespQueue = 108, 184c4d1da1fSniklas ReinitAdapNormRespQueue = 109, 185c4d1da1fSniklas InterfaceShutdown = 110, 186c4d1da1fSniklas DmaCommandFib = 120, 187c4d1da1fSniklas StartProfile = 121, 188c4d1da1fSniklas TermProfile = 122, 189c4d1da1fSniklas SpeedTest = 123, 190c4d1da1fSniklas TakeABreakPt = 124, 191c4d1da1fSniklas RequestPerfData = 125, 192c4d1da1fSniklas SetInterruptDefTimer= 126, 193c4d1da1fSniklas SetInterruptDefCount= 127, 194c4d1da1fSniklas GetInterruptDefStatus= 128, 195c4d1da1fSniklas LastCommCommand = 129, 196c4d1da1fSniklas 197c4d1da1fSniklas /* filesystem commands */ 198c4d1da1fSniklas NuFileSystem = 300, 199c4d1da1fSniklas UFS = 301, 200c4d1da1fSniklas HostFileSystem = 302, 201c4d1da1fSniklas LastFileSystemCommand = 303, 202c4d1da1fSniklas 203c4d1da1fSniklas /* Container Commands */ 204c4d1da1fSniklas ContainerCommand = 500, 205c4d1da1fSniklas ContainerCommand64 = 501, 206c4d1da1fSniklas 207c4d1da1fSniklas /* Cluster Commands */ 208c4d1da1fSniklas ClusterCommand = 550, 209c4d1da1fSniklas 210c4d1da1fSniklas /* Scsi Port commands (scsi passthrough) */ 211c4d1da1fSniklas ScsiPortCommand = 600, 212c4d1da1fSniklas 213c4d1da1fSniklas /* misc house keeping and generic adapter initiated commands */ 214c4d1da1fSniklas AifRequest = 700, 215c4d1da1fSniklas CheckRevision = 701, 216c4d1da1fSniklas FsaHostShutdown = 702, 217c4d1da1fSniklas RequestAdapterInfo = 703, 218c4d1da1fSniklas IsAdapterPaused = 704, 219c4d1da1fSniklas SendHostTime = 705, 220c4d1da1fSniklas LastMiscCommand = 706 221c4d1da1fSniklas } AAC_FibCommands; 222c4d1da1fSniklas 223c4d1da1fSniklas /* 224c4d1da1fSniklas * FIB types 225c4d1da1fSniklas */ 226c4d1da1fSniklas #define AAC_FIBTYPE_TFIB 1 227c4d1da1fSniklas #define AAC_FIBTYPE_TQE 2 228c4d1da1fSniklas #define AAC_FIBTYPE_TCTPERF 3 229c4d1da1fSniklas 230c4d1da1fSniklas /* 231c4d1da1fSniklas * FIB transfer state 232c4d1da1fSniklas */ 233c4d1da1fSniklas #define AAC_FIBSTATE_HOSTOWNED (1<<0) /* owned by the host */ 234c4d1da1fSniklas #define AAC_FIBSTATE_ADAPTEROWNED (1<<1) /* owned by the adapter */ 235c4d1da1fSniklas #define AAC_FIBSTATE_INITIALISED (1<<2) /* initialised */ 236c4d1da1fSniklas #define AAC_FIBSTATE_EMPTY (1<<3) /* empty */ 237c4d1da1fSniklas #define AAC_FIBSTATE_FROMPOOL (1<<4) /* allocated from pool */ 238c4d1da1fSniklas #define AAC_FIBSTATE_FROMHOST (1<<5) /* sent from the host */ 239c4d1da1fSniklas #define AAC_FIBSTATE_FROMADAP (1<<6) /* sent from the adapter */ 240c4d1da1fSniklas #define AAC_FIBSTATE_REXPECTED (1<<7) /* response is expected */ 241c4d1da1fSniklas #define AAC_FIBSTATE_RNOTEXPECTED (1<<8) /* response is not expected */ 242c4d1da1fSniklas #define AAC_FIBSTATE_DONEADAP (1<<9) /* processed by the adapter */ 243c4d1da1fSniklas #define AAC_FIBSTATE_DONEHOST (1<<10) /* processed by the host */ 244c4d1da1fSniklas #define AAC_FIBSTATE_HIGH (1<<11) /* high priority */ 245c4d1da1fSniklas #define AAC_FIBSTATE_NORM (1<<12) /* normal priority */ 246c4d1da1fSniklas #define AAC_FIBSTATE_ASYNC (1<<13) 247c4d1da1fSniklas #define AAC_FIBSTATE_ASYNCIO (1<<13) /* to be removed */ 248c4d1da1fSniklas #define AAC_FIBSTATE_PAGEFILEIO (1<<14) /* to be removed */ 249c4d1da1fSniklas #define AAC_FIBSTATE_SHUTDOWN (1<<15) 250c4d1da1fSniklas #define AAC_FIBSTATE_LAZYWRITE (1<<16) /* to be removed */ 251c4d1da1fSniklas #define AAC_FIBSTATE_ADAPMICROFIB (1<<17) 252c4d1da1fSniklas #define AAC_FIBSTATE_BIOSFIB (1<<18) 253c4d1da1fSniklas #define AAC_FIBSTATE_FAST_RESPONSE (1<<19) /* fast response capable */ 254c4d1da1fSniklas #define AAC_FIBSTATE_APIFIB (1<<20) 255c4d1da1fSniklas 256c4d1da1fSniklas /* 257c4d1da1fSniklas * FIB error values 258c4d1da1fSniklas */ 259c4d1da1fSniklas #define AAC_ERROR_NORMAL 0x00 260c4d1da1fSniklas #define AAC_ERROR_PENDING 0x01 261c4d1da1fSniklas #define AAC_ERROR_FATAL 0x02 262c4d1da1fSniklas #define AAC_ERROR_INVALID_QUEUE 0x03 263c4d1da1fSniklas #define AAC_ERROR_NOENTRIES 0x04 264c4d1da1fSniklas #define AAC_ERROR_SENDFAILED 0x05 265c4d1da1fSniklas #define AAC_ERROR_INVALID_QUEUE_PRIORITY 0x06 266c4d1da1fSniklas #define AAC_ERROR_FIB_ALLOCATION_FAILED 0x07 267c4d1da1fSniklas #define AAC_ERROR_FIB_DEALLOCATION_FAILED 0x08 268c4d1da1fSniklas 269c4d1da1fSniklas /* 2702b51a117Snate * Adapter Init Structure: this is passed to the adapter with the 2712b51a117Snate * AAC_MONKER_INITSTRUCT command to point it at our control structures. 2722b51a117Snate */ 2732b51a117Snate struct aac_adapter_init { 2742b51a117Snate u_int32_t InitStructRevision; 2752b51a117Snate #define AAC_INIT_STRUCT_REVISION 3 2762b51a117Snate u_int32_t MiniPortRevision; 2772b51a117Snate #define AAC_INIT_STRUCT_MINIPORT_REVISION 1 2782b51a117Snate u_int32_t FilesystemRevision; 2792b51a117Snate u_int32_t CommHeaderAddress; 2802b51a117Snate u_int32_t FastIoCommAreaAddress; 2812b51a117Snate u_int32_t AdapterFibsPhysicalAddress; 2822b51a117Snate u_int32_t AdapterFibsVirtualAddress; 2832b51a117Snate u_int32_t AdapterFibsSize; 2842b51a117Snate u_int32_t AdapterFibAlign; 2852b51a117Snate u_int32_t PrintfBufferAddress; 2862b51a117Snate u_int32_t PrintfBufferSize; 2872b51a117Snate #define AAC_PAGE_SIZE 4096 2882b51a117Snate u_int32_t HostPhysMemPages; 2892b51a117Snate u_int32_t HostElapsedSeconds; 2908bfba773Sgilles } __packed; 2912b51a117Snate 2922b51a117Snate /* 2932b51a117Snate * Shared data types 2942b51a117Snate */ 2952b51a117Snate /* 2962b51a117Snate * Container types 2972b51a117Snate */ 2982b51a117Snate typedef enum { 2992b51a117Snate CT_NONE = 0, 3002b51a117Snate CT_VOLUME, 3012b51a117Snate CT_MIRROR, 3022b51a117Snate CT_STRIPE, 3032b51a117Snate CT_RAID5, 3042b51a117Snate CT_SSRW, 3052b51a117Snate CT_SSRO, 3062b51a117Snate CT_MORPH, 3072b51a117Snate CT_PASSTHRU, 3082b51a117Snate CT_RAID4, 3092b51a117Snate CT_RAID10, /* stripe of mirror */ 3102b51a117Snate CT_RAID00, /* stripe of stripe */ 3112b51a117Snate CT_VOLUME_OF_MIRRORS, /* volume of mirror */ 3122b51a117Snate CT_PSEUDO_RAID3, /* really raid4 */ 3132b51a117Snate CT_RAID50, /* stripe of raid5 */ 3142b51a117Snate } AAC_FSAVolType; 3152b51a117Snate 3162b51a117Snate /* 3172b51a117Snate * Host-addressable object types 3182b51a117Snate */ 3192b51a117Snate typedef enum { 3202b51a117Snate FT_REG = 1, /* regular file */ 3212b51a117Snate FT_DIR, /* directory */ 3222b51a117Snate FT_BLK, /* "block" device - reserved */ 3232b51a117Snate FT_CHR, /* "character special" device - reserved */ 3242b51a117Snate FT_LNK, /* symbolic link */ 3252b51a117Snate FT_SOCK, /* socket */ 3262b51a117Snate FT_FIFO, /* fifo */ 3272b51a117Snate FT_FILESYS, /* ADAPTEC's "FSA"(tm) filesystem */ 3282b51a117Snate FT_DRIVE, /* physical disk - addressable in scsi by b/t/l */ 3292b51a117Snate FT_SLICE, /* virtual disk - raw volume - slice */ 3302b51a117Snate FT_PARTITION, /* FSA partition - carved out of a slice - building 3312b51a117Snate * block for containers */ 3322b51a117Snate FT_VOLUME, /* Container - Volume Set */ 3332b51a117Snate FT_STRIPE, /* Container - Stripe Set */ 3342b51a117Snate FT_MIRROR, /* Container - Mirror Set */ 3352b51a117Snate FT_RAID5, /* Container - Raid 5 Set */ 3362b51a117Snate FT_DATABASE /* Storage object with "foreign" content manager */ 3372b51a117Snate } AAC_FType; 3382b51a117Snate 3392b51a117Snate /* 3402b51a117Snate * Host-side scatter/gather list for 32-bit commands. 3412b51a117Snate */ 3422b51a117Snate struct aac_sg_entry { 3432b51a117Snate u_int32_t SgAddress; 3442b51a117Snate u_int32_t SgByteCount; 3458bfba773Sgilles } __packed; 3462b51a117Snate 3472b51a117Snate struct aac_sg_entry64 { 3482b51a117Snate u_int64_t SgAddress; 3492b51a117Snate u_int32_t SgByteCount; 3508bfba773Sgilles } __packed; 3512b51a117Snate 3522b51a117Snate struct aac_sg_table { 3532b51a117Snate u_int32_t SgCount; 3542b51a117Snate struct aac_sg_entry SgEntry[0]; 3558bfba773Sgilles } __packed; 3562b51a117Snate 3572b51a117Snate /* 3582b51a117Snate * Host-side scatter/gather list for 64-bit commands. 3592b51a117Snate */ 3602b51a117Snate struct aac_sg_table64 { 3612b51a117Snate u_int32_t SgCount; 3622b51a117Snate struct aac_sg_entry64 SgEntry64[0]; 3638bfba773Sgilles } __packed; 3642b51a117Snate 3652b51a117Snate /* 3662b51a117Snate * Container creation data 3672b51a117Snate */ 3682b51a117Snate struct aac_container_creation { 3692b51a117Snate u_int8_t ViaBuildNumber; 3702b51a117Snate u_int8_t MicroSecond; 3712b51a117Snate u_int8_t Via; /* 1 = FSU, 2 = API, etc. */ 3722b51a117Snate u_int8_t YearsSince1900; 3732b51a117Snate u_int32_t Month:4; /* 1-12 */ 3742b51a117Snate u_int32_t Day:6; /* 1-32 */ 3752b51a117Snate u_int32_t Hour:6; /* 0-23 */ 3762b51a117Snate u_int32_t Minute:6; /* 0-59 */ 3772b51a117Snate u_int32_t Second:6; /* 0-59 */ 3782b51a117Snate u_int64_t ViaAdapterSerialNumber; 3798bfba773Sgilles } __packed; 3802b51a117Snate 3812b51a117Snate /* 3822b51a117Snate * Revision number handling 3832b51a117Snate */ 3842b51a117Snate 3852b51a117Snate typedef enum { 3862b51a117Snate RevApplication = 1, 3872b51a117Snate RevDkiCli, 3882b51a117Snate RevNetService, 3892b51a117Snate RevApi, 3902b51a117Snate RevFileSysDriver, 3912b51a117Snate RevMiniportDriver, 3922b51a117Snate RevAdapterSW, 3932b51a117Snate RevMonitor, 3942b51a117Snate RevRemoteApi 3952b51a117Snate } RevComponent; 3962b51a117Snate 3972b51a117Snate struct FsaRevision { 3982b51a117Snate union { 3992b51a117Snate struct { 4002b51a117Snate u_int8_t dash; 4012b51a117Snate u_int8_t type; 4022b51a117Snate u_int8_t minor; 4032b51a117Snate u_int8_t major; 4042b51a117Snate } comp; 4052b51a117Snate u_int32_t ul; 4062b51a117Snate } external; 4072b51a117Snate u_int32_t buildNumber; 4088bfba773Sgilles } __packed; 4092b51a117Snate 4102b51a117Snate /* 4112b51a117Snate * Adapter Information 4122b51a117Snate */ 4132b51a117Snate 4142b51a117Snate typedef enum { 4152b51a117Snate CPU_NTSIM = 1, 4162b51a117Snate CPU_I960, 4172b51a117Snate CPU_ARM, 4182b51a117Snate CPU_SPARC, 4192b51a117Snate CPU_POWERPC, 4202b51a117Snate CPU_ALPHA, 4212b51a117Snate CPU_P7, 4222b51a117Snate CPU_I960_RX, 423f133f6b1Sgrange CPU_MIPS, 424f133f6b1Sgrange CPU_XSCALE, 4252b51a117Snate CPU__last 4262b51a117Snate } AAC_CpuType; 4272b51a117Snate 4282b51a117Snate typedef enum { 4292b51a117Snate CPUI960_JX = 1, 4302b51a117Snate CPUI960_CX, 4312b51a117Snate CPUI960_HX, 4322b51a117Snate CPUI960_RX, 4332b51a117Snate CPUARM_SA110, 4342b51a117Snate CPUARM_xxx, 4352b51a117Snate CPUMPC_824x, 4362b51a117Snate CPUPPC_xxx, 4372b51a117Snate CPUI960_302, 438f133f6b1Sgrange CPU_XSCALE_80321, 439f133f6b1Sgrange CPU_MIPS_4KC, 440f133f6b1Sgrange CPU_MIPS_5KC, 4412b51a117Snate CPUSUBTYPE__last 4422b51a117Snate } AAC_CpuSubType; 4432b51a117Snate 4442b51a117Snate typedef enum { 4452b51a117Snate PLAT_NTSIM = 1, 4462b51a117Snate PLAT_V3ADU, 4472b51a117Snate PLAT_CYCLONE, 4482b51a117Snate PLAT_CYCLONE_HD, 4492b51a117Snate PLAT_BATBOARD, 4502b51a117Snate PLAT_BATBOARD_HD, 4512b51a117Snate PLAT_YOLO, 4522b51a117Snate PLAT_COBRA, 4532b51a117Snate PLAT_ANAHEIM, 4542b51a117Snate PLAT_JALAPENO, 4552b51a117Snate PLAT_QUEENS, 4562b51a117Snate PLAT_JALAPENO_DELL, 4572b51a117Snate PLAT_POBLANO, 4582b51a117Snate PLAT_POBLANO_OPAL, 4592b51a117Snate PLAT_POBLANO_SL0, 4602b51a117Snate PLAT_POBLANO_SL1, 4612b51a117Snate PLAT_POBLANO_SL2, 4622b51a117Snate PLAT_POBLANO_XXX, 4632b51a117Snate PLAT_JALAPENO_P2, 4642b51a117Snate PLAT_HABANERO, 4652b51a117Snate PLAT__last 4662b51a117Snate } AAC_Platform; 4672b51a117Snate 4682b51a117Snate typedef enum { 4692b51a117Snate OEM_FLAVOR_ADAPTEC = 1, 4702b51a117Snate OEM_FLAVOR_DELL, 4712b51a117Snate OEM_FLAVOR_HP, 4722b51a117Snate OEM_FLAVOR_IBM, 4732b51a117Snate OEM_FLAVOR_CPQ, 4742b51a117Snate OEM_FLAVOR_BRAND_X, 4752b51a117Snate OEM_FLAVOR_BRAND_Y, 4762b51a117Snate OEM_FLAVOR_BRAND_Z, 4772b51a117Snate OEM_FLAVOR__last 4782b51a117Snate } AAC_OemFlavor; 4792b51a117Snate 4802b51a117Snate /* 4812b51a117Snate * XXX the aac-2622 with no battery present reports PLATFORM_BAT_OPT_PRESENT 4822b51a117Snate */ 4832b51a117Snate typedef enum 4842b51a117Snate { 4852b51a117Snate PLATFORM_BAT_REQ_PRESENT = 1, /* BATTERY REQUIRED AND PRESENT */ 4862b51a117Snate PLATFORM_BAT_REQ_NOTPRESENT, /* BATTERY REQUIRED AND NOT PRESENT */ 4872b51a117Snate PLATFORM_BAT_OPT_PRESENT, /* BATTERY OPTIONAL AND PRESENT */ 4882b51a117Snate PLATFORM_BAT_OPT_NOTPRESENT, /* BATTERY OPTIONAL AND NOT PRESENT */ 4892b51a117Snate PLATFORM_BAT_NOT_SUPPORTED /* BATTERY NOT SUPPORTED */ 4902b51a117Snate } AAC_BatteryPlatform; 4912b51a117Snate 4922b51a117Snate /* 4932b51a117Snate * options supported by this board 4942b51a117Snate * there has to be a one to one mapping of these defines and the ones in 4952b51a117Snate * fsaapi.h, search for FSA_SUPPORT_SNAPSHOT 4962b51a117Snate */ 4972b51a117Snate #define AAC_SUPPORTED_SNAPSHOT 0x01 4982b51a117Snate #define AAC_SUPPORTED_CLUSTERS 0x02 4992b51a117Snate #define AAC_SUPPORTED_WRITE_CACHE 0x04 5002b51a117Snate #define AAC_SUPPORTED_64BIT_DATA 0x08 5012b51a117Snate #define AAC_SUPPORTED_HOST_TIME_FIB 0x10 5022b51a117Snate #define AAC_SUPPORTED_RAID50 0x20 5032b51a117Snate #define AAC_SUPPORTED_4GB_WINDOW 0x40 5042b51a117Snate #define AAC_SUPPORTED_SCSI_UPGRADEABLE 0x80 5052b51a117Snate #define AAC_SUPPORTED_SOFT_ERR_REPORT 0x100 5062b51a117Snate #define AAC_SUPPORTED_NOT_RECONDITION 0x200 5072b51a117Snate #define AAC_SUPPORTED_SGMAP_HOST64 0x400 5082b51a117Snate #define AAC_SUPPORTED_ALARM 0x800 5092b51a117Snate #define AAC_SUPPORTED_NONDASD 0x1000 5102b51a117Snate 5112b51a117Snate /* 5122b51a117Snate * Structure used to respond to a RequestAdapterInfo fib. 5132b51a117Snate */ 5142b51a117Snate struct aac_adapter_info { 5152b51a117Snate AAC_Platform PlatformBase; /* adapter type */ 5162b51a117Snate AAC_CpuType CpuArchitecture; /* adapter CPU type */ 5172b51a117Snate AAC_CpuSubType CpuVariant; /* adapter CPU subtype */ 5182b51a117Snate u_int32_t ClockSpeed; /* adapter CPU clockspeed */ 5192b51a117Snate u_int32_t ExecutionMem; /* adapter Execution Memory 5202b51a117Snate * size */ 5212b51a117Snate u_int32_t BufferMem; /* adapter Data Memory */ 5222b51a117Snate u_int32_t TotalMem; /* adapter Total Memory */ 5232b51a117Snate struct FsaRevision KernelRevision; /* adapter Kernel Software 5242b51a117Snate * Revision */ 5252b51a117Snate struct FsaRevision MonitorRevision; /* adapter Monitor/Diagnostic 5262b51a117Snate * Software Revision */ 5272b51a117Snate struct FsaRevision HardwareRevision;/* TBD */ 5282b51a117Snate struct FsaRevision BIOSRevision; /* adapter BIOS Revision */ 5292b51a117Snate u_int32_t ClusteringEnabled; 5302b51a117Snate u_int32_t ClusterChannelMask; 5312b51a117Snate u_int64_t SerialNumber; 5322b51a117Snate AAC_BatteryPlatform batteryPlatform; 5332b51a117Snate u_int32_t SupportedOptions; /* supported features of this 5342b51a117Snate * controller */ 5352b51a117Snate AAC_OemFlavor OemVariant; 5368bfba773Sgilles } __packed; 5372b51a117Snate 5382b51a117Snate /* 5392b51a117Snate * Monitor/Kernel interface. 5402b51a117Snate */ 5412b51a117Snate 5422b51a117Snate /* 5432b51a117Snate * Synchronous commands to the monitor/kernel. 5442b51a117Snate */ 5452b51a117Snate #define AAC_MONKER_INITSTRUCT 0x05 5462b51a117Snate #define AAC_MONKER_SYNCFIB 0x0c 5472b51a117Snate #define AAC_MONKER_GETKERNVER 0x11 5482b51a117Snate #define AAC_MONKER_GETINFO 0x19 5492b51a117Snate 5502b51a117Snate /* 551c4d1da1fSniklas * Adapter Status Register 552c4d1da1fSniklas * 553*4b1a56afSjsg * Phase Status mailbox is 32bits: 554c4d1da1fSniklas * <31:16> = Phase Status 555c4d1da1fSniklas * <15:0> = Phase 556c4d1da1fSniklas * 557c4d1da1fSniklas * The adapter reports its present state through the phase. Only 558c4d1da1fSniklas * a single phase should be ever be set. Each phase can have multiple 559c4d1da1fSniklas * phase status bits to provide more detailed information about the 560c4d1da1fSniklas * state of the adapter. 561c4d1da1fSniklas */ 562c4d1da1fSniklas #define AAC_SELF_TEST_FAILED 0x00000004 563c4d1da1fSniklas #define AAC_UP_AND_RUNNING 0x00000080 564c4d1da1fSniklas #define AAC_KERNEL_PANIC 0x00000100 5652b51a117Snate 5662b51a117Snate /* 5672b51a117Snate * Data types relating to control and monitoring of the NVRAM/WriteCache 5682b51a117Snate * subsystem. 5692b51a117Snate */ 5702b51a117Snate 5712b51a117Snate #define AAC_NFILESYS 24 /* maximum number of filesystems */ 5722b51a117Snate 5732b51a117Snate /* 5742b51a117Snate * NVRAM/Write Cache subsystem states 5752b51a117Snate */ 5762b51a117Snate typedef enum { 5772b51a117Snate NVSTATUS_DISABLED = 0, /* present, clean, not being used */ 5782b51a117Snate NVSTATUS_ENABLED, /* present, possibly dirty, ready for use */ 5792b51a117Snate NVSTATUS_ERROR, /* present, dirty, contains dirty data */ 5802b51a117Snate NVSTATUS_BATTERY, /* present, bad or low battery, may contain 5812b51a117Snate * dirty data */ 5822b51a117Snate NVSTATUS_UNKNOWN /* for bad/missing device */ 5832b51a117Snate } AAC_NVSTATUS; 5842b51a117Snate 5852b51a117Snate /* 5862b51a117Snate * NVRAM/Write Cache subsystem battery component states 5872b51a117Snate * 5882b51a117Snate */ 5892b51a117Snate typedef enum { 5902b51a117Snate NVBATTSTATUS_NONE = 0, /* battery has no power or is not present */ 5912b51a117Snate NVBATTSTATUS_LOW, /* battery is low on power */ 5922b51a117Snate NVBATTSTATUS_OK, /* battery is okay - normal operation possible 5932b51a117Snate * only in this state */ 5942b51a117Snate NVBATTSTATUS_RECONDITIONING /* no battery present - reconditioning 5952b51a117Snate * in process */ 5962b51a117Snate } AAC_NVBATTSTATUS; 5972b51a117Snate 5982b51a117Snate /* 5992b51a117Snate * Battery transition type 6002b51a117Snate */ 6012b51a117Snate typedef enum { 6022b51a117Snate NVBATT_TRANSITION_NONE = 0, /* battery now has no power or is not 6032b51a117Snate * present */ 6042b51a117Snate NVBATT_TRANSITION_LOW, /* battery is now low on power */ 6052b51a117Snate NVBATT_TRANSITION_OK /* battery is now okay - normal 6062b51a117Snate * operation possible only in this 6072b51a117Snate * state */ 6082b51a117Snate } AAC_NVBATT_TRANSITION; 6092b51a117Snate 6102b51a117Snate /* 6112b51a117Snate * NVRAM Info structure returned for NVRAM_GetInfo call 6122b51a117Snate */ 6132b51a117Snate struct aac_nvramdevinfo { 6142b51a117Snate u_int32_t NV_Enabled; /* write caching enabled */ 6152b51a117Snate u_int32_t NV_Error; /* device in error state */ 6162b51a117Snate u_int32_t NV_NDirty; /* count of dirty NVRAM buffers */ 6172b51a117Snate u_int32_t NV_NActive; /* count of NVRAM buffers being 6182b51a117Snate * written */ 6198bfba773Sgilles } __packed; 6202b51a117Snate 6212b51a117Snate struct aac_nvraminfo { 6222b51a117Snate AAC_NVSTATUS NV_Status; /* nvram subsystem status */ 6232b51a117Snate AAC_NVBATTSTATUS NV_BattStatus; /* battery status */ 6242b51a117Snate u_int32_t NV_Size; /* size of WriteCache NVRAM in 6252b51a117Snate * bytes */ 6262b51a117Snate u_int32_t NV_BufSize; /* size of NVRAM buffers in 6272b51a117Snate * bytes */ 6282b51a117Snate u_int32_t NV_NBufs; /* number of NVRAM buffers */ 6292b51a117Snate u_int32_t NV_NDirty; /* Num dirty NVRAM buffers */ 6302b51a117Snate u_int32_t NV_NClean; /* Num clean NVRAM buffers */ 6312b51a117Snate u_int32_t NV_NActive; /* Num NVRAM buffers being 6322b51a117Snate * written */ 6332b51a117Snate u_int32_t NV_NBrokered; /* Num brokered NVRAM buffers */ 6342b51a117Snate struct aac_nvramdevinfo NV_DevInfo[AAC_NFILESYS]; /* per device 6352b51a117Snate * info */ 6362b51a117Snate u_int32_t NV_BattNeedsReconditioning; /* boolean */ 6372b51a117Snate u_int32_t NV_TotalSize; /* size of all non-volatile 6382b51a117Snate * memories in bytes */ 6398bfba773Sgilles } __packed; 6402b51a117Snate 6412b51a117Snate /* 6422b51a117Snate * Data types relating to adapter-initiated FIBs 6432b51a117Snate * 6442b51a117Snate * Based on types and structures in <aifstruc.h> 6452b51a117Snate */ 6462b51a117Snate 6472b51a117Snate /* 6482b51a117Snate * Progress Reports 6492b51a117Snate */ 6502b51a117Snate typedef enum { 6512b51a117Snate AifJobStsSuccess = 1, 6522b51a117Snate AifJobStsFinished, 6532b51a117Snate AifJobStsAborted, 6542b51a117Snate AifJobStsFailed, 6552b51a117Snate AifJobStsLastReportMarker = 100, /* All prior mean last report */ 6562b51a117Snate AifJobStsSuspended, 6572b51a117Snate AifJobStsRunning 6582b51a117Snate } AAC_AifJobStatus; 6592b51a117Snate 6602b51a117Snate typedef enum { 6612b51a117Snate AifJobScsiMin = 1, /* Minimum value for Scsi operation */ 6622b51a117Snate AifJobScsiZero, /* SCSI device clear operation */ 6632b51a117Snate AifJobScsiVerify, /* SCSI device Verify operation NO 6642b51a117Snate * REPAIR */ 6652b51a117Snate AifJobScsiExercise, /* SCSI device Exercise operation */ 6662b51a117Snate AifJobScsiVerifyRepair, /* SCSI device Verify operation WITH 6672b51a117Snate * repair */ 6682b51a117Snate AifJobScsiMax = 99, /* Max Scsi value */ 6692b51a117Snate AifJobCtrMin, /* Min Ctr op value */ 6702b51a117Snate AifJobCtrZero, /* Container clear operation */ 6712b51a117Snate AifJobCtrCopy, /* Container copy operation */ 6722b51a117Snate AifJobCtrCreateMirror, /* Container Create Mirror operation */ 6732b51a117Snate AifJobCtrMergeMirror, /* Container Merge Mirror operation */ 6742b51a117Snate AifJobCtrScrubMirror, /* Container Scrub Mirror operation */ 6752b51a117Snate AifJobCtrRebuildRaid5, /* Container Rebuild Raid5 operation */ 6762b51a117Snate AifJobCtrScrubRaid5, /* Container Scrub Raid5 operation */ 6772b51a117Snate AifJobCtrMorph, /* Container morph operation */ 6782b51a117Snate AifJobCtrPartCopy, /* Container Partition copy operation */ 6792b51a117Snate AifJobCtrRebuildMirror, /* Container Rebuild Mirror operation */ 6802b51a117Snate AifJobCtrCrazyCache, /* crazy cache */ 6812b51a117Snate AifJobCtrMax = 199, /* Max Ctr type operation */ 6822b51a117Snate AifJobFsMin, /* Min Fs type operation */ 6832b51a117Snate AifJobFsCreate, /* File System Create operation */ 6842b51a117Snate AifJobFsVerify, /* File System Verify operation */ 6852b51a117Snate AifJobFsExtend, /* File System Extend operation */ 6862b51a117Snate AifJobFsMax = 299, /* Max Fs type operation */ 6872b51a117Snate AifJobApiFormatNTFS, /* Format a drive to NTFS */ 6882b51a117Snate AifJobApiFormatFAT, /* Format a drive to FAT */ 6892b51a117Snate AifJobApiUpdateSnapshot, /* update the read/write half of a 6902b51a117Snate * snapshot */ 6912b51a117Snate AifJobApiFormatFAT32, /* Format a drive to FAT32 */ 6922b51a117Snate AifJobApiMax = 399, /* Max API type operation */ 6932b51a117Snate AifJobCtlContinuousCtrVerify, /* Adapter operation */ 6942b51a117Snate AifJobCtlMax = 499 /* Max Adapter type operation */ 6952b51a117Snate } AAC_AifJobType; 6962b51a117Snate 6972b51a117Snate struct aac_AifContainers { 6982b51a117Snate u_int32_t src; /* from/master */ 6992b51a117Snate u_int32_t dst; /* to/slave */ 7008bfba773Sgilles } __packed; 7012b51a117Snate 7022b51a117Snate union aac_AifJobClient { 7032b51a117Snate struct aac_AifContainers container; /* For Container and 7042b51a117Snate * filesystem progress 7052b51a117Snate * ops; */ 7062b51a117Snate int32_t scsi_dh; /* For SCSI progress 7072b51a117Snate * ops */ 7082b51a117Snate }; 7092b51a117Snate 7102b51a117Snate struct aac_AifJobDesc { 7112b51a117Snate u_int32_t jobID; /* DO NOT FILL IN! Will be 7122b51a117Snate * filled in by AIF */ 7132b51a117Snate AAC_AifJobType type; /* Operation that is being 7142b51a117Snate * performed */ 7152b51a117Snate union aac_AifJobClient client; /* Details */ 7168bfba773Sgilles } __packed; 7172b51a117Snate 7182b51a117Snate struct aac_AifJobProgressReport { 7192b51a117Snate struct aac_AifJobDesc jd; 7202b51a117Snate AAC_AifJobStatus status; 7212b51a117Snate u_int32_t finalTick; 7222b51a117Snate u_int32_t currentTick; 7232b51a117Snate u_int32_t jobSpecificData1; 7242b51a117Snate u_int32_t jobSpecificData2; 7258bfba773Sgilles } __packed; 7262b51a117Snate 7272b51a117Snate /* 7282b51a117Snate * Event Notification 7292b51a117Snate */ 7302b51a117Snate typedef enum { 7312b51a117Snate /* General application notifies start here */ 7322b51a117Snate AifEnGeneric = 1, /* Generic notification */ 7332b51a117Snate AifEnTaskComplete, /* Task has completed */ 7342b51a117Snate AifEnConfigChange, /* Adapter config change occurred */ 7352b51a117Snate AifEnContainerChange, /* Adapter specific container 7362b51a117Snate * configuration change */ 7372b51a117Snate AifEnDeviceFailure, /* SCSI device failed */ 7382b51a117Snate AifEnMirrorFailover, /* Mirror failover started */ 7392b51a117Snate AifEnContainerEvent, /* Significant container event */ 7402b51a117Snate AifEnFileSystemChange, /* File system changed */ 7412b51a117Snate AifEnConfigPause, /* Container pause event */ 7422b51a117Snate AifEnConfigResume, /* Container resume event */ 7432b51a117Snate AifEnFailoverChange, /* Failover space assignment changed */ 7442b51a117Snate AifEnRAID5RebuildDone, /* RAID5 rebuild finished */ 7452b51a117Snate AifEnEnclosureManagement, /* Enclosure management event */ 7462b51a117Snate AifEnBatteryEvent, /* Significant NV battery event */ 7472b51a117Snate AifEnAddContainer, /* A new container was created. */ 7482b51a117Snate AifEnDeleteContainer, /* A container was deleted. */ 7492b51a117Snate AifEnSMARTEvent, /* SMART Event */ 7502b51a117Snate AifEnBatteryNeedsRecond, /* The battery needs reconditioning */ 7512b51a117Snate AifEnClusterEvent, /* Some cluster event */ 752*4b1a56afSjsg AifEnDiskSetEvent, /* A disk set event occurred. */ 7532b51a117Snate AifDriverNotifyStart=199, /* Notifies for host driver go here */ 7542b51a117Snate /* Host driver notifications start here */ 7552b51a117Snate AifDenMorphComplete, /* A morph operation completed */ 7562b51a117Snate AifDenVolumeExtendComplete /* Volume expand operation completed */ 7572b51a117Snate } AAC_AifEventNotifyType; 7582b51a117Snate 7592b51a117Snate struct aac_AifEnsGeneric { 7602b51a117Snate char text[132]; /* Generic text */ 7618bfba773Sgilles } __packed; 7622b51a117Snate 7632b51a117Snate struct aac_AifEnsDeviceFailure { 7642b51a117Snate u_int32_t deviceHandle; /* SCSI device handle */ 7658bfba773Sgilles } __packed; 7662b51a117Snate 7672b51a117Snate struct aac_AifEnsMirrorFailover { 7682b51a117Snate u_int32_t container; /* Container with failed element */ 7692b51a117Snate u_int32_t failedSlice; /* Old slice which failed */ 7702b51a117Snate u_int32_t creatingSlice; /* New slice used for auto-create */ 7718bfba773Sgilles } __packed; 7722b51a117Snate 7732b51a117Snate struct aac_AifEnsContainerChange { 7742b51a117Snate u_int32_t container[2]; /* container that changed, -1 if no 7752b51a117Snate * container */ 7768bfba773Sgilles } __packed; 7772b51a117Snate 7782b51a117Snate struct aac_AifEnsContainerEvent { 7792b51a117Snate u_int32_t container; /* container number */ 7802b51a117Snate u_int32_t eventType; /* event type */ 7818bfba773Sgilles } __packed; 7822b51a117Snate 7832b51a117Snate struct aac_AifEnsEnclosureEvent { 7842b51a117Snate u_int32_t empID; /* enclosure management proc number */ 7852b51a117Snate u_int32_t unitID; /* unitId, fan id, power supply id, 7862b51a117Snate * slot id, tempsensor id. */ 7872b51a117Snate u_int32_t eventType; /* event type */ 7888bfba773Sgilles } __packed; 7892b51a117Snate 7902b51a117Snate struct aac_AifEnsBatteryEvent { 7912b51a117Snate AAC_NVBATT_TRANSITION transition_type; /* eg from low to ok */ 7922b51a117Snate AAC_NVBATTSTATUS current_state; /* current batt state */ 7932b51a117Snate AAC_NVBATTSTATUS prior_state; /* prev batt state */ 7948bfba773Sgilles } __packed; 7952b51a117Snate 7962b51a117Snate struct aac_AifEnsDiskSetEvent { 7972b51a117Snate u_int32_t eventType; 7982b51a117Snate u_int64_t DsNum; 7992b51a117Snate u_int64_t CreatorId; 8008bfba773Sgilles } __packed; 8012b51a117Snate 8022b51a117Snate typedef enum { 8032b51a117Snate CLUSTER_NULL_EVENT = 0, 8042b51a117Snate CLUSTER_PARTNER_NAME_EVENT, /* change in partner hostname or 8052b51a117Snate * adaptername from NULL to non-NULL */ 8062b51a117Snate /* (partner's agent may be up) */ 8072b51a117Snate CLUSTER_PARTNER_NULL_NAME_EVENT /* change in partner hostname or 8082b51a117Snate * adaptername from non-null to NULL */ 8092b51a117Snate /* (partner has rebooted) */ 8102b51a117Snate } AAC_ClusterAifEvent; 8112b51a117Snate 8122b51a117Snate struct aac_AifEnsClusterEvent { 8132b51a117Snate AAC_ClusterAifEvent eventType; 8148bfba773Sgilles } __packed; 8152b51a117Snate 8162b51a117Snate struct aac_AifEventNotify { 8172b51a117Snate AAC_AifEventNotifyType type; 8182b51a117Snate union { 8192b51a117Snate struct aac_AifEnsGeneric EG; 8202b51a117Snate struct aac_AifEnsDeviceFailure EDF; 8212b51a117Snate struct aac_AifEnsMirrorFailover EMF; 8222b51a117Snate struct aac_AifEnsContainerChange ECC; 8232b51a117Snate struct aac_AifEnsContainerEvent ECE; 8242b51a117Snate struct aac_AifEnsEnclosureEvent EEE; 8252b51a117Snate struct aac_AifEnsBatteryEvent EBE; 8262b51a117Snate struct aac_AifEnsDiskSetEvent EDS; 8272b51a117Snate /* struct aac_AifEnsSMARTEvent ES;*/ 8282b51a117Snate struct aac_AifEnsClusterEvent ECLE; 8292b51a117Snate } data; 8308bfba773Sgilles } __packed; 8312b51a117Snate 8322b51a117Snate /* 8332b51a117Snate * Adapter Initiated FIB command structures. Start with the adapter 8342b51a117Snate * initiated FIBs that really come from the adapter, and get responded 8352b51a117Snate * to by the host. 8362b51a117Snate */ 8372b51a117Snate #define AAC_AIF_REPORT_MAX_SIZE 64 8382b51a117Snate 8392b51a117Snate typedef enum { 8402b51a117Snate AifCmdEventNotify = 1, /* Notify of event */ 8412b51a117Snate AifCmdJobProgress, /* Progress report */ 8422b51a117Snate AifCmdAPIReport, /* Report from other user of API */ 8432b51a117Snate AifCmdDriverNotify, /* Notify host driver of event */ 8442b51a117Snate AifReqJobList = 100, /* Gets back complete job list */ 8452b51a117Snate AifReqJobsForCtr, /* Gets back jobs for specific container */ 8462b51a117Snate AifReqJobsForScsi, /* Gets back jobs for specific SCSI device */ 8472b51a117Snate AifReqJobReport, /* Gets back a specific job report or list */ 8482b51a117Snate AifReqTerminateJob, /* Terminates job */ 8492b51a117Snate AifReqSuspendJob, /* Suspends a job */ 8502b51a117Snate AifReqResumeJob, /* Resumes a job */ 8512b51a117Snate AifReqSendAPIReport, /* API generic report requests */ 8522b51a117Snate AifReqAPIJobStart, /* Start a job from the API */ 8532b51a117Snate AifReqAPIJobUpdate, /* Update a job report from the API */ 8542b51a117Snate AifReqAPIJobFinish /* Finish a job from the API */ 8552b51a117Snate } AAC_AifCommand; 8562b51a117Snate 8572b51a117Snate struct aac_aif_command { 8582b51a117Snate AAC_AifCommand command; /* Tell host what type of 8592b51a117Snate * notify this is */ 8602b51a117Snate u_int32_t seqNumber; /* To allow ordering of 8612b51a117Snate * reports (if necessary) */ 8622b51a117Snate union { 8632b51a117Snate struct aac_AifEventNotify EN; /* Event notify */ 8642b51a117Snate struct aac_AifJobProgressReport PR[1]; /* Progress report */ 8652b51a117Snate u_int8_t AR[AAC_AIF_REPORT_MAX_SIZE]; 8662b51a117Snate u_int8_t data[AAC_FIB_DATASIZE - 8]; 8672b51a117Snate } data; 8688bfba773Sgilles } __packed; 8692b51a117Snate 8702b51a117Snate /* 8712b51a117Snate * Filesystem commands/data 8722b51a117Snate * 8732b51a117Snate * The adapter has a very complex filesystem interface, most of which we ignore. 8742b51a117Snate * (And which seems not to be implemented, anyway.) 8752b51a117Snate */ 8762b51a117Snate 8772b51a117Snate /* 8782b51a117Snate * FSA commands 8792b51a117Snate * (not used?) 8802b51a117Snate */ 8812b51a117Snate typedef enum { 8822b51a117Snate Null = 0, 8832b51a117Snate GetAttributes, 8842b51a117Snate SetAttributes, 8852b51a117Snate Lookup, 8862b51a117Snate ReadLink, 8872b51a117Snate Read, 8882b51a117Snate Write, 8892b51a117Snate Create, 8902b51a117Snate MakeDirectory, 8912b51a117Snate SymbolicLink, 8922b51a117Snate MakeNode, 8932b51a117Snate Removex, 8942b51a117Snate RemoveDirectory, 8952b51a117Snate Rename, 8962b51a117Snate Link, 8972b51a117Snate ReadDirectory, 8982b51a117Snate ReadDirectoryPlus, 8992b51a117Snate FileSystemStatus, 9002b51a117Snate FileSystemInfo, 9012b51a117Snate PathConfigure, 9022b51a117Snate Commit, 9032b51a117Snate Mount, 9042b51a117Snate UnMount, 9052b51a117Snate Newfs, 9062b51a117Snate FsCheck, 9072b51a117Snate FsSync, 9082b51a117Snate SimReadWrite, 9092b51a117Snate SetFileSystemStatus, 9102b51a117Snate BlockRead, 9112b51a117Snate BlockWrite, 9122b51a117Snate NvramIoctl, 9132b51a117Snate FsSyncWait, 9142b51a117Snate ClearArchiveBit, 9152b51a117Snate SetAcl, 9162b51a117Snate GetAcl, 9172b51a117Snate AssignAcl, 9182b51a117Snate FaultInsertion, 9192b51a117Snate CrazyCache 9202b51a117Snate } AAC_FSACommand; 9212b51a117Snate 9222b51a117Snate /* 9232b51a117Snate * Command status values 9242b51a117Snate */ 9252b51a117Snate typedef enum { 9262b51a117Snate ST_OK = 0, 9272b51a117Snate ST_PERM = 1, 9282b51a117Snate ST_NOENT = 2, 9292b51a117Snate ST_IO = 5, 9302b51a117Snate ST_NXIO = 6, 9312b51a117Snate ST_E2BIG = 7, 9322b51a117Snate ST_ACCES = 13, 9332b51a117Snate ST_EXIST = 17, 9342b51a117Snate ST_XDEV = 18, 9352b51a117Snate ST_NODEV = 19, 9362b51a117Snate ST_NOTDIR = 20, 9372b51a117Snate ST_ISDIR = 21, 9382b51a117Snate ST_INVAL = 22, 9392b51a117Snate ST_FBIG = 27, 9402b51a117Snate ST_NOSPC = 28, 9412b51a117Snate ST_ROFS = 30, 9422b51a117Snate ST_MLINK = 31, 9432b51a117Snate ST_WOULDBLOCK = 35, 9442b51a117Snate ST_NAMETOOLONG = 63, 9452b51a117Snate ST_NOTEMPTY = 66, 9462b51a117Snate ST_DQUOT = 69, 9472b51a117Snate ST_STALE = 70, 9482b51a117Snate ST_REMOTE = 71, 9492b51a117Snate ST_BADHANDLE = 10001, 9502b51a117Snate ST_NOT_SYNC = 10002, 9512b51a117Snate ST_BAD_COOKIE = 10003, 9522b51a117Snate ST_NOTSUPP = 10004, 9532b51a117Snate ST_TOOSMALL = 10005, 9542b51a117Snate ST_SERVERFAULT = 10006, 9552b51a117Snate ST_BADTYPE = 10007, 9562b51a117Snate ST_JUKEBOX = 10008, 9572b51a117Snate ST_NOTMOUNTED = 10009, 9582b51a117Snate ST_MAINTMODE = 10010, 9592b51a117Snate ST_STALEACL = 10011 9602b51a117Snate } AAC_FSAStatus; 9612b51a117Snate 9622b51a117Snate /* 9632b51a117Snate * Volume manager commands 9642b51a117Snate */ 9652b51a117Snate typedef enum _VM_COMMANDS { 9662b51a117Snate VM_Null = 0, 9672b51a117Snate VM_NameServe, 9682b51a117Snate VM_ContainerConfig, 9692b51a117Snate VM_Ioctl, 9702b51a117Snate VM_FilesystemIoctl, 9712b51a117Snate VM_CloseAll, 9722b51a117Snate VM_CtBlockRead, 9732b51a117Snate VM_CtBlockWrite, 9742b51a117Snate VM_SliceBlockRead, /* raw access to configured storage objects */ 9752b51a117Snate VM_SliceBlockWrite, 9762b51a117Snate VM_DriveBlockRead, /* raw access to physical devices */ 9772b51a117Snate VM_DriveBlockWrite, 9782b51a117Snate VM_EnclosureMgt, /* enclosure management */ 9792b51a117Snate VM_Unused, /* used to be diskset management */ 9802b51a117Snate VM_CtBlockVerify, 9812b51a117Snate VM_CtPerf, /* performance test */ 9822b51a117Snate VM_CtBlockRead64, 9832b51a117Snate VM_CtBlockWrite64, 9842b51a117Snate VM_CtBlockVerify64, 9852b51a117Snate VM_CtHostRead64, 9862b51a117Snate VM_CtHostWrite64, 9872b51a117Snate } AAC_VMCommand; 9882b51a117Snate 9892b51a117Snate /* 9902b51a117Snate * "mountable object" 9912b51a117Snate */ 9922b51a117Snate struct aac_mntobj { 9932b51a117Snate u_int32_t ObjectId; 9942b51a117Snate char FileSystemName[16]; 9952b51a117Snate struct aac_container_creation CreateInfo; 9962b51a117Snate u_int32_t Capacity; 9972b51a117Snate u_int32_t VolType; 9982b51a117Snate u_int32_t ObjType; 9992b51a117Snate u_int32_t ContentState; 10002b51a117Snate #define FSCS_READONLY 0x0002 /* XXX need more information 10012b51a117Snate * than this */ 10022b51a117Snate union { 10032b51a117Snate u_int32_t pad[8]; 10042b51a117Snate } ObjExtension; 10052b51a117Snate u_int32_t AlterEgoId; 10068bfba773Sgilles } __packed; 10072b51a117Snate 10082b51a117Snate struct aac_mntinfo { 10092b51a117Snate u_int32_t Command; 10102b51a117Snate u_int32_t MntType; 10112b51a117Snate u_int32_t MntCount; 10128bfba773Sgilles } __packed; 10132b51a117Snate 10142b51a117Snate struct aac_mntinforesp { 10152b51a117Snate u_int32_t Status; 10162b51a117Snate u_int32_t MntType; 10172b51a117Snate u_int32_t MntRespCount; 10182b51a117Snate struct aac_mntobj MntTable[1]; 10198bfba773Sgilles } __packed; 10202b51a117Snate 10212b51a117Snate /* 10222b51a117Snate * Container shutdown command. 10232b51a117Snate */ 10242b51a117Snate struct aac_closecommand { 10252b51a117Snate u_int32_t Command; 10262b51a117Snate u_int32_t ContainerId; 10278bfba773Sgilles } __packed; 10282b51a117Snate 10292b51a117Snate /* 10302b51a117Snate * Container Config Command 10312b51a117Snate */ 10322b51a117Snate #define CT_GET_SCSI_METHOD 64 10332b51a117Snate struct aac_ctcfg { 10342b51a117Snate u_int32_t Command; 10352b51a117Snate u_int32_t cmd; 10362b51a117Snate u_int32_t param; 10378bfba773Sgilles } __packed; 10382b51a117Snate 10392b51a117Snate struct aac_ctcfg_resp { 10402b51a117Snate u_int32_t Status; 10412b51a117Snate u_int32_t resp; 10422b51a117Snate u_int32_t param; 10438bfba773Sgilles } __packed; 10442b51a117Snate 10452b51a117Snate /* 1046*4b1a56afSjsg * 'Ioctl' commands 10472b51a117Snate */ 10482b51a117Snate #define AAC_SCSI_MAX_PORTS 10 10492b51a117Snate #define AAC_BUS_NO_EXIST 0 10502b51a117Snate #define AAC_BUS_VALID 1 10512b51a117Snate #define AAC_BUS_FAULTED 2 10522b51a117Snate #define AAC_BUS_DISABLED 3 10532b51a117Snate #define GetBusInfo 0x9 10542b51a117Snate 10552b51a117Snate struct aac_getbusinf { 10562b51a117Snate u_int32_t ProbeComplete; 10572b51a117Snate u_int32_t BusCount; 10582b51a117Snate u_int32_t TargetsPerBus; 10592b51a117Snate u_int8_t InitiatorBusId[AAC_SCSI_MAX_PORTS]; 10602b51a117Snate u_int8_t BusValid[AAC_SCSI_MAX_PORTS]; 10618bfba773Sgilles } __packed; 10622b51a117Snate 10632b51a117Snate struct aac_vmioctl { 10642b51a117Snate u_int32_t Command; 10652b51a117Snate u_int32_t ObjType; 10662b51a117Snate u_int32_t MethId; 10672b51a117Snate u_int32_t ObjId; 10682b51a117Snate u_int32_t IoctlCmd; 10692b51a117Snate u_int32_t IoctlBuf[1]; /* Placeholder? */ 10708bfba773Sgilles } __packed; 10712b51a117Snate 10722b51a117Snate struct aac_vmi_businf_resp { 10732b51a117Snate u_int32_t Status; 10742b51a117Snate u_int32_t ObjType; 10752b51a117Snate u_int32_t MethId; 10762b51a117Snate u_int32_t ObjId; 10772b51a117Snate u_int32_t IoctlCmd; 10782b51a117Snate struct aac_getbusinf BusInf; 10798bfba773Sgilles } __packed; 10802b51a117Snate 10812b51a117Snate #define AAC_BTL_TO_HANDLE(b, t, l) \ 10822b51a117Snate (((b & 0x3f) << 7) | ((l & 0x7) << 4) | (t & 0xf)) 10832b51a117Snate #define GetDeviceProbeInfo 0x5 10842b51a117Snate 10852b51a117Snate struct aac_vmi_devinfo_resp { 10862b51a117Snate u_int32_t Status; 10872b51a117Snate u_int32_t ObjType; 10882b51a117Snate u_int32_t MethId; 10892b51a117Snate u_int32_t ObjId; 10902b51a117Snate u_int32_t IoctlCmd; 10912b51a117Snate u_int8_t VendorId[8]; 10922b51a117Snate u_int8_t ProductId[16]; 10932b51a117Snate u_int8_t ProductRev[4]; 10942b51a117Snate u_int32_t Inquiry7; 10952b51a117Snate u_int32_t align1; 10962b51a117Snate u_int32_t Inquiry0; 10972b51a117Snate u_int32_t align2; 10982b51a117Snate u_int32_t Inquiry1; 10992b51a117Snate u_int32_t align3; 11002b51a117Snate u_int32_t reserved[2]; 11012b51a117Snate u_int8_t VendorSpecific[20]; 11022b51a117Snate u_int32_t Smart:1; 11032b51a117Snate u_int32_t AAC_Managed:1; 11042b51a117Snate u_int32_t align4; 11052b51a117Snate u_int32_t reserved2:6; 11062b51a117Snate u_int32_t Bus; 11072b51a117Snate u_int32_t Target; 11082b51a117Snate u_int32_t Lun; 11092b51a117Snate u_int32_t ultraEnable:1, 11102b51a117Snate disconnectEnable:1, 11112b51a117Snate fast20EnabledW:1, 11122b51a117Snate scamDevice:1, 11132b51a117Snate scamTolerant:1, 11142b51a117Snate setForSync:1, 11152b51a117Snate setForWide:1, 11162b51a117Snate syncDevice:1, 11172b51a117Snate wideDevice:1, 11182b51a117Snate reserved1:7, 11192b51a117Snate ScsiRate:8, 11202b51a117Snate ScsiOffset:8; 11212b51a117Snate }; /* Do not pack */ 11222b51a117Snate 11232b51a117Snate #define ResetBus 0x16 11242b51a117Snate struct aac_resetbus { 11252b51a117Snate u_int32_t BusNumber; 11262b51a117Snate }; 11272b51a117Snate 11282b51a117Snate /* 11292b51a117Snate * Write 'stability' options. 11302b51a117Snate */ 11312b51a117Snate typedef enum { 11322b51a117Snate CSTABLE = 1, 11332b51a117Snate CUNSTABLE 11342b51a117Snate } AAC_CacheLevel; 11352b51a117Snate 11362b51a117Snate /* 11372b51a117Snate * Commit level response for a write request. 11382b51a117Snate */ 11392b51a117Snate typedef enum { 11402b51a117Snate CMFILE_SYNC_NVRAM = 1, 11412b51a117Snate CMDATA_SYNC_NVRAM, 11422b51a117Snate CMFILE_SYNC, 11432b51a117Snate CMDATA_SYNC, 11442b51a117Snate CMUNSTABLE 11452b51a117Snate } AAC_CommitLevel; 11462b51a117Snate 11472b51a117Snate /* 11482b51a117Snate * Block read/write operations. 11492b51a117Snate * These structures are packed into the 'data' area in the FIB. 11502b51a117Snate */ 11512b51a117Snate 11522b51a117Snate struct aac_blockread { 11532b51a117Snate u_int32_t Command; /* not FSACommand! */ 11542b51a117Snate u_int32_t ContainerId; 11552b51a117Snate u_int32_t BlockNumber; 11562b51a117Snate u_int32_t ByteCount; 11572b51a117Snate struct aac_sg_table SgMap; /* variable size */ 11588bfba773Sgilles } __packed; 11592b51a117Snate 11602b51a117Snate struct aac_blockread64 { 11612b51a117Snate u_int32_t Command; 11622b51a117Snate u_int16_t ContainerId; 11632b51a117Snate u_int16_t SectorCount; 11642b51a117Snate u_int32_t BlockNumber; 11652b51a117Snate u_int16_t Pad; 11662b51a117Snate u_int16_t Flags; 11672b51a117Snate struct aac_sg_table64 SgMap64; 11688bfba773Sgilles } __packed; 11692b51a117Snate 11702b51a117Snate struct aac_blockread_response { 11712b51a117Snate u_int32_t Status; 11722b51a117Snate u_int32_t ByteCount; 11738bfba773Sgilles } __packed; 11742b51a117Snate 11752b51a117Snate struct aac_blockwrite { 11762b51a117Snate u_int32_t Command; /* not FSACommand! */ 11772b51a117Snate u_int32_t ContainerId; 11782b51a117Snate u_int32_t BlockNumber; 11792b51a117Snate u_int32_t ByteCount; 11802b51a117Snate u_int32_t Stable; 11812b51a117Snate struct aac_sg_table SgMap; /* variable size */ 11828bfba773Sgilles } __packed; 11832b51a117Snate 11842b51a117Snate struct aac_blockwrite64 { 11852b51a117Snate u_int32_t Command; /* not FSACommand! */ 11862b51a117Snate u_int16_t ContainerId; 11872b51a117Snate u_int16_t SectorCount; 11882b51a117Snate u_int32_t BlockNumber; 11892b51a117Snate u_int16_t Pad; 11902b51a117Snate u_int16_t Flags; 11912b51a117Snate struct aac_sg_table64 SgMap64; /* variable size */ 11928bfba773Sgilles } __packed; 11932b51a117Snate 11942b51a117Snate struct aac_blockwrite_response { 11952b51a117Snate u_int32_t Status; 11962b51a117Snate u_int32_t ByteCount; 11972b51a117Snate u_int32_t Committed; 11988bfba773Sgilles } __packed; 11992b51a117Snate 12002b51a117Snate /* 12012b51a117Snate * Container shutdown command. 12022b51a117Snate */ 12032b51a117Snate struct aac_close_command { 12042b51a117Snate u_int32_t Command; 12052b51a117Snate u_int32_t ContainerId; 12062b51a117Snate }; 12072b51a117Snate 12082b51a117Snate /* 12092b51a117Snate * SCSI Passthrough structures 12102b51a117Snate */ 12112b51a117Snate struct aac_srb32 { 12122b51a117Snate u_int32_t function; 12132b51a117Snate u_int32_t bus; 12142b51a117Snate u_int32_t target; 12152b51a117Snate u_int32_t lun; 12162b51a117Snate u_int32_t timeout; 12172b51a117Snate u_int32_t flags; 12182b51a117Snate u_int32_t data_len; 12192b51a117Snate u_int32_t retry_limit; 12202b51a117Snate u_int32_t cdb_len; 12212b51a117Snate u_int8_t cdb[16]; 12222b51a117Snate struct aac_sg_table sg_map32; 12232b51a117Snate }; 12242b51a117Snate 12252b51a117Snate enum { 12262b51a117Snate AAC_SRB_FUNC_EXECUTE_SCSI = 0x00, 12272b51a117Snate AAC_SRB_FUNC_CLAIM_DEVICE, 12282b51a117Snate AAC_SRB_FUNC_IO_CONTROL, 12292b51a117Snate AAC_SRB_FUNC_RECEIVE_EVENT, 12302b51a117Snate AAC_SRB_FUNC_RELEASE_QUEUE, 12312b51a117Snate AAC_SRB_FUNC_ATTACH_DEVICE, 12322b51a117Snate AAC_SRB_FUNC_RELEASE_DEVICE, 12332b51a117Snate AAC_SRB_FUNC_SHUTDOWN, 12342b51a117Snate AAC_SRB_FUNC_FLUSH, 12352b51a117Snate AAC_SRB_FUNC_ABORT_COMMAND = 0x10, 12362b51a117Snate AAC_SRB_FUNC_RELEASE_RECOVERY, 12372b51a117Snate AAC_SRB_FUNC_RESET_BUS, 12382b51a117Snate AAC_SRB_FUNC_RESET_DEVICE, 12392b51a117Snate AAC_SRB_FUNC_TERMINATE_IO, 12402b51a117Snate AAC_SRB_FUNC_FLUSH_QUEUE, 12412b51a117Snate AAC_SRB_FUNC_REMOVE_DEVICE, 12422b51a117Snate AAC_SRB_FUNC_DOMAIN_VALIDATION 12432b51a117Snate }; 12442b51a117Snate 12452b51a117Snate #define AAC_SRB_FLAGS_NO_DATA_XFER 0x0000 12462b51a117Snate #define AAC_SRB_FLAGS_DISABLE_DISCONNECT 0x0004 12472b51a117Snate #define AAC_SRB_FLAGS_DISABLE_SYNC_TRANSFER 0x0008 12482b51a117Snate #define AAC_SRB_FLAGS_BYPASS_FROZEN_QUEUE 0x0010 12492b51a117Snate #define AAC_SRB_FLAGS_DISABLE_AUTOSENSE 0x0020 12502b51a117Snate #define AAC_SRB_FLAGS_DATA_IN 0x0040 12512b51a117Snate #define AAC_SRB_FLAGS_DATA_OUT 0x0080 12522b51a117Snate #define AAC_SRB_FLAGS_UNSPECIFIED_DIRECTION \ 12532b51a117Snate (AAC_SRB_FLAGS_DATA_IN | AAC_SRB_FLAGS_DATA_OUT) 12542b51a117Snate 12552b51a117Snate #define AAC_HOST_SENSE_DATA_MAX 30 12562b51a117Snate 12572b51a117Snate struct aac_srb_response { 12582b51a117Snate u_int32_t fib_status; 12592b51a117Snate u_int32_t srb_status; 12602b51a117Snate u_int32_t scsi_status; 12612b51a117Snate u_int32_t data_len; 12622b51a117Snate u_int32_t sense_len; 12632b51a117Snate u_int8_t sense[AAC_HOST_SENSE_DATA_MAX]; 12642b51a117Snate }; 12652b51a117Snate 12662b51a117Snate enum { 12672b51a117Snate AAC_SRB_STS_PENDING = 0x00, 12682b51a117Snate AAC_SRB_STS_SUCCESS, 12692b51a117Snate AAC_SRB_STS_ABORTED, 12702b51a117Snate AAC_SRB_STS_ABORT_FAILED, 12712b51a117Snate AAC_SRB_STS_ERROR, 12722b51a117Snate AAC_SRB_STS_BUSY, 12732b51a117Snate AAC_SRB_STS_INVALID_REQUEST, 12742b51a117Snate AAC_SRB_STS_INVALID_PATH_ID, 12752b51a117Snate AAC_SRB_STS_NO_DEVICE, 12762b51a117Snate AAC_SRB_STS_TIMEOUT, 12772b51a117Snate AAC_SRB_STS_SELECTION_TIMEOUT, 12782b51a117Snate AAC_SRB_STS_COMMAND_TIMEOUT, 12792b51a117Snate AAC_SRB_STS_MESSAGE_REJECTED = 0x0D, 12802b51a117Snate AAC_SRB_STS_BUS_RESET, 12812b51a117Snate AAC_SRB_STS_PARITY_ERROR, 12822b51a117Snate AAC_SRB_STS_REQUEST_SENSE_FAILED, 12832b51a117Snate AAC_SRB_STS_NO_HBA, 12842b51a117Snate AAC_SRB_STS_DATA_OVERRUN, 12852b51a117Snate AAC_SRB_STS_UNEXPECTED_BUS_FREE, 12862b51a117Snate AAC_SRB_STS_PHASE_SEQUENCE_FAILURE, 12872b51a117Snate AAC_SRB_STS_BAD_SRB_BLOCK_LENGTH, 12882b51a117Snate AAC_SRB_STS_REQUEST_FLUSHED, 12892b51a117Snate AAC_SRB_STS_INVALID_LUN = 0x20, 12902b51a117Snate AAC_SRB_STS_INVALID_TARGET_ID, 12912b51a117Snate AAC_SRB_STS_BAD_FUNCTION, 12922b51a117Snate AAC_SRB_STS_ERROR_RECOVERY 12932b51a117Snate }; 12942b51a117Snate 12952b51a117Snate /* 12962b51a117Snate * Register set for adapters based on the Falcon bridge and PPC core 12972b51a117Snate */ 12982b51a117Snate 12992b51a117Snate #define AAC_FA_DOORBELL0_CLEAR 0x00 13002b51a117Snate #define AAC_FA_DOORBELL1_CLEAR 0x02 13012b51a117Snate #define AAC_FA_DOORBELL0 0x04 13022b51a117Snate #define AAC_FA_DOORBELL1 0x06 13032b51a117Snate #define AAC_FA_MASK0_CLEAR 0x08 13042b51a117Snate #define AAC_FA_MASK1_CLEAR 0x0a 13052b51a117Snate #define AAC_FA_MASK0 0x0c 13062b51a117Snate #define AAC_FA_MASK1 0x0e 13072b51a117Snate #define AAC_FA_MAILBOX 0x10 13082b51a117Snate #define AAC_FA_FWSTATUS 0x2c /* Mailbox 7 */ 13092b51a117Snate #define AAC_FA_INTSRC 0x900 13102b51a117Snate 13112b51a117Snate #define AAC_FA_HACK(sc) (void)AAC_GETREG4(sc, AAC_FA_INTSRC) 13122b51a117Snate 13132b51a117Snate /* 13142b51a117Snate * Register definitions for the Adaptec AAC-364 'Jalapeno I/II' adapters, based 13152b51a117Snate * on the SA110 'StrongArm'. 13162b51a117Snate */ 13172b51a117Snate 131800e92e12Sgrange #define AAC_REGSIZE 0x2000 13192b51a117Snate 13202b51a117Snate #define AAC_SA_DOORBELL0_CLEAR 0x98 /* doorbell 0 (adapter->host) */ 13212b51a117Snate #define AAC_SA_DOORBELL0_SET 0x9c 13222b51a117Snate #define AAC_SA_DOORBELL0 0x9c 13232b51a117Snate #define AAC_SA_MASK0_CLEAR 0xa0 13242b51a117Snate #define AAC_SA_MASK0_SET 0xa4 13252b51a117Snate 13262b51a117Snate #define AAC_SA_DOORBELL1_CLEAR 0x9a /* doorbell 1 (host->adapter) */ 13272b51a117Snate #define AAC_SA_DOORBELL1_SET 0x9e 13282b51a117Snate #define AAC_SA_DOORBELL1 0x9e 13292b51a117Snate #define AAC_SA_MASK1_CLEAR 0xa2 13302b51a117Snate #define AAC_SA_MASK1_SET 0xa6 13312b51a117Snate 13322b51a117Snate #define AAC_SA_MAILBOX 0xa8 /* mailbox (20 bytes) */ 13332b51a117Snate #define AAC_SA_FWSTATUS 0xc4 13342b51a117Snate 13352b51a117Snate /* 13362b51a117Snate * Register definitions for the Adaptec 'Pablano' adapters, based on the i960Rx, 13372b51a117Snate * and other related adapters. 13382b51a117Snate */ 13392b51a117Snate 13402b51a117Snate #define AAC_RX_IDBR 0x20 /* inbound doorbell register */ 13412b51a117Snate #define AAC_RX_IISR 0x24 /* inbound interrupt status register */ 13422b51a117Snate #define AAC_RX_IIMR 0x28 /* inbound interrupt mask register */ 13432b51a117Snate #define AAC_RX_ODBR 0x2c /* outbound doorbell register */ 13442b51a117Snate #define AAC_RX_OISR 0x30 /* outbound interrupt status register */ 13452b51a117Snate #define AAC_RX_OIMR 0x34 /* outbound interrupt mask register */ 13462b51a117Snate 13472b51a117Snate #define AAC_RX_MAILBOX 0x50 /* mailbox (20 bytes) */ 13482b51a117Snate #define AAC_RX_FWSTATUS 0x6c 13492b51a117Snate 13502b51a117Snate /* 135135533a9fSbrad * Register definitions for the Adaptec 'Rocket' RAID-On-Chip adapters. 135235533a9fSbrad * Unsurprisingly, it's quite similar to the i960! 135335533a9fSbrad */ 135435533a9fSbrad 135535533a9fSbrad #define AAC_RKT_IDBR 0x20 /* inbound doorbell register */ 135635533a9fSbrad #define AAC_RKT_IISR 0x24 /* inbound interrupt status register */ 135735533a9fSbrad #define AAC_RKT_IIMR 0x28 /* inbound interrupt mask register */ 135835533a9fSbrad #define AAC_RKT_ODBR 0x2c /* outbound doorbell register */ 135935533a9fSbrad #define AAC_RKT_OISR 0x30 /* outbound interrupt status register */ 136035533a9fSbrad #define AAC_RKT_OIMR 0x34 /* outbound interrupt mask register */ 136135533a9fSbrad 136235533a9fSbrad #define AAC_RKT_MAILBOX 0x1000 /* mailbox */ 136335533a9fSbrad #define AAC_RKT_FWSTATUS 0x101c /* Firmware Status (mailbox 7) */ 136435533a9fSbrad 136535533a9fSbrad /* 13662b51a117Snate * Common bit definitions for the doorbell registers. 13672b51a117Snate */ 13682b51a117Snate 13692b51a117Snate /* 13702b51a117Snate * Status bits in the doorbell registers. 13712b51a117Snate */ 13722b51a117Snate #define AAC_DB_SYNC_COMMAND (1<<0) /* send/completed synchronous FIB */ 13732b51a117Snate #define AAC_DB_COMMAND_READY (1<<1) /* posted one or more commands */ 13742b51a117Snate #define AAC_DB_RESPONSE_READY (1<<2) /* one or more commands complete */ 13752b51a117Snate #define AAC_DB_COMMAND_NOT_FULL (1<<3) /* command queue not full */ 13762b51a117Snate #define AAC_DB_RESPONSE_NOT_FULL (1<<4) /* response queue not full */ 13772b51a117Snate 13782b51a117Snate /* 13792b51a117Snate * The adapter can request the host print a message by setting the 13802b51a117Snate * DB_PRINTF flag in DOORBELL0. The driver responds by collecting the 13812b51a117Snate * message from the printf buffer, clearing the DB_PRINTF flag in 13822b51a117Snate * DOORBELL0 and setting it in DOORBELL1. 13832b51a117Snate * (ODBR and IDBR respectively for the i960Rx adapters) 13842b51a117Snate */ 13852b51a117Snate #define AAC_DB_PRINTF (1<<5) /* adapter requests host printf */ 13862b51a117Snate #define AAC_PRINTF_DONE (1<<5) /* Host completed printf processing */ 13872b51a117Snate 13882b51a117Snate /* 13892b51a117Snate * Mask containing the interrupt bits we care about. We don't anticipate (or 13902b51a117Snate * want) interrupts not in this mask. 13912b51a117Snate */ 13922b51a117Snate #define AAC_DB_INTERRUPTS (AAC_DB_COMMAND_READY | \ 13932b51a117Snate AAC_DB_RESPONSE_READY | \ 13942b51a117Snate AAC_DB_PRINTF) 1395