1 /* $OpenBSD: cy.c,v 1.16 2002/01/30 20:45:34 nordin Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Uses CD1400 automatic CTS flow control, and 14 * if CY_HW_RTS is defined, uses CD1400 automatic input flow control. 15 * This requires a special cable that exchanges the RTS and DTR lines. 16 * 17 * Lots of debug output can be enabled by defining CY_DEBUG 18 * Some debugging counters (number of receive/transmit interrupts etc.) 19 * can be enabled by defining CY_DEBUG1 20 * 21 * This version uses the bus_space/io_??() stuff 22 * 23 */ 24 25 /* NCY is the number of Cyclom cards in the machine */ 26 #include "cy.h" 27 #if NCY > 0 28 29 #include <sys/types.h> 30 #include <sys/param.h> 31 #include <sys/ioctl.h> 32 #include <sys/syslog.h> 33 #include <sys/fcntl.h> 34 #include <sys/tty.h> 35 #include <sys/proc.h> 36 #include <sys/conf.h> 37 #include <sys/user.h> 38 #include <sys/select.h> 39 #include <sys/device.h> 40 #include <sys/malloc.h> 41 #include <sys/systm.h> 42 43 #include <machine/bus.h> 44 #include <machine/intr.h> 45 46 #if NCY_ISA > 0 47 #include <dev/isa/isavar.h> 48 #include <dev/isa/isareg.h> 49 #endif /* NCY_ISA > 0 */ 50 #if NCY_PCI > 0 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcidevs.h> 54 #endif /* NCY_PCI > 0 */ 55 56 #include <dev/ic/cd1400reg.h> 57 #include <dev/ic/cyreg.h> 58 59 60 void cy_attach __P((struct device *, struct device *, void *)); 61 int cy_probe_common __P((int, bus_space_tag_t, bus_space_handle_t, int)); 62 int cy_intr __P((void *)); 63 int cyparam __P((struct tty *, struct termios *)); 64 void cystart __P((struct tty *)); 65 void cy_poll __P((void *)); 66 int cy_modem_control __P((struct cy_port *, int, int)); 67 void cy_enable_transmitter __P((struct cy_port *)); 68 void cd1400_channel_cmd __P((struct cy_port *, int)); 69 int cy_speed __P((speed_t, int *, int *, int)); 70 71 struct cfdriver cy_cd = { 72 NULL, "cy", DV_TTY 73 }; 74 75 static int cy_nr_cd1400s[NCY]; 76 static int cy_bus_types[NCY]; 77 static bus_space_handle_t cy_card_memh[NCY]; 78 static int cy_open = 0; 79 static int cy_events = 0; 80 81 struct timeout cy_poll_to; 82 83 /* 84 * Common probe routine 85 */ 86 int 87 cy_probe_common(card, memt, memh, bustype) 88 int card, bustype; 89 bus_space_tag_t memt; 90 bus_space_handle_t memh; 91 { 92 int cy_chip, chip_offs; 93 u_char firmware_ver; 94 95 /* Cyclom card hardware reset */ 96 bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0); 97 DELAY(500); /* wait for reset to complete */ 98 bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0); 99 100 #ifdef CY_DEBUG 101 printf("cy: card reset done\n"); 102 #endif 103 104 cy_nr_cd1400s[card] = 0; 105 106 for (cy_chip = 0, chip_offs = 0; 107 cy_chip < CY_MAX_CD1400s; 108 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING << bustype)) { 109 int i; 110 111 /* the last 4 cd1400s are 'interleaved' 112 with the first 4 on 32-port boards */ 113 if (cy_chip == 4) 114 chip_offs -= (CY32_ADDR_FIX << bustype); 115 116 #ifdef CY_DEBUG 117 printf("cy%d probe chip %d offset 0x%lx ... ", 118 card, cy_chip, chip_offs); 119 #endif 120 121 /* wait until the chip is ready for command */ 122 DELAY(1000); 123 if (bus_space_read_1(memt, memh, chip_offs + 124 ((CD1400_CCR << 1) << bustype)) != 0) { 125 #ifdef CY_DEBUG 126 printf("not ready for command\n"); 127 #endif 128 break; 129 } 130 131 /* clear the firmware version reg. */ 132 bus_space_write_1(memt, memh, chip_offs + 133 ((CD1400_GFRCR << 1) << bustype), 0); 134 135 /* 136 * On Cyclom-16 references to non-existent chip 4 137 * actually access chip 0 (address line 9 not decoded). 138 * Here we check if the clearing of chip 4 GFRCR actually 139 * cleared chip 0 GFRCR. In that case we have a 16 port card. 140 */ 141 if (cy_chip == 4 && 142 bus_space_read_1(memt, memh, chip_offs + 143 ((CD1400_GFRCR << 1) << bustype)) == 0) 144 break; 145 146 /* reset the chip */ 147 bus_space_write_1(memt, memh, chip_offs + 148 ((CD1400_CCR << 1) << bustype), 149 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 150 151 /* wait for the chip to initialize itself */ 152 for (i = 0; i < 200; i++) { 153 DELAY(50); 154 firmware_ver = bus_space_read_1(memt, memh, chip_offs + 155 ((CD1400_GFRCR << 1) << bustype)); 156 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 157 break; 158 } 159 #ifdef CY_DEBUG 160 printf("firmware version 0x%x\n", firmware_ver); 161 #endif 162 163 if ((firmware_ver & 0xf0) != 0x40) 164 break; 165 166 /* firmware version OK, CD1400 found */ 167 cy_nr_cd1400s[card]++; 168 } 169 170 if (cy_nr_cd1400s[card] == 0) { 171 #ifdef CY_DEBUG 172 printf("no CD1400s found\n"); 173 #endif 174 return (0); 175 } 176 177 #ifdef CY_DEBUG 178 printf("found %d CD1400s\n", cy_nr_cd1400s[card]); 179 #endif 180 181 cy_card_memh[card] = memh; 182 cy_bus_types[card] = bustype; 183 184 return (1); 185 } 186 187 void 188 cy_attach(parent, self, aux) 189 struct device *parent, *self; 190 void *aux; 191 { 192 int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock; 193 struct cy_softc *sc = (void *)self; 194 195 card = sc->sc_dev.dv_unit; 196 num_chips = cy_nr_cd1400s[card]; 197 if (num_chips == 0) 198 return; 199 200 sc->sc_bustype = cy_bus_types[card]; 201 sc->sc_memh = cy_card_memh[card]; 202 switch (sc->sc_bustype) { 203 #if NCY_ISA > 0 204 case CY_BUSTYPE_ISA: 205 sc->sc_memt = ((struct isa_attach_args *)(aux))->ia_memt; 206 break; 207 #endif 208 #if NCY_PCI > 0 209 case CY_BUSTYPE_PCI: 210 sc->sc_memt = ((struct pci_attach_args *)aux)->pa_memt; 211 break; 212 #endif 213 } 214 215 if (!timeout_initialized(&cy_poll_to)) 216 timeout_set(&cy_poll_to, cy_poll, NULL); 217 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 218 sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS; 219 220 port = 0; 221 for (cy_chip = 0, chip_offs = 0; 222 cy_chip < num_chips; 223 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) { 224 if (cy_chip == 4) 225 chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype); 226 227 #ifdef CY_DEBUG 228 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs); 229 #endif 230 sc->sc_cd1400_offs[cy_chip] = chip_offs; 231 232 /* configure port 0 as serial port 233 (should already be after reset) */ 234 cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0); 235 236 /* Set cy_clock depending on firmware version */ 237 if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46) 238 cy_clock = CY_CLOCK; 239 else 240 cy_clock = CY_CLOCK_60; 241 242 /* set up a receive timeout period (1ms) */ 243 cd_write_reg_sc(sc, cy_chip, CD1400_PPR, 244 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 245 246 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 247 sc->sc_ports[port].cy_port_num = port; 248 sc->sc_ports[port].cy_memt = sc->sc_memt; 249 sc->sc_ports[port].cy_memh = sc->sc_memh; 250 sc->sc_ports[port].cy_chip_offs = chip_offs; 251 sc->sc_ports[port].cy_bustype = sc->sc_bustype; 252 sc->sc_ports[port].cy_clock = cy_clock; 253 254 /* should we initialize anything else here? */ 255 port++; 256 } /* for(each port on one CD1400...) */ 257 258 } /* for(each CD1400 on a card... ) */ 259 260 #if CY_DEBUG 261 printf("cy: %d ports\n", port); 262 #endif 263 264 /* ensure an edge for the next interrupt */ 265 bus_space_write_1(sc->sc_memt, sc->sc_memh, 266 CY_CLEAR_INTR<<sc->sc_bustype, 0); 267 268 switch (sc->sc_bustype) { 269 #if NCY_ISA > 0 270 case CY_BUSTYPE_ISA: 271 { 272 struct isa_attach_args *ia = aux; 273 274 sc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq, 275 IST_EDGE, IPL_TTY, cy_intr, sc, sc->sc_dev.dv_xname); 276 277 if (sc->sc_ih == NULL) 278 panic("cy: couldn't establish interrupt"); 279 } 280 break; 281 #endif /* NCY_ISA > 0 */ 282 case CY_BUSTYPE_PCI: 283 break; 284 } 285 } 286 287 /* 288 * open routine. returns zero if successfull, else error code 289 */ 290 int cyopen __P((dev_t, int, int, struct proc *)); 291 int cyclose __P((dev_t, int, int, struct proc *)); 292 int cyread __P((dev_t, struct uio *, int)); 293 int cywrite __P((dev_t, struct uio *, int)); 294 struct tty *cytty __P((dev_t)); 295 int cyioctl __P((dev_t, u_long, caddr_t, int, struct proc *)); 296 int cystop __P((struct tty *, int flag)); 297 298 int 299 cyopen(dev, flag, mode, p) 300 dev_t dev; 301 int flag, mode; 302 struct proc *p; 303 { 304 int card = CY_CARD(dev); 305 int port = CY_PORT(dev); 306 struct cy_softc *sc; 307 struct cy_port *cy; 308 struct tty *tp; 309 int s, error; 310 311 #ifdef CY_DEBUG 312 printf("cy%d open port %d flag 0x%x mode 0x%x\n", 313 card, port, flag, mode); 314 #endif 315 316 if (card >= cy_cd.cd_ndevs || 317 (sc = cy_cd.cd_devs[card]) == NULL) 318 return (ENXIO); 319 320 cy = &sc->sc_ports[port]; 321 322 s = spltty(); 323 if (cy->cy_tty == NULL) { 324 if ((cy->cy_tty = ttymalloc()) == NULL) { 325 splx(s); 326 printf("cy%d port %d open: can't allocate tty\n", 327 card, port); 328 return (ENOMEM); 329 } 330 } 331 splx(s); 332 333 tp = cy->cy_tty; 334 tty_attach(tp); 335 tp = cy->cy_tty; 336 tp->t_oproc = cystart; 337 tp->t_param = cyparam; 338 tp->t_dev = dev; 339 340 if (!ISSET(tp->t_state, TS_ISOPEN)) { 341 SET(tp->t_state, TS_WOPEN); 342 ttychars(tp); 343 tp->t_iflag = TTYDEF_IFLAG; 344 tp->t_oflag = TTYDEF_OFLAG; 345 tp->t_cflag = TTYDEF_CFLAG; 346 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 347 SET(tp->t_cflag, CLOCAL); 348 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 349 SET(tp->t_cflag, CRTSCTS); 350 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 351 SET(tp->t_cflag, MDMBUF); 352 tp->t_lflag = TTYDEF_LFLAG; 353 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 354 355 s = spltty(); 356 357 /* 358 * Allocate input ring buffer if we don't already have one 359 */ 360 if (cy->cy_ibuf == NULL) { 361 cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT); 362 if (cy->cy_ibuf == NULL) { 363 printf("cy%d: (port %d) can't allocate input buffer\n", 364 card, port); 365 splx(s); 366 return (ENOMEM); 367 } 368 cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE; 369 } 370 371 /* mark the ring buffer as empty */ 372 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 373 374 /* select CD1400 channel */ 375 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 376 /* reset the channel */ 377 cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET); 378 /* encode unit (port) number in LIVR */ 379 /* there is just enough space for 5 bits (32 ports) */ 380 cd_write_reg(cy, CD1400_LIVR, port << 3); 381 382 cy->cy_channel_control = 0; 383 384 /* hmm... need spltty() here? */ 385 if (cy_open == 0) { 386 cy_open = 1; 387 timeout_add(&cy_poll_to, 1); 388 } 389 390 /* this sets parameters and raises DTR */ 391 cyparam(tp, &tp->t_termios); 392 393 ttsetwater(tp); 394 395 /* raise RTS too */ 396 cy_modem_control(cy, TIOCM_RTS, DMBIS); 397 398 cy->cy_carrier_stat = cd_read_reg(cy, CD1400_MSVR2); 399 400 /* enable receiver and modem change interrupts */ 401 cd_write_reg(cy, CD1400_SRER, 402 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 403 404 if (CY_DIALOUT(dev) || 405 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 406 ISSET(tp->t_cflag, MDMBUF) || 407 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 408 SET(tp->t_state, TS_CARR_ON); 409 else 410 CLR(tp->t_state, TS_CARR_ON); 411 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) { 412 return (EBUSY); 413 } else { 414 s = spltty(); 415 } 416 417 /* wait for carrier if necessary */ 418 if (!ISSET(flag, O_NONBLOCK)) { 419 while (!ISSET(tp->t_cflag, CLOCAL) && 420 !ISSET(tp->t_state, TS_CARR_ON)) { 421 SET(tp->t_state, TS_WOPEN); 422 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 423 "cydcd", 0); 424 if (error != 0) { 425 splx(s); 426 CLR(tp->t_state, TS_WOPEN); 427 return (error); 428 } 429 } 430 } 431 432 splx(s); 433 434 return (*linesw[tp->t_line].l_open)(dev, tp); 435 } 436 437 /* 438 * close routine. returns zero if successfull, else error code 439 */ 440 int 441 cyclose(dev, flag, mode, p) 442 dev_t dev; 443 int flag, mode; 444 struct proc *p; 445 { 446 int card = CY_CARD(dev); 447 int port = CY_PORT(dev); 448 struct cy_softc *sc = cy_cd.cd_devs[card]; 449 struct cy_port *cy = &sc->sc_ports[port]; 450 struct tty *tp = cy->cy_tty; 451 int s; 452 453 #ifdef CY_DEBUG 454 printf("cy%d close port %d, flag 0x%x, mode 0x%x\n", 455 card, port, flag, mode); 456 #endif 457 458 (*linesw[tp->t_line].l_close)(tp, flag); 459 s = spltty(); 460 461 if (ISSET(tp->t_cflag, HUPCL) && 462 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 463 /* drop DTR and RTS 464 (should we wait for output buffer to become empty first?) */ 465 cy_modem_control(cy, 0, DMSET); 466 } 467 468 /* 469 * XXX should we disable modem change and 470 * receive interrupts here or somewhere ? 471 */ 472 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 473 474 splx(s); 475 ttyclose(tp); 476 477 return (0); 478 } 479 480 /* 481 * Read routine 482 */ 483 int 484 cyread(dev, uio, flag) 485 dev_t dev; 486 struct uio *uio; 487 int flag; 488 { 489 int card = CY_CARD(dev); 490 int port = CY_PORT(dev); 491 struct cy_softc *sc = cy_cd.cd_devs[card]; 492 struct cy_port *cy = &sc->sc_ports[port]; 493 struct tty *tp = cy->cy_tty; 494 495 #ifdef CY_DEBUG 496 printf("cy%d read port %d uio 0x%x flag 0x%x\n", 497 card, port, uio, flag); 498 #endif 499 500 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 501 } 502 503 /* 504 * Write routine 505 */ 506 int 507 cywrite(dev, uio, flag) 508 dev_t dev; 509 struct uio *uio; 510 int flag; 511 { 512 int card = CY_CARD(dev); 513 int port = CY_PORT(dev); 514 struct cy_softc *sc = cy_cd.cd_devs[card]; 515 struct cy_port *cy = &sc->sc_ports[port]; 516 struct tty *tp = cy->cy_tty; 517 518 #ifdef CY_DEBUG 519 printf("cy%d write port %d uio 0x%x flag 0x%x\n", 520 card, port, uio, flag); 521 #endif 522 523 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 524 } 525 526 /* 527 * return tty pointer 528 */ 529 struct tty * 530 cytty(dev) 531 dev_t dev; 532 { 533 int card = CY_CARD(dev); 534 int port = CY_PORT(dev); 535 struct cy_softc *sc = cy_cd.cd_devs[card]; 536 struct cy_port *cy = &sc->sc_ports[port]; 537 struct tty *tp = cy->cy_tty; 538 539 #ifdef CY_DEBUG 540 printf("cy%d tty port %d tp 0x%x\n", 541 card, port, tp); 542 #endif 543 544 return (tp); 545 } 546 547 /* 548 * ioctl routine 549 */ 550 int 551 cyioctl(dev, cmd, data, flag, p) 552 dev_t dev; 553 u_long cmd; 554 caddr_t data; 555 int flag; 556 struct proc *p; 557 { 558 int card = CY_CARD(dev); 559 int port = CY_PORT(dev); 560 struct cy_softc *sc = cy_cd.cd_devs[card]; 561 struct cy_port *cy = &sc->sc_ports[port]; 562 struct tty *tp = cy->cy_tty; 563 int error; 564 565 #ifdef CY_DEBUG 566 printf("cy%d port %d ioctl cmd 0x%x data 0x%x flag 0x%x\n", 567 card, port, cmd, data, flag); 568 #endif 569 570 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 571 if (error >= 0) 572 return (error); 573 574 error = ttioctl(tp, cmd, data, flag, p); 575 if (error >= 0) 576 return (error); 577 578 /* XXX should not allow dropping DTR when dialin? */ 579 580 switch (cmd) { 581 case TIOCSBRK: /* start break */ 582 SET(cy->cy_flags, CYF_START_BREAK); 583 cy_enable_transmitter(cy); 584 break; 585 586 case TIOCCBRK: /* stop break */ 587 SET(cy->cy_flags, CYF_END_BREAK); 588 cy_enable_transmitter(cy); 589 break; 590 591 case TIOCSDTR: /* DTR on */ 592 cy_modem_control(cy, TIOCM_DTR, DMBIS); 593 break; 594 595 case TIOCCDTR: /* DTR off */ 596 cy_modem_control(cy, TIOCM_DTR, DMBIC); 597 break; 598 599 case TIOCMSET: /* set new modem control line values */ 600 cy_modem_control(cy, *((int *)data), DMSET); 601 break; 602 603 case TIOCMBIS: /* turn modem control bits on */ 604 cy_modem_control(cy, *((int *)data), DMBIS); 605 break; 606 607 case TIOCMBIC: /* turn modem control bits off */ 608 cy_modem_control(cy, *((int *)data), DMBIC); 609 break; 610 611 case TIOCMGET: /* get modem control/status line state */ 612 *((int *)data) = cy_modem_control(cy, 0, DMGET); 613 break; 614 615 case TIOCGFLAGS: 616 *((int *)data) = cy->cy_openflags | 617 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 618 break; 619 620 case TIOCSFLAGS: 621 error = suser(p->p_ucred, &p->p_acflag); 622 if (error != 0) 623 return (EPERM); 624 625 cy->cy_openflags = *((int *)data) & 626 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 627 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 628 break; 629 630 default: 631 return (ENOTTY); 632 } 633 634 return (0); 635 } 636 637 /* 638 * start output 639 */ 640 void 641 cystart(tp) 642 struct tty *tp; 643 { 644 int card = CY_CARD(tp->t_dev); 645 int port = CY_PORT(tp->t_dev); 646 struct cy_softc *sc = cy_cd.cd_devs[card]; 647 struct cy_port *cy = &sc->sc_ports[port]; 648 int s; 649 650 #ifdef CY_DEBUG 651 printf("cy%d port %d start, tty 0x%x\n", card, port, tp); 652 #endif 653 654 s = spltty(); 655 656 #ifdef CY_DEBUG1 657 cy->cy_start_count++; 658 #endif 659 660 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 661 if (tp->t_outq.c_cc <= tp->t_lowat) { 662 if (ISSET(tp->t_state, TS_ASLEEP)) { 663 CLR(tp->t_state, TS_ASLEEP); 664 wakeup(&tp->t_outq); 665 } 666 667 selwakeup(&tp->t_wsel); 668 669 if (tp->t_outq.c_cc == 0) 670 goto out; 671 } 672 673 SET(tp->t_state, TS_BUSY); 674 cy_enable_transmitter(cy); 675 } 676 out: 677 678 splx(s); 679 } 680 681 /* 682 * stop output 683 */ 684 int 685 cystop(tp, flag) 686 struct tty *tp; 687 int flag; 688 { 689 int card = CY_CARD(tp->t_dev); 690 int port = CY_PORT(tp->t_dev); 691 struct cy_softc *sc = cy_cd.cd_devs[card]; 692 struct cy_port *cy = &sc->sc_ports[port]; 693 int s; 694 695 #ifdef CY_DEBUG 696 printf("cy%d port %d stop tty 0x%x flag 0x%x\n", 697 card, port, tp, flag); 698 #endif 699 700 s = spltty(); 701 702 if (ISSET(tp->t_state, TS_BUSY)) { 703 if (!ISSET(tp->t_state, TS_TTSTOP)) 704 SET(tp->t_state, TS_FLUSH); 705 706 /* 707 * the transmit interrupt routine will disable transmit when it 708 * notices that CYF_STOP has been set. 709 */ 710 SET(cy->cy_flags, CYF_STOP); 711 } 712 splx(s); 713 return (0); 714 } 715 716 /* 717 * parameter setting routine. 718 * returns 0 if successfull, else returns error code 719 */ 720 int 721 cyparam(tp, t) 722 struct tty *tp; 723 struct termios *t; 724 { 725 int card = CY_CARD(tp->t_dev); 726 int port = CY_PORT(tp->t_dev); 727 struct cy_softc *sc = cy_cd.cd_devs[card]; 728 struct cy_port *cy = &sc->sc_ports[port]; 729 int ibpr, obpr, i_clk_opt, o_clk_opt; 730 int s, opt; 731 732 #ifdef CY_DEBUG 733 printf("cy%d port %d param tty 0x%x termios 0x%x\n", 734 card, port, tp, t); 735 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 736 #endif 737 738 if (t->c_ospeed != 0 && 739 cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 740 return (EINVAL); 741 742 if (t->c_ispeed != 0 && 743 cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 744 return (EINVAL); 745 746 s = spltty(); 747 748 /* hang up the line is ospeed is zero, else turn DTR on */ 749 cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 750 751 /* channel was selected by the above call to cy_modem_control() */ 752 /* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */ 753 754 /* set transmit speed */ 755 if (t->c_ospeed != 0) { 756 cd_write_reg(cy, CD1400_TCOR, o_clk_opt); 757 cd_write_reg(cy, CD1400_TBPR, obpr); 758 } 759 /* set receive speed */ 760 if (t->c_ispeed != 0) { 761 cd_write_reg(cy, CD1400_RCOR, i_clk_opt); 762 cd_write_reg(cy, CD1400_RBPR, ibpr); 763 } 764 765 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 766 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 767 768 if (opt != cy->cy_channel_control) { 769 cy->cy_channel_control = opt; 770 cd1400_channel_cmd(cy, opt); 771 } 772 773 /* compute COR1 contents */ 774 opt = 0; 775 if (ISSET(t->c_cflag, PARENB)) { 776 if (ISSET(t->c_cflag, PARODD)) 777 opt |= CD1400_COR1_PARODD; 778 opt |= CD1400_COR1_PARNORMAL; 779 } 780 781 if (!ISSET(t->c_iflag, INPCK)) 782 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 783 784 if (ISSET(t->c_cflag, CSTOPB)) 785 opt |= CD1400_COR1_STOP2; 786 787 switch (t->c_cflag & CSIZE) { 788 case CS5: 789 opt |= CD1400_COR1_CS5; 790 break; 791 792 case CS6: 793 opt |= CD1400_COR1_CS6; 794 break; 795 796 case CS7: 797 opt |= CD1400_COR1_CS7; 798 break; 799 800 default: 801 opt |= CD1400_COR1_CS8; 802 break; 803 } 804 805 cd_write_reg(cy, CD1400_COR1, opt); 806 807 #ifdef CY_DEBUG 808 printf("cor1 = 0x%x...", opt); 809 #endif 810 811 /* 812 * use the CD1400 automatic CTS flow control if CRTSCTS is set 813 * 814 * CD1400_COR2_ETC is used because breaks are generated with 815 * embedded transmit commands 816 */ 817 cd_write_reg(cy, CD1400_COR2, 818 CD1400_COR2_ETC | 819 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 820 821 cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD); 822 823 cd1400_channel_cmd(cy, 824 CD1400_CCR_CMDCORCHG | 825 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 826 827 cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 828 cd_write_reg(cy, CD1400_COR5, 0); 829 830 /* 831 * set modem change option registers to generate interrupts 832 * on carrier detect changes. 833 * 834 * if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines 835 * exchanged), also set the handshaking threshold. 836 */ 837 #ifdef CY_HW_RTS 838 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd | 839 (ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0)); 840 #else 841 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd); 842 #endif /* CY_HW_RTS */ 843 844 cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod); 845 846 /* 847 * set receive timeout to approx. 2ms 848 * could use more complex logic here... 849 * (but is it actually needed or even useful?) 850 */ 851 cd_write_reg(cy, CD1400_RTPR, 2); 852 853 /* 854 * should do anything else here? 855 * XXX check MDMBUF handshaking like in com.c? 856 */ 857 858 splx(s); 859 return (0); 860 } 861 862 /* 863 * set/get modem line status 864 * 865 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 866 * 867 * RTS and DTR are exchanged if CY_HW_RTS is set 868 * 869 */ 870 int 871 cy_modem_control(cy, bits, howto) 872 struct cy_port *cy; 873 int bits; 874 int howto; 875 { 876 int s, msvr; 877 878 s = spltty(); 879 880 /* select channel */ 881 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 882 883 /* does not manipulate RTS if it is used for flow control */ 884 switch (howto) { 885 case DMGET: 886 bits = 0; 887 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 888 bits |= TIOCM_LE; 889 msvr = cd_read_reg(cy, CD1400_MSVR2); 890 #ifdef CY_HW_RTS 891 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 892 bits |= TIOCM_DTR; 893 if (msvr & CD1400_MSVR2_DTR) 894 bits |= TIOCM_RTS; 895 #else 896 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 897 bits |= TIOCM_RTS; 898 if (msvr & CD1400_MSVR2_DTR) 899 bits |= TIOCM_DTR; 900 #endif /* CY_HW_RTS */ 901 if (msvr & CD1400_MSVR2_CTS) 902 bits |= TIOCM_CTS; 903 if (msvr & CD1400_MSVR2_CD) 904 bits |= TIOCM_CD; 905 if (msvr & CD1400_MSVR2_DSR) /* not connected on some 906 Cyclom cards? */ 907 bits |= TIOCM_DSR; 908 if (msvr & CD1400_MSVR2_RI) /* not connected on 909 Cyclom-8Y cards? */ 910 bits |= TIOCM_RI; 911 splx(s); 912 return (bits); 913 914 case DMSET: /* replace old values with new ones */ 915 #ifdef CY_HW_RTS 916 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 917 cd_write_reg(cy, CD1400_MSVR2, 918 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 919 cd_write_reg(cy, CD1400_MSVR1, 920 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 921 #else 922 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 923 cd_write_reg(cy, CD1400_MSVR1, 924 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 925 cd_write_reg(cy, CD1400_MSVR2, 926 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 927 #endif /* CY_HW_RTS */ 928 break; 929 930 case DMBIS: /* set bits */ 931 #ifdef CY_HW_RTS 932 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 933 (bits & TIOCM_RTS) != 0) 934 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 935 if (bits & TIOCM_DTR) 936 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 937 #else 938 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 939 (bits & TIOCM_RTS) != 0) 940 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 941 if (bits & TIOCM_DTR) 942 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 943 #endif /* CY_HW_RTS */ 944 break; 945 946 case DMBIC: /* clear bits */ 947 #ifdef CY_HW_RTS 948 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 949 (bits & TIOCM_RTS)) 950 cd_write_reg(cy, CD1400_MSVR2, 0); 951 if (bits & TIOCM_DTR) 952 cd_write_reg(cy, CD1400_MSVR1, 0); 953 #else 954 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 955 (bits & TIOCM_RTS)) 956 cd_write_reg(cy, CD1400_MSVR1, 0); 957 if (bits & TIOCM_DTR) 958 cd_write_reg(cy, CD1400_MSVR2, 0); 959 #endif /* CY_HW_RTS */ 960 break; 961 } 962 splx(s); 963 return (0); 964 } 965 966 /* 967 * Upper-level handler loop (called from timer interrupt?) 968 * This routine is common for multiple cards 969 */ 970 void 971 cy_poll(arg) 972 void *arg; 973 { 974 int card, port; 975 struct cy_softc *sc; 976 struct cy_port *cy; 977 struct tty *tp; 978 static int counter = 0; 979 #ifdef CY_DEBUG1 980 int did_something; 981 #endif 982 983 int s; 984 985 s = splhigh(); 986 987 if (cy_events == 0 && ++counter < 200) { 988 splx(s); 989 goto out; 990 } 991 992 cy_events = 0; 993 splx(s); 994 995 for (card = 0; card < cy_cd.cd_ndevs; card++) { 996 sc = cy_cd.cd_devs[card]; 997 if (sc == NULL) 998 continue; 999 1000 #ifdef CY_DEBUG1 1001 sc->sc_poll_count1++; 1002 did_something = 0; 1003 #endif 1004 1005 for (port = 0; port < sc->sc_nports; port++) { 1006 cy = &sc->sc_ports[port]; 1007 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 1008 !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 1009 continue; 1010 1011 /* 1012 * handle received data 1013 */ 1014 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 1015 u_char line_stat; 1016 int chr; 1017 1018 line_stat = cy->cy_ibuf_rd_ptr[0]; 1019 chr = cy->cy_ibuf_rd_ptr[1]; 1020 1021 if (line_stat & 1022 (CD1400_RDSR_BREAK|CD1400_RDSR_FE)) 1023 chr |= TTY_FE; 1024 if (line_stat & CD1400_RDSR_PE) 1025 chr |= TTY_PE; 1026 1027 /* 1028 * on an overrun error the data is treated as 1029 * good just as it should be. 1030 */ 1031 1032 #ifdef CY_DEBUG 1033 printf("cy%d port %d ttyinput 0x%x\n", 1034 card, port, chr); 1035 #endif 1036 1037 (*linesw[tp->t_line].l_rint)(chr, tp); 1038 1039 s = splhigh(); /* really necessary? */ 1040 if ((cy->cy_ibuf_rd_ptr += 2) == 1041 cy->cy_ibuf_end) 1042 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 1043 splx(s); 1044 1045 #ifdef CY_DEBUG1 1046 did_something = 1; 1047 #endif 1048 } 1049 1050 #ifndef CY_HW_RTS 1051 /* If we don't have any received data in ibuf and 1052 * CRTSCTS is on and RTS is turned off, it is time 1053 * to turn RTS back on 1054 */ 1055 if (ISSET(tp->t_cflag, CRTSCTS)) { 1056 /* we can't use cy_modem_control() here as it 1057 doesn't change RTS if RTSCTS is on */ 1058 cd_write_reg(cy, CD1400_CAR, 1059 port & CD1400_CAR_CHAN); 1060 1061 if ((cd_read_reg(cy, 1062 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 1063 cd_write_reg(cy, CD1400_MSVR1, 1064 CD1400_MSVR1_RTS); 1065 #ifdef CY_DEBUG1 1066 did_something = 1; 1067 #endif 1068 } 1069 } 1070 #endif /* CY_HW_RTS */ 1071 1072 /* 1073 * handle carrier changes 1074 */ 1075 s = splhigh(); 1076 if (ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) { 1077 int carrier; 1078 1079 CLR(cy->cy_flags, CYF_CARRIER_CHANGED); 1080 splx(s); 1081 1082 carrier = ((cy->cy_carrier_stat & 1083 CD1400_MSVR2_CD) != 0); 1084 1085 #ifdef CY_DEBUG 1086 printf("cy_poll: carrier change " 1087 "(card %d, port %d, carrier %d)\n", 1088 card, port, carrier); 1089 #endif 1090 if (CY_DIALIN(tp->t_dev) && 1091 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1092 cy_modem_control(cy, TIOCM_DTR, DMBIC); 1093 1094 #ifdef CY_DEBUG1 1095 did_something = 1; 1096 #endif 1097 } else { 1098 splx(s); 1099 } 1100 1101 s = splhigh(); 1102 if (ISSET(cy->cy_flags, CYF_START)) { 1103 CLR(cy->cy_flags, CYF_START); 1104 splx(s); 1105 1106 (*linesw[tp->t_line].l_start)(tp); 1107 1108 #ifdef CY_DEBUG1 1109 did_something = 1; 1110 #endif 1111 } else { 1112 splx(s); 1113 } 1114 1115 /* could move this to even upper level... */ 1116 if (cy->cy_fifo_overruns) { 1117 cy->cy_fifo_overruns = 0; 1118 /* doesn't report overrun count, 1119 but shouldn't really matter */ 1120 log(LOG_WARNING, "cy%d port %d fifo overrun\n", 1121 card, port); 1122 } 1123 if (cy->cy_ibuf_overruns) { 1124 cy->cy_ibuf_overruns = 0; 1125 log(LOG_WARNING, "cy%d port %d ibuf overrun\n", 1126 card, port); 1127 } 1128 } /* for(port...) */ 1129 #ifdef CY_DEBUG1 1130 if (did_something && counter >= 200) 1131 sc->sc_poll_count2++; 1132 #endif 1133 } /* for(card...) */ 1134 1135 counter = 0; 1136 1137 out: 1138 timeout_add(&cy_poll_to, 1); 1139 } 1140 1141 /* 1142 * hardware interrupt routine 1143 */ 1144 int 1145 cy_intr(arg) 1146 void *arg; 1147 { 1148 struct cy_softc *sc = arg; 1149 struct cy_port *cy; 1150 int card = sc->sc_dev.dv_unit; 1151 int cy_chip, stat; 1152 int int_serviced = 0; 1153 1154 /* 1155 * Check interrupt status of each CD1400 chip on this card 1156 * (multiple cards cannot share the same interrupt) 1157 */ 1158 for (cy_chip = 0; cy_chip < cy_nr_cd1400s[card]; cy_chip++) { 1159 1160 stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR); 1161 if (stat == 0) 1162 continue; 1163 1164 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1165 u_char save_car, save_rir, serv_type; 1166 u_char line_stat, recv_data, n_chars; 1167 u_char *buf_p; 1168 1169 save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR); 1170 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1171 /* enter rx service */ 1172 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir); 1173 1174 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR); 1175 cy = &sc->sc_ports[serv_type >> 3]; 1176 1177 #ifdef CY_DEBUG1 1178 cy->cy_rx_int_count++; 1179 #endif 1180 1181 if (cy->cy_tty == NULL || 1182 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1183 goto end_rx_serv; 1184 1185 buf_p = cy->cy_ibuf_wr_ptr; 1186 1187 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1188 line_stat = cd_read_reg(cy, CD1400_RDSR); 1189 recv_data = cd_read_reg(cy, CD1400_RDSR); 1190 1191 #ifdef CY_DEBUG 1192 printf("cy%d port %d recv exception, " 1193 "line_stat 0x%x, char 0x%x\n", 1194 card, cy->cy_port_num, line_stat, recv_data); 1195 #endif 1196 if (ISSET(line_stat, CD1400_RDSR_OE)) 1197 cy->cy_fifo_overruns++; 1198 1199 *buf_p++ = line_stat; 1200 *buf_p++ = recv_data; 1201 if (buf_p == cy->cy_ibuf_end) 1202 buf_p = cy->cy_ibuf; 1203 1204 if (buf_p == cy->cy_ibuf_rd_ptr) { 1205 if (buf_p == cy->cy_ibuf) 1206 buf_p = cy->cy_ibuf_end; 1207 buf_p -= 2; 1208 cy->cy_ibuf_overruns++; 1209 } 1210 cy_events = 1; 1211 } else { /* no exception, received data OK */ 1212 n_chars = cd_read_reg(cy, CD1400_RDCR); 1213 #ifdef CY_DEBUG 1214 printf("cy%d port %d receive ok %d chars\n", 1215 card, cy->cy_port_num, n_chars); 1216 #endif 1217 while (n_chars--) { 1218 *buf_p++ = 0; /* status: OK */ 1219 *buf_p++ = cd_read_reg(cy, 1220 CD1400_RDSR); /* data byte */ 1221 if (buf_p == cy->cy_ibuf_end) 1222 buf_p = cy->cy_ibuf; 1223 if (buf_p == cy->cy_ibuf_rd_ptr) { 1224 if (buf_p == cy->cy_ibuf) 1225 buf_p = cy->cy_ibuf_end; 1226 buf_p -= 2; 1227 cy->cy_ibuf_overruns++; 1228 break; 1229 } 1230 } 1231 cy_events = 1; 1232 } 1233 1234 cy->cy_ibuf_wr_ptr = buf_p; 1235 1236 #ifndef CY_HW_RTS 1237 /* RTS handshaking for incoming data */ 1238 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1239 int bf; 1240 1241 bf = buf_p - cy->cy_ibuf_rd_ptr; 1242 if (bf < 0) 1243 bf += IBUF_SIZE; 1244 1245 if (bf > (IBUF_SIZE/2)) /* turn RTS off */ 1246 cd_write_reg(cy, CD1400_MSVR1, 0); 1247 } 1248 #endif /* CY_HW_RTS */ 1249 1250 end_rx_serv: 1251 /* terminate service context */ 1252 cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f); 1253 cd_write_reg(cy, CD1400_CAR, save_car); 1254 int_serviced = 1; 1255 } /* if(rx_service...) */ 1256 1257 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1258 u_char save_car, save_mir, serv_type, modem_stat; 1259 1260 save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR); 1261 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1262 /* enter modem service */ 1263 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir); 1264 1265 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR); 1266 cy = &sc->sc_ports[serv_type >> 3]; 1267 1268 #ifdef CY_DEBUG1 1269 cy->cy_modem_int_count++; 1270 #endif 1271 1272 modem_stat = cd_read_reg(cy, CD1400_MSVR2); 1273 1274 #ifdef CY_DEBUG 1275 printf("cy%d port %d modem line change, new stat 0x%x\n", 1276 card, cy->cy_port_num, modem_stat); 1277 #endif 1278 if (ISSET((cy->cy_carrier_stat ^ modem_stat), 1279 CD1400_MSVR2_CD)) { 1280 SET(cy->cy_flags, CYF_CARRIER_CHANGED); 1281 cy_events = 1; 1282 } 1283 1284 cy->cy_carrier_stat = modem_stat; 1285 1286 /* terminate service context */ 1287 cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f); 1288 cd_write_reg(cy, CD1400_CAR, save_car); 1289 int_serviced = 1; 1290 } /* if(modem_service...) */ 1291 1292 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1293 u_char save_car, save_tir, serv_type, count, ch; 1294 struct tty *tp; 1295 1296 save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR); 1297 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1298 /* enter tx service */ 1299 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir); 1300 1301 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR); 1302 cy = &sc->sc_ports[serv_type >> 3]; 1303 1304 #ifdef CY_DEBUG1 1305 cy->cy_tx_int_count++; 1306 #endif 1307 #ifdef CY_DEBUG 1308 printf("cy%d port %d tx service\n", 1309 card, cy->cy_port_num); 1310 #endif 1311 1312 /* stop transmitting if no tty or CYF_STOP set */ 1313 tp = cy->cy_tty; 1314 if (tp == NULL || ISSET(cy->cy_flags, CYF_STOP)) 1315 goto txdone; 1316 1317 count = 0; 1318 if (ISSET(cy->cy_flags, CYF_SEND_NUL)) { 1319 cd_write_reg(cy, CD1400_TDR, 0); 1320 cd_write_reg(cy, CD1400_TDR, 0); 1321 count += 2; 1322 CLR(cy->cy_flags, CYF_SEND_NUL); 1323 } 1324 1325 if (tp->t_outq.c_cc > 0) { 1326 SET(tp->t_state, TS_BUSY); 1327 while (tp->t_outq.c_cc > 0 && 1328 count < CD1400_TX_FIFO_SIZE) { 1329 ch = getc(&tp->t_outq); 1330 /* remember to double NUL characters 1331 because embedded transmit commands 1332 are enabled */ 1333 if (ch == 0) { 1334 if (count >= 1335 CD1400_TX_FIFO_SIZE-2) { 1336 SET(cy->cy_flags, 1337 CYF_SEND_NUL); 1338 break; 1339 } 1340 1341 cd_write_reg(cy, CD1400_TDR, ch); 1342 count++; 1343 } 1344 1345 cd_write_reg(cy, CD1400_TDR, ch); 1346 count++; 1347 } 1348 } else { 1349 /* no data to send -- check if we should 1350 start/stop a break */ 1351 /* XXX does this cause too much delay before 1352 breaks? */ 1353 if (ISSET(cy->cy_flags, CYF_START_BREAK)) { 1354 cd_write_reg(cy, CD1400_TDR, 0); 1355 cd_write_reg(cy, CD1400_TDR, 0x81); 1356 CLR(cy->cy_flags, CYF_START_BREAK); 1357 } 1358 if (ISSET(cy->cy_flags, CYF_END_BREAK)) { 1359 cd_write_reg(cy, CD1400_TDR, 0); 1360 cd_write_reg(cy, CD1400_TDR, 0x83); 1361 CLR(cy->cy_flags, CYF_END_BREAK); 1362 } 1363 } 1364 1365 if (tp->t_outq.c_cc == 0) { 1366 txdone: 1367 /* 1368 * No data to send or requested to stop. 1369 * Disable transmit interrupt 1370 */ 1371 cd_write_reg(cy, CD1400_SRER, 1372 cd_read_reg(cy, CD1400_SRER) 1373 & ~CD1400_SRER_TXRDY); 1374 CLR(cy->cy_flags, CYF_STOP); 1375 CLR(tp->t_state, TS_BUSY); 1376 } 1377 1378 if (tp->t_outq.c_cc <= tp->t_lowat) { 1379 SET(cy->cy_flags, CYF_START); 1380 cy_events = 1; 1381 } 1382 1383 /* terminate service context */ 1384 cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f); 1385 cd_write_reg(cy, CD1400_CAR, save_car); 1386 int_serviced = 1; 1387 } /* if(tx_service...) */ 1388 } /* for(...all CD1400s on a card) */ 1389 1390 /* ensure an edge for next interrupt */ 1391 bus_space_write_1(sc->sc_memt, sc->sc_memh, 1392 CY_CLEAR_INTR<<sc->sc_bustype, 0); 1393 return (int_serviced); 1394 } 1395 1396 /* 1397 * subroutine to enable CD1400 transmitter 1398 */ 1399 void 1400 cy_enable_transmitter(cy) 1401 struct cy_port *cy; 1402 { 1403 int s; 1404 s = splhigh(); 1405 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 1406 cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER) 1407 | CD1400_SRER_TXRDY); 1408 splx(s); 1409 } 1410 1411 /* 1412 * Execute a CD1400 channel command 1413 */ 1414 void 1415 cd1400_channel_cmd(cy, cmd) 1416 struct cy_port *cy; 1417 int cmd; 1418 { 1419 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1420 1421 #ifdef CY_DEBUG 1422 printf("c1400_channel_cmd cy 0x%x command 0x%x\n", cy, cmd); 1423 #endif 1424 1425 /* wait until cd1400 is ready to process a new command */ 1426 while (cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0) 1427 ; 1428 1429 if (waitcnt == 0) 1430 log(LOG_ERR, "cy: channel command timeout\n"); 1431 1432 cd_write_reg(cy, CD1400_CCR, cmd); 1433 } 1434 1435 /* 1436 * Compute clock option register and baud rate register values 1437 * for a given speed. Return 0 on success, -1 on failure. 1438 * 1439 * The error between requested and actual speed seems 1440 * to be well within allowed limits (less than 3%) 1441 * with every speed value between 50 and 150000 bps. 1442 */ 1443 int 1444 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1445 { 1446 int c, co, br; 1447 1448 if (speed < 50 || speed > 150000) 1449 return (-1); 1450 1451 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1452 br = (cy_clock + (co * speed) / 2) / (co * speed); 1453 if (br < 0x100) { 1454 *bpr = br; 1455 *cor = c; 1456 return (0); 1457 } 1458 } 1459 1460 return (-1); 1461 } 1462 1463 #endif /* NCY > 0 */ 1464