1 /* $OpenBSD: cy.c,v 1.35 2014/10/31 09:45:27 jsg Exp $ */ 2 /* 3 * Copyright (c) 1996 Timo Rossi. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. Neither the name of the author nor the names of contributors 15 * may be used to endorse or promote products derived from this software 16 * without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31 /* 32 * cy.c 33 * 34 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 35 * (currently not tested with Cyclom-32 cards) 36 * 37 * Timo Rossi, 1996 38 * 39 * Supports both ISA and PCI Cyclom cards 40 * 41 * Uses CD1400 automatic CTS flow control, and 42 * if CY_HW_RTS is defined, uses CD1400 automatic input flow control. 43 * This requires a special cable that exchanges the RTS and DTR lines. 44 * 45 * Lots of debug output can be enabled by defining CY_DEBUG 46 * Some debugging counters (number of receive/transmit interrupts etc.) 47 * can be enabled by defining CY_DEBUG1 48 * 49 * This version uses the bus_space/io_??() stuff 50 * 51 */ 52 53 #include <sys/types.h> 54 #include <sys/param.h> 55 #include <sys/ioctl.h> 56 #include <sys/syslog.h> 57 #include <sys/fcntl.h> 58 #include <sys/tty.h> 59 #include <sys/conf.h> 60 #include <sys/selinfo.h> 61 #include <sys/device.h> 62 #include <sys/malloc.h> 63 #include <sys/systm.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 68 #include <dev/ic/cd1400reg.h> 69 #include <dev/ic/cyreg.h> 70 71 72 int cy_intr(void *); 73 int cyparam(struct tty *, struct termios *); 74 void cystart(struct tty *); 75 void cy_poll(void *); 76 int cy_modem_control(struct cy_port *, int, int); 77 void cy_enable_transmitter(struct cy_port *); 78 void cd1400_channel_cmd(struct cy_port *, int); 79 int cy_speed(speed_t, int *, int *, int); 80 81 struct cfdriver cy_cd = { 82 NULL, "cy", DV_TTY 83 }; 84 85 /* 86 * Common probe routine 87 * 88 * returns the number of chips found. 89 */ 90 int 91 cy_probe_common(bus_space_tag_t memt, bus_space_handle_t memh, int bustype) 92 { 93 int cy_chip, chip_offs; 94 u_char firmware_ver; 95 int nchips; 96 97 /* Cyclom card hardware reset */ 98 bus_space_write_1(memt, memh, CY16_RESET<<bustype, 0); 99 DELAY(500); /* wait for reset to complete */ 100 bus_space_write_1(memt, memh, CY_CLEAR_INTR<<bustype, 0); 101 102 #ifdef CY_DEBUG 103 printf("cy: card reset done\n"); 104 #endif 105 106 nchips = 0; 107 108 for (cy_chip = 0, chip_offs = 0; 109 cy_chip < CY_MAX_CD1400s; 110 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING << bustype)) { 111 int i; 112 113 /* the last 4 cd1400s are 'interleaved' 114 with the first 4 on 32-port boards */ 115 if (cy_chip == 4) 116 chip_offs -= (CY32_ADDR_FIX << bustype); 117 118 #ifdef CY_DEBUG 119 printf("cy: probe chip %d offset 0x%lx ... ", 120 cy_chip, chip_offs); 121 #endif 122 123 /* wait until the chip is ready for command */ 124 DELAY(1000); 125 if (bus_space_read_1(memt, memh, chip_offs + 126 ((CD1400_CCR << 1) << bustype)) != 0) { 127 #ifdef CY_DEBUG 128 printf("not ready for command\n"); 129 #endif 130 break; 131 } 132 133 /* clear the firmware version reg. */ 134 bus_space_write_1(memt, memh, chip_offs + 135 ((CD1400_GFRCR << 1) << bustype), 0); 136 137 /* 138 * On Cyclom-16 references to non-existent chip 4 139 * actually access chip 0 (address line 9 not decoded). 140 * Here we check if the clearing of chip 4 GFRCR actually 141 * cleared chip 0 GFRCR. In that case we have a 16 port card. 142 */ 143 if (cy_chip == 4 && 144 bus_space_read_1(memt, memh, chip_offs + 145 ((CD1400_GFRCR << 1) << bustype)) == 0) 146 break; 147 148 /* reset the chip */ 149 bus_space_write_1(memt, memh, chip_offs + 150 ((CD1400_CCR << 1) << bustype), 151 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 152 153 /* wait for the chip to initialize itself */ 154 for (i = 0; i < 200; i++) { 155 DELAY(50); 156 firmware_ver = bus_space_read_1(memt, memh, chip_offs + 157 ((CD1400_GFRCR << 1) << bustype)); 158 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 159 break; 160 } 161 #ifdef CY_DEBUG 162 printf("firmware version 0x%x\n", firmware_ver); 163 #endif 164 165 if ((firmware_ver & 0xf0) != 0x40) 166 break; 167 168 /* firmware version OK, CD1400 found */ 169 nchips++; 170 } 171 172 if (nchips == 0) { 173 #ifdef CY_DEBUG 174 printf("no CD1400s found\n"); 175 #endif 176 return (0); 177 } 178 179 #ifdef CY_DEBUG 180 printf("found %d CD1400s\n", nchips); 181 #endif 182 183 return (nchips); 184 } 185 186 void 187 cy_attach(parent, self) 188 struct device *parent, *self; 189 { 190 int card, port, cy_chip, num_chips, cdu, chip_offs, cy_clock; 191 struct cy_softc *sc = (void *)self; 192 193 card = sc->sc_dev.dv_unit; 194 num_chips = sc->sc_nr_cd1400s; 195 if (num_chips == 0) 196 return; 197 198 timeout_set(&sc->sc_poll_to, cy_poll, sc); 199 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 200 sc->sc_nports = num_chips * CD1400_NO_OF_CHANNELS; 201 202 port = 0; 203 for (cy_chip = 0, chip_offs = 0; 204 cy_chip < num_chips; 205 cy_chip++, chip_offs += (CY_CD1400_MEMSPACING<<sc->sc_bustype)) { 206 if (cy_chip == 4) 207 chip_offs -= (CY32_ADDR_FIX<<sc->sc_bustype); 208 209 #ifdef CY_DEBUG 210 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip_offs); 211 #endif 212 sc->sc_cd1400_offs[cy_chip] = chip_offs; 213 214 /* configure port 0 as serial port 215 (should already be after reset) */ 216 cd_write_reg_sc(sc, cy_chip, CD1400_GCR, 0); 217 218 /* Set cy_clock depending on firmware version */ 219 if (cd_read_reg_sc(sc, cy_chip, CD1400_GFRCR) <= 0x46) 220 cy_clock = CY_CLOCK; 221 else 222 cy_clock = CY_CLOCK_60; 223 224 /* set up a receive timeout period (1ms) */ 225 cd_write_reg_sc(sc, cy_chip, CD1400_PPR, 226 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 227 228 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 229 sc->sc_ports[port].cy_port_num = port; 230 sc->sc_ports[port].cy_memt = sc->sc_memt; 231 sc->sc_ports[port].cy_memh = sc->sc_memh; 232 sc->sc_ports[port].cy_chip_offs = chip_offs; 233 sc->sc_ports[port].cy_bustype = sc->sc_bustype; 234 sc->sc_ports[port].cy_clock = cy_clock; 235 236 /* should we initialize anything else here? */ 237 port++; 238 } /* for(each port on one CD1400...) */ 239 240 } /* for(each CD1400 on a card... ) */ 241 242 printf(": %d ports\n", port); 243 244 /* ensure an edge for the next interrupt */ 245 bus_space_write_1(sc->sc_memt, sc->sc_memh, 246 CY_CLEAR_INTR<<sc->sc_bustype, 0); 247 } 248 249 /* 250 * open routine. returns zero if successful, else error code 251 */ 252 int cyopen(dev_t, int, int, struct proc *); 253 int cyclose(dev_t, int, int, struct proc *); 254 int cyread(dev_t, struct uio *, int); 255 int cywrite(dev_t, struct uio *, int); 256 struct tty *cytty(dev_t); 257 int cyioctl(dev_t, u_long, caddr_t, int, struct proc *); 258 int cystop(struct tty *, int flag); 259 260 int 261 cyopen(dev, flag, mode, p) 262 dev_t dev; 263 int flag, mode; 264 struct proc *p; 265 { 266 int card = CY_CARD(dev); 267 int port = CY_PORT(dev); 268 struct cy_softc *sc; 269 struct cy_port *cy; 270 struct tty *tp; 271 int s, error; 272 273 if (card >= cy_cd.cd_ndevs || 274 (sc = cy_cd.cd_devs[card]) == NULL) { 275 return (ENXIO); 276 } 277 278 #ifdef CY_DEBUG 279 printf("%s open port %d flag 0x%x mode 0x%x\n", sc->sc_dev.dv_xname, 280 port, flag, mode); 281 #endif 282 283 cy = &sc->sc_ports[port]; 284 285 s = spltty(); 286 if (cy->cy_tty == NULL) { 287 cy->cy_tty = ttymalloc(0); 288 } 289 splx(s); 290 291 tp = cy->cy_tty; 292 tp->t_oproc = cystart; 293 tp->t_param = cyparam; 294 tp->t_dev = dev; 295 296 if (!ISSET(tp->t_state, TS_ISOPEN)) { 297 SET(tp->t_state, TS_WOPEN); 298 ttychars(tp); 299 tp->t_iflag = TTYDEF_IFLAG; 300 tp->t_oflag = TTYDEF_OFLAG; 301 tp->t_cflag = TTYDEF_CFLAG; 302 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 303 SET(tp->t_cflag, CLOCAL); 304 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 305 SET(tp->t_cflag, CRTSCTS); 306 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 307 SET(tp->t_cflag, MDMBUF); 308 tp->t_lflag = TTYDEF_LFLAG; 309 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 310 311 s = spltty(); 312 313 /* 314 * Allocate input ring buffer if we don't already have one 315 */ 316 if (cy->cy_ibuf == NULL) { 317 cy->cy_ibuf = malloc(IBUF_SIZE, M_DEVBUF, M_NOWAIT); 318 if (cy->cy_ibuf == NULL) { 319 printf("%s: (port %d) can't allocate input buffer\n", 320 sc->sc_dev.dv_xname, port); 321 splx(s); 322 return (ENOMEM); 323 } 324 cy->cy_ibuf_end = cy->cy_ibuf + IBUF_SIZE; 325 } 326 327 /* mark the ring buffer as empty */ 328 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 329 330 /* select CD1400 channel */ 331 cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); 332 /* reset the channel */ 333 cd1400_channel_cmd(cy, CD1400_CCR_CMDRESET); 334 /* encode unit (port) number in LIVR */ 335 /* there is just enough space for 5 bits (32 ports) */ 336 cd_write_reg(cy, CD1400_LIVR, port << 3); 337 338 cy->cy_channel_control = 0; 339 340 if (!timeout_pending(&sc->sc_poll_to)) 341 timeout_add(&sc->sc_poll_to, 1); 342 343 /* this sets parameters and raises DTR */ 344 cyparam(tp, &tp->t_termios); 345 346 ttsetwater(tp); 347 348 /* raise RTS too */ 349 cy_modem_control(cy, TIOCM_RTS, DMBIS); 350 351 cy->cy_carrier_stat = cd_read_reg(cy, CD1400_MSVR2); 352 353 /* enable receiver and modem change interrupts */ 354 cd_write_reg(cy, CD1400_SRER, 355 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 356 357 if (CY_DIALOUT(dev) || 358 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 359 ISSET(tp->t_cflag, MDMBUF) || 360 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 361 SET(tp->t_state, TS_CARR_ON); 362 else 363 CLR(tp->t_state, TS_CARR_ON); 364 } else if (ISSET(tp->t_state, TS_XCLUDE) && suser(p, 0) != 0) { 365 return (EBUSY); 366 } else { 367 s = spltty(); 368 } 369 370 /* wait for carrier if necessary */ 371 if (!ISSET(flag, O_NONBLOCK)) { 372 while (!ISSET(tp->t_cflag, CLOCAL) && 373 !ISSET(tp->t_state, TS_CARR_ON)) { 374 SET(tp->t_state, TS_WOPEN); 375 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 376 "cydcd", 0); 377 if (error != 0) { 378 splx(s); 379 CLR(tp->t_state, TS_WOPEN); 380 return (error); 381 } 382 } 383 } 384 385 splx(s); 386 387 return (*linesw[tp->t_line].l_open)(dev, tp, p); 388 } 389 390 /* 391 * close routine. returns zero if successful, else error code 392 */ 393 int 394 cyclose(dev, flag, mode, p) 395 dev_t dev; 396 int flag, mode; 397 struct proc *p; 398 { 399 int card = CY_CARD(dev); 400 int port = CY_PORT(dev); 401 struct cy_softc *sc = cy_cd.cd_devs[card]; 402 struct cy_port *cy = &sc->sc_ports[port]; 403 struct tty *tp = cy->cy_tty; 404 int s; 405 406 #ifdef CY_DEBUG 407 printf("%s close port %d, flag 0x%x, mode 0x%x\n", sc->sc_dev.dv_xname, 408 port, flag, mode); 409 #endif 410 411 (*linesw[tp->t_line].l_close)(tp, flag, p); 412 s = spltty(); 413 414 if (ISSET(tp->t_cflag, HUPCL) && 415 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 416 /* drop DTR and RTS 417 (should we wait for output buffer to become empty first?) */ 418 cy_modem_control(cy, 0, DMSET); 419 } 420 421 /* 422 * XXX should we disable modem change and 423 * receive interrupts here or somewhere ? 424 */ 425 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 426 427 splx(s); 428 ttyclose(tp); 429 430 return (0); 431 } 432 433 /* 434 * Read routine 435 */ 436 int 437 cyread(dev, uio, flag) 438 dev_t dev; 439 struct uio *uio; 440 int flag; 441 { 442 int card = CY_CARD(dev); 443 int port = CY_PORT(dev); 444 struct cy_softc *sc = cy_cd.cd_devs[card]; 445 struct cy_port *cy = &sc->sc_ports[port]; 446 struct tty *tp = cy->cy_tty; 447 448 #ifdef CY_DEBUG 449 printf("%s read port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 450 port, uio, flag); 451 #endif 452 453 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 454 } 455 456 /* 457 * Write routine 458 */ 459 int 460 cywrite(dev, uio, flag) 461 dev_t dev; 462 struct uio *uio; 463 int flag; 464 { 465 int card = CY_CARD(dev); 466 int port = CY_PORT(dev); 467 struct cy_softc *sc = cy_cd.cd_devs[card]; 468 struct cy_port *cy = &sc->sc_ports[port]; 469 struct tty *tp = cy->cy_tty; 470 471 #ifdef CY_DEBUG 472 printf("%s write port %d uio 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 473 port, uio, flag); 474 #endif 475 476 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 477 } 478 479 /* 480 * return tty pointer 481 */ 482 struct tty * 483 cytty(dev) 484 dev_t dev; 485 { 486 int card = CY_CARD(dev); 487 int port = CY_PORT(dev); 488 struct cy_softc *sc = cy_cd.cd_devs[card]; 489 struct cy_port *cy = &sc->sc_ports[port]; 490 struct tty *tp = cy->cy_tty; 491 492 return (tp); 493 } 494 495 /* 496 * ioctl routine 497 */ 498 int 499 cyioctl(dev, cmd, data, flag, p) 500 dev_t dev; 501 u_long cmd; 502 caddr_t data; 503 int flag; 504 struct proc *p; 505 { 506 int card = CY_CARD(dev); 507 int port = CY_PORT(dev); 508 struct cy_softc *sc = cy_cd.cd_devs[card]; 509 struct cy_port *cy = &sc->sc_ports[port]; 510 struct tty *tp = cy->cy_tty; 511 int error; 512 513 #ifdef CY_DEBUG 514 printf("%s port %d ioctl cmd 0x%x data 0x%x flag 0x%x\n", 515 sc->sc_dev.dv_xname, port, cmd, data, flag); 516 #endif 517 518 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 519 if (error >= 0) 520 return (error); 521 522 error = ttioctl(tp, cmd, data, flag, p); 523 if (error >= 0) 524 return (error); 525 526 /* XXX should not allow dropping DTR when dialin? */ 527 528 switch (cmd) { 529 case TIOCSBRK: /* start break */ 530 SET(cy->cy_flags, CYF_START_BREAK); 531 cy_enable_transmitter(cy); 532 break; 533 534 case TIOCCBRK: /* stop break */ 535 SET(cy->cy_flags, CYF_END_BREAK); 536 cy_enable_transmitter(cy); 537 break; 538 539 case TIOCSDTR: /* DTR on */ 540 cy_modem_control(cy, TIOCM_DTR, DMBIS); 541 break; 542 543 case TIOCCDTR: /* DTR off */ 544 cy_modem_control(cy, TIOCM_DTR, DMBIC); 545 break; 546 547 case TIOCMSET: /* set new modem control line values */ 548 cy_modem_control(cy, *((int *)data), DMSET); 549 break; 550 551 case TIOCMBIS: /* turn modem control bits on */ 552 cy_modem_control(cy, *((int *)data), DMBIS); 553 break; 554 555 case TIOCMBIC: /* turn modem control bits off */ 556 cy_modem_control(cy, *((int *)data), DMBIC); 557 break; 558 559 case TIOCMGET: /* get modem control/status line state */ 560 *((int *)data) = cy_modem_control(cy, 0, DMGET); 561 break; 562 563 case TIOCGFLAGS: 564 *((int *)data) = cy->cy_openflags | 565 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 566 break; 567 568 case TIOCSFLAGS: 569 error = suser(p, 0); 570 if (error != 0) 571 return (EPERM); 572 573 cy->cy_openflags = *((int *)data) & 574 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 575 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 576 break; 577 578 default: 579 return (ENOTTY); 580 } 581 582 return (0); 583 } 584 585 /* 586 * start output 587 */ 588 void 589 cystart(tp) 590 struct tty *tp; 591 { 592 int card = CY_CARD(tp->t_dev); 593 int port = CY_PORT(tp->t_dev); 594 struct cy_softc *sc = cy_cd.cd_devs[card]; 595 struct cy_port *cy = &sc->sc_ports[port]; 596 int s; 597 598 #ifdef CY_DEBUG 599 printf("%s port %d start, tty 0x%x\n", sc->sc_dev.dv_xname, port, tp); 600 #endif 601 602 s = spltty(); 603 604 #ifdef CY_DEBUG1 605 cy->cy_start_count++; 606 #endif 607 608 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 609 ttwakeupwr(tp); 610 if (tp->t_outq.c_cc == 0) 611 goto out; 612 613 SET(tp->t_state, TS_BUSY); 614 cy_enable_transmitter(cy); 615 } 616 out: 617 618 splx(s); 619 } 620 621 /* 622 * stop output 623 */ 624 int 625 cystop(tp, flag) 626 struct tty *tp; 627 int flag; 628 { 629 int card = CY_CARD(tp->t_dev); 630 int port = CY_PORT(tp->t_dev); 631 struct cy_softc *sc = cy_cd.cd_devs[card]; 632 struct cy_port *cy = &sc->sc_ports[port]; 633 int s; 634 635 #ifdef CY_DEBUG 636 printf("%s port %d stop tty 0x%x flag 0x%x\n", sc->sc_dev.dv_xname, 637 port, tp, flag); 638 #endif 639 640 s = spltty(); 641 642 if (ISSET(tp->t_state, TS_BUSY)) { 643 if (!ISSET(tp->t_state, TS_TTSTOP)) 644 SET(tp->t_state, TS_FLUSH); 645 646 /* 647 * the transmit interrupt routine will disable transmit when it 648 * notices that CYF_STOP has been set. 649 */ 650 SET(cy->cy_flags, CYF_STOP); 651 } 652 splx(s); 653 return (0); 654 } 655 656 /* 657 * parameter setting routine. 658 * returns 0 if successful, else returns error code 659 */ 660 int 661 cyparam(tp, t) 662 struct tty *tp; 663 struct termios *t; 664 { 665 int card = CY_CARD(tp->t_dev); 666 int port = CY_PORT(tp->t_dev); 667 struct cy_softc *sc = cy_cd.cd_devs[card]; 668 struct cy_port *cy = &sc->sc_ports[port]; 669 int ibpr, obpr, i_clk_opt, o_clk_opt; 670 int s, opt; 671 672 #ifdef CY_DEBUG 673 printf("%s port %d param tty 0x%x termios 0x%x\n", sc->sc_dev.dv_xname, 674 port, tp, t); 675 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 676 #endif 677 678 if (t->c_ospeed != 0 && 679 cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 680 return (EINVAL); 681 682 if (t->c_ispeed != 0 && 683 cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 684 return (EINVAL); 685 686 s = spltty(); 687 688 /* hang up the line is ospeed is zero, else turn DTR on */ 689 cy_modem_control(cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 690 691 /* channel was selected by the above call to cy_modem_control() */ 692 /* cd_write_reg(cy, CD1400_CAR, port & CD1400_CAR_CHAN); */ 693 694 /* set transmit speed */ 695 if (t->c_ospeed != 0) { 696 cd_write_reg(cy, CD1400_TCOR, o_clk_opt); 697 cd_write_reg(cy, CD1400_TBPR, obpr); 698 } 699 /* set receive speed */ 700 if (t->c_ispeed != 0) { 701 cd_write_reg(cy, CD1400_RCOR, i_clk_opt); 702 cd_write_reg(cy, CD1400_RBPR, ibpr); 703 } 704 705 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 706 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 707 708 if (opt != cy->cy_channel_control) { 709 cy->cy_channel_control = opt; 710 cd1400_channel_cmd(cy, opt); 711 } 712 713 /* compute COR1 contents */ 714 opt = 0; 715 if (ISSET(t->c_cflag, PARENB)) { 716 if (ISSET(t->c_cflag, PARODD)) 717 opt |= CD1400_COR1_PARODD; 718 opt |= CD1400_COR1_PARNORMAL; 719 } 720 721 if (!ISSET(t->c_iflag, INPCK)) 722 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 723 724 if (ISSET(t->c_cflag, CSTOPB)) 725 opt |= CD1400_COR1_STOP2; 726 727 switch (t->c_cflag & CSIZE) { 728 case CS5: 729 opt |= CD1400_COR1_CS5; 730 break; 731 732 case CS6: 733 opt |= CD1400_COR1_CS6; 734 break; 735 736 case CS7: 737 opt |= CD1400_COR1_CS7; 738 break; 739 740 default: 741 opt |= CD1400_COR1_CS8; 742 break; 743 } 744 745 cd_write_reg(cy, CD1400_COR1, opt); 746 747 #ifdef CY_DEBUG 748 printf("cor1 = 0x%x...", opt); 749 #endif 750 751 /* 752 * use the CD1400 automatic CTS flow control if CRTSCTS is set 753 * 754 * CD1400_COR2_ETC is used because breaks are generated with 755 * embedded transmit commands 756 */ 757 cd_write_reg(cy, CD1400_COR2, 758 CD1400_COR2_ETC | 759 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 760 761 cd_write_reg(cy, CD1400_COR3, RX_FIFO_THRESHOLD); 762 763 cd1400_channel_cmd(cy, 764 CD1400_CCR_CMDCORCHG | 765 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 766 767 cd_write_reg(cy, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 768 cd_write_reg(cy, CD1400_COR5, 0); 769 770 /* 771 * set modem change option registers to generate interrupts 772 * on carrier detect changes. 773 * 774 * if hardware RTS handshaking is used (CY_HW_RTS, DTR and RTS lines 775 * exchanged), also set the handshaking threshold. 776 */ 777 #ifdef CY_HW_RTS 778 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd | 779 (ISSET(t->c_cflag, CRTSCTS) ? RX_DTR_THRESHOLD : 0)); 780 #else 781 cd_write_reg(cy, CD1400_MCOR1, CD1400_MCOR1_CDzd); 782 #endif /* CY_HW_RTS */ 783 784 cd_write_reg(cy, CD1400_MCOR2, CD1400_MCOR2_CDod); 785 786 /* 787 * set receive timeout to approx. 2ms 788 * could use more complex logic here... 789 * (but is it actually needed or even useful?) 790 */ 791 cd_write_reg(cy, CD1400_RTPR, 2); 792 793 /* 794 * should do anything else here? 795 * XXX check MDMBUF handshaking like in com.c? 796 */ 797 798 splx(s); 799 return (0); 800 } 801 802 /* 803 * set/get modem line status 804 * 805 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 806 * 807 * RTS and DTR are exchanged if CY_HW_RTS is set 808 * 809 */ 810 int 811 cy_modem_control(cy, bits, howto) 812 struct cy_port *cy; 813 int bits; 814 int howto; 815 { 816 int s, msvr; 817 818 s = spltty(); 819 820 /* select channel */ 821 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 822 823 /* does not manipulate RTS if it is used for flow control */ 824 switch (howto) { 825 case DMGET: 826 bits = 0; 827 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 828 bits |= TIOCM_LE; 829 msvr = cd_read_reg(cy, CD1400_MSVR2); 830 #ifdef CY_HW_RTS 831 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 832 bits |= TIOCM_DTR; 833 if (msvr & CD1400_MSVR2_DTR) 834 bits |= TIOCM_RTS; 835 #else 836 if (cd_read_reg(cy, CD1400_MSVR1) & CD1400_MSVR1_RTS) 837 bits |= TIOCM_RTS; 838 if (msvr & CD1400_MSVR2_DTR) 839 bits |= TIOCM_DTR; 840 #endif /* CY_HW_RTS */ 841 if (msvr & CD1400_MSVR2_CTS) 842 bits |= TIOCM_CTS; 843 if (msvr & CD1400_MSVR2_CD) 844 bits |= TIOCM_CD; 845 if (msvr & CD1400_MSVR2_DSR) /* not connected on some 846 Cyclom cards? */ 847 bits |= TIOCM_DSR; 848 if (msvr & CD1400_MSVR2_RI) /* not connected on 849 Cyclom-8Y cards? */ 850 bits |= TIOCM_RI; 851 splx(s); 852 return (bits); 853 854 case DMSET: /* replace old values with new ones */ 855 #ifdef CY_HW_RTS 856 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 857 cd_write_reg(cy, CD1400_MSVR2, 858 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 859 cd_write_reg(cy, CD1400_MSVR1, 860 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 861 #else 862 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS)) 863 cd_write_reg(cy, CD1400_MSVR1, 864 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 865 cd_write_reg(cy, CD1400_MSVR2, 866 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 867 #endif /* CY_HW_RTS */ 868 break; 869 870 case DMBIS: /* set bits */ 871 #ifdef CY_HW_RTS 872 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 873 (bits & TIOCM_RTS) != 0) 874 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 875 if (bits & TIOCM_DTR) 876 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 877 #else 878 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 879 (bits & TIOCM_RTS) != 0) 880 cd_write_reg(cy, CD1400_MSVR1, CD1400_MSVR1_RTS); 881 if (bits & TIOCM_DTR) 882 cd_write_reg(cy, CD1400_MSVR2, CD1400_MSVR2_DTR); 883 #endif /* CY_HW_RTS */ 884 break; 885 886 case DMBIC: /* clear bits */ 887 #ifdef CY_HW_RTS 888 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 889 (bits & TIOCM_RTS)) 890 cd_write_reg(cy, CD1400_MSVR2, 0); 891 if (bits & TIOCM_DTR) 892 cd_write_reg(cy, CD1400_MSVR1, 0); 893 #else 894 if (!ISSET(cy->cy_tty->t_cflag, CRTSCTS) && 895 (bits & TIOCM_RTS)) 896 cd_write_reg(cy, CD1400_MSVR1, 0); 897 if (bits & TIOCM_DTR) 898 cd_write_reg(cy, CD1400_MSVR2, 0); 899 #endif /* CY_HW_RTS */ 900 break; 901 } 902 splx(s); 903 return (0); 904 } 905 906 /* 907 * Upper-level handler loop (called from timer interrupt?) 908 * This routine is common for multiple cards 909 */ 910 void 911 cy_poll(void *arg) 912 { 913 int port; 914 struct cy_softc *sc = arg; 915 struct cy_port *cy; 916 struct tty *tp; 917 static int counter = 0; 918 #ifdef CY_DEBUG1 919 int did_something; 920 #endif 921 922 int s; 923 924 s = spltty(); 925 926 if (sc->sc_events == 0 && ++counter < 200) { 927 splx(s); 928 goto out; 929 } 930 931 sc->sc_events = 0; 932 splx(s); 933 934 #ifdef CY_DEBUG1 935 sc->sc_poll_count1++; 936 did_something = 0; 937 #endif 938 939 for (port = 0; port < sc->sc_nports; port++) { 940 cy = &sc->sc_ports[port]; 941 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 942 !ISSET(tp->t_state, TS_ISOPEN | TS_WOPEN)) 943 continue; 944 945 /* 946 * handle received data 947 */ 948 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 949 u_char line_stat; 950 int chr; 951 952 line_stat = cy->cy_ibuf_rd_ptr[0]; 953 chr = cy->cy_ibuf_rd_ptr[1]; 954 955 if (line_stat & 956 (CD1400_RDSR_BREAK|CD1400_RDSR_FE)) 957 chr |= TTY_FE; 958 if (line_stat & CD1400_RDSR_PE) 959 chr |= TTY_PE; 960 961 /* 962 * on an overrun error the data is treated as 963 * good just as it should be. 964 */ 965 966 #ifdef CY_DEBUG 967 printf("%s port %d ttyinput 0x%x\n", 968 sc->sc_dev.dv_xname, port, chr); 969 #endif 970 971 (*linesw[tp->t_line].l_rint)(chr, tp); 972 973 s = spltty(); /* really necessary? */ 974 if ((cy->cy_ibuf_rd_ptr += 2) == 975 cy->cy_ibuf_end) 976 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 977 splx(s); 978 979 #ifdef CY_DEBUG1 980 did_something = 1; 981 #endif 982 } 983 984 #ifndef CY_HW_RTS 985 /* 986 * If we don't have any received data in ibuf and 987 * CRTSCTS is on and RTS is turned off, it is time 988 * to turn RTS back on 989 */ 990 if (ISSET(tp->t_cflag, CRTSCTS)) { 991 /* we can't use cy_modem_control() here as it 992 doesn't change RTS if RTSCTS is on */ 993 cd_write_reg(cy, CD1400_CAR, 994 port & CD1400_CAR_CHAN); 995 996 if ((cd_read_reg(cy, 997 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 998 cd_write_reg(cy, CD1400_MSVR1, 999 CD1400_MSVR1_RTS); 1000 #ifdef CY_DEBUG1 1001 did_something = 1; 1002 #endif 1003 } 1004 } 1005 #endif /* CY_HW_RTS */ 1006 1007 /* 1008 * handle carrier changes 1009 */ 1010 s = spltty(); 1011 if (ISSET(cy->cy_flags, CYF_CARRIER_CHANGED)) { 1012 int carrier; 1013 1014 CLR(cy->cy_flags, CYF_CARRIER_CHANGED); 1015 splx(s); 1016 1017 carrier = ((cy->cy_carrier_stat & 1018 CD1400_MSVR2_CD) != 0); 1019 1020 #ifdef CY_DEBUG 1021 printf("%s: cy_poll: carrier change " 1022 "(port %d, carrier %d)\n", 1023 sc->sc_dev.dv_xname, port, carrier); 1024 #endif 1025 if (CY_DIALIN(tp->t_dev) && 1026 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1027 cy_modem_control(cy, TIOCM_DTR, DMBIC); 1028 1029 #ifdef CY_DEBUG1 1030 did_something = 1; 1031 #endif 1032 } else { 1033 splx(s); 1034 } 1035 1036 s = spltty(); 1037 if (ISSET(cy->cy_flags, CYF_START)) { 1038 CLR(cy->cy_flags, CYF_START); 1039 splx(s); 1040 1041 (*linesw[tp->t_line].l_start)(tp); 1042 1043 #ifdef CY_DEBUG1 1044 did_something = 1; 1045 #endif 1046 } else { 1047 splx(s); 1048 } 1049 1050 /* could move this to even upper level... */ 1051 if (cy->cy_fifo_overruns) { 1052 cy->cy_fifo_overruns = 0; 1053 /* doesn't report overrun count, 1054 but shouldn't really matter */ 1055 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1056 sc->sc_dev.dv_xname, port); 1057 } 1058 if (cy->cy_ibuf_overruns) { 1059 cy->cy_ibuf_overruns = 0; 1060 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1061 sc->sc_dev.dv_xname, port); 1062 } 1063 } /* for(port...) */ 1064 #ifdef CY_DEBUG1 1065 if (did_something && counter >= 200) 1066 sc->sc_poll_count2++; 1067 #endif 1068 1069 counter = 0; 1070 1071 out: 1072 timeout_add(&sc->sc_poll_to, 1); 1073 } 1074 1075 /* 1076 * hardware interrupt routine 1077 */ 1078 int 1079 cy_intr(arg) 1080 void *arg; 1081 { 1082 struct cy_softc *sc = arg; 1083 struct cy_port *cy; 1084 int cy_chip, stat; 1085 int int_serviced = -1; 1086 1087 /* 1088 * Check interrupt status of each CD1400 chip on this card 1089 * (multiple cards cannot share the same interrupt) 1090 */ 1091 for (cy_chip = 0; cy_chip < sc->sc_nr_cd1400s; cy_chip++) { 1092 1093 stat = cd_read_reg_sc(sc, cy_chip, CD1400_SVRR); 1094 if (stat == 0) 1095 continue; 1096 1097 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1098 u_char save_car, save_rir, serv_type; 1099 u_char line_stat, recv_data, n_chars; 1100 u_char *buf_p; 1101 1102 save_rir = cd_read_reg_sc(sc, cy_chip, CD1400_RIR); 1103 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1104 /* enter rx service */ 1105 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_rir); 1106 1107 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_RIVR); 1108 cy = &sc->sc_ports[serv_type >> 3]; 1109 1110 #ifdef CY_DEBUG1 1111 cy->cy_rx_int_count++; 1112 #endif 1113 1114 buf_p = cy->cy_ibuf_wr_ptr; 1115 1116 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1117 line_stat = cd_read_reg(cy, CD1400_RDSR); 1118 recv_data = cd_read_reg(cy, CD1400_RDSR); 1119 1120 if (cy->cy_tty == NULL || 1121 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1122 goto end_rx_serv; 1123 1124 #ifdef CY_DEBUG 1125 printf("%s port %d recv exception, " 1126 "line_stat 0x%x, char 0x%x\n", 1127 sc->sc_dev.dv_xname, cy->cy_port_num, 1128 line_stat, recv_data); 1129 #endif 1130 if (ISSET(line_stat, CD1400_RDSR_OE)) 1131 cy->cy_fifo_overruns++; 1132 1133 *buf_p++ = line_stat; 1134 *buf_p++ = recv_data; 1135 if (buf_p == cy->cy_ibuf_end) 1136 buf_p = cy->cy_ibuf; 1137 1138 if (buf_p == cy->cy_ibuf_rd_ptr) { 1139 if (buf_p == cy->cy_ibuf) 1140 buf_p = cy->cy_ibuf_end; 1141 buf_p -= 2; 1142 cy->cy_ibuf_overruns++; 1143 } 1144 sc->sc_events = 1; 1145 } else { /* no exception, received data OK */ 1146 n_chars = cd_read_reg(cy, CD1400_RDCR); 1147 1148 /* If no tty or not open, discard data */ 1149 if (cy->cy_tty == NULL || 1150 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1151 while (n_chars--) 1152 cd_read_reg(cy, CD1400_RDSR); 1153 goto end_rx_serv; 1154 } 1155 1156 #ifdef CY_DEBUG 1157 printf("%s port %d receive ok %d chars\n", 1158 sc->sc_dev.dv_xname, cy->cy_port_num, 1159 n_chars); 1160 #endif 1161 while (n_chars--) { 1162 *buf_p++ = 0; /* status: OK */ 1163 *buf_p++ = cd_read_reg(cy, 1164 CD1400_RDSR); /* data byte */ 1165 if (buf_p == cy->cy_ibuf_end) 1166 buf_p = cy->cy_ibuf; 1167 if (buf_p == cy->cy_ibuf_rd_ptr) { 1168 if (buf_p == cy->cy_ibuf) 1169 buf_p = cy->cy_ibuf_end; 1170 buf_p -= 2; 1171 cy->cy_ibuf_overruns++; 1172 break; 1173 } 1174 } 1175 sc->sc_events = 1; 1176 } 1177 1178 cy->cy_ibuf_wr_ptr = buf_p; 1179 1180 #ifndef CY_HW_RTS 1181 /* RTS handshaking for incoming data */ 1182 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1183 int bf; 1184 1185 bf = buf_p - cy->cy_ibuf_rd_ptr; 1186 if (bf < 0) 1187 bf += IBUF_SIZE; 1188 1189 if (bf > (IBUF_SIZE/2)) /* turn RTS off */ 1190 cd_write_reg(cy, CD1400_MSVR1, 0); 1191 } 1192 #endif /* CY_HW_RTS */ 1193 1194 end_rx_serv: 1195 /* terminate service context */ 1196 cd_write_reg(cy, CD1400_RIR, save_rir & 0x3f); 1197 cd_write_reg(cy, CD1400_CAR, save_car); 1198 int_serviced = 1; 1199 } /* if(rx_service...) */ 1200 1201 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1202 u_char save_car, save_mir, serv_type, modem_stat; 1203 1204 save_mir = cd_read_reg_sc(sc, cy_chip, CD1400_MIR); 1205 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1206 /* enter modem service */ 1207 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_mir); 1208 1209 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_MIVR); 1210 cy = &sc->sc_ports[serv_type >> 3]; 1211 1212 #ifdef CY_DEBUG1 1213 cy->cy_modem_int_count++; 1214 #endif 1215 1216 modem_stat = cd_read_reg(cy, CD1400_MSVR2); 1217 1218 #ifdef CY_DEBUG 1219 printf("%s port %d modem line change, new stat 0x%x\n", 1220 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1221 #endif 1222 if (ISSET((cy->cy_carrier_stat ^ modem_stat), 1223 CD1400_MSVR2_CD)) { 1224 SET(cy->cy_flags, CYF_CARRIER_CHANGED); 1225 sc->sc_events = 1; 1226 } 1227 1228 cy->cy_carrier_stat = modem_stat; 1229 1230 /* terminate service context */ 1231 cd_write_reg(cy, CD1400_MIR, save_mir & 0x3f); 1232 cd_write_reg(cy, CD1400_CAR, save_car); 1233 int_serviced = 1; 1234 } /* if(modem_service...) */ 1235 1236 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1237 u_char save_car, save_tir, serv_type, count, ch; 1238 struct tty *tp; 1239 1240 save_tir = cd_read_reg_sc(sc, cy_chip, CD1400_TIR); 1241 save_car = cd_read_reg_sc(sc, cy_chip, CD1400_CAR); 1242 /* enter tx service */ 1243 cd_write_reg_sc(sc, cy_chip, CD1400_CAR, save_tir); 1244 1245 serv_type = cd_read_reg_sc(sc, cy_chip, CD1400_TIVR); 1246 cy = &sc->sc_ports[serv_type >> 3]; 1247 1248 #ifdef CY_DEBUG1 1249 cy->cy_tx_int_count++; 1250 #endif 1251 #ifdef CY_DEBUG 1252 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1253 cy->cy_port_num); 1254 #endif 1255 1256 /* stop transmitting if no tty or CYF_STOP set */ 1257 tp = cy->cy_tty; 1258 if (tp == NULL || ISSET(cy->cy_flags, CYF_STOP)) 1259 goto txdone; 1260 1261 count = 0; 1262 if (ISSET(cy->cy_flags, CYF_SEND_NUL)) { 1263 cd_write_reg(cy, CD1400_TDR, 0); 1264 cd_write_reg(cy, CD1400_TDR, 0); 1265 count += 2; 1266 CLR(cy->cy_flags, CYF_SEND_NUL); 1267 } 1268 1269 if (tp->t_outq.c_cc > 0) { 1270 SET(tp->t_state, TS_BUSY); 1271 while (tp->t_outq.c_cc > 0 && 1272 count < CD1400_TX_FIFO_SIZE) { 1273 ch = getc(&tp->t_outq); 1274 /* remember to double NUL characters 1275 because embedded transmit commands 1276 are enabled */ 1277 if (ch == 0) { 1278 if (count >= 1279 CD1400_TX_FIFO_SIZE-2) { 1280 SET(cy->cy_flags, 1281 CYF_SEND_NUL); 1282 break; 1283 } 1284 1285 cd_write_reg(cy, CD1400_TDR, ch); 1286 count++; 1287 } 1288 1289 cd_write_reg(cy, CD1400_TDR, ch); 1290 count++; 1291 } 1292 } else { 1293 /* no data to send -- check if we should 1294 start/stop a break */ 1295 /* XXX does this cause too much delay before 1296 breaks? */ 1297 if (ISSET(cy->cy_flags, CYF_START_BREAK)) { 1298 cd_write_reg(cy, CD1400_TDR, 0); 1299 cd_write_reg(cy, CD1400_TDR, 0x81); 1300 CLR(cy->cy_flags, CYF_START_BREAK); 1301 } 1302 if (ISSET(cy->cy_flags, CYF_END_BREAK)) { 1303 cd_write_reg(cy, CD1400_TDR, 0); 1304 cd_write_reg(cy, CD1400_TDR, 0x83); 1305 CLR(cy->cy_flags, CYF_END_BREAK); 1306 } 1307 } 1308 1309 if (tp->t_outq.c_cc == 0) { 1310 txdone: 1311 /* 1312 * No data to send or requested to stop. 1313 * Disable transmit interrupt 1314 */ 1315 cd_write_reg(cy, CD1400_SRER, 1316 cd_read_reg(cy, CD1400_SRER) 1317 & ~CD1400_SRER_TXRDY); 1318 CLR(cy->cy_flags, CYF_STOP); 1319 CLR(tp->t_state, TS_BUSY); 1320 } 1321 1322 if (tp->t_outq.c_cc <= tp->t_lowat) { 1323 SET(cy->cy_flags, CYF_START); 1324 sc->sc_events = 1; 1325 } 1326 1327 /* terminate service context */ 1328 cd_write_reg(cy, CD1400_TIR, save_tir & 0x3f); 1329 cd_write_reg(cy, CD1400_CAR, save_car); 1330 int_serviced = 1; 1331 } /* if(tx_service...) */ 1332 } /* for(...all CD1400s on a card) */ 1333 1334 /* ensure an edge for next interrupt */ 1335 bus_space_write_1(sc->sc_memt, sc->sc_memh, 1336 CY_CLEAR_INTR<<sc->sc_bustype, 0); 1337 return (int_serviced); 1338 } 1339 1340 /* 1341 * subroutine to enable CD1400 transmitter 1342 */ 1343 void 1344 cy_enable_transmitter(cy) 1345 struct cy_port *cy; 1346 { 1347 int s; 1348 s = spltty(); 1349 cd_write_reg(cy, CD1400_CAR, cy->cy_port_num & CD1400_CAR_CHAN); 1350 cd_write_reg(cy, CD1400_SRER, cd_read_reg(cy, CD1400_SRER) 1351 | CD1400_SRER_TXRDY); 1352 splx(s); 1353 } 1354 1355 /* 1356 * Execute a CD1400 channel command 1357 */ 1358 void 1359 cd1400_channel_cmd(cy, cmd) 1360 struct cy_port *cy; 1361 int cmd; 1362 { 1363 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1364 1365 #ifdef CY_DEBUG 1366 printf("c1400_channel_cmd cy 0x%x command 0x%x\n", cy, cmd); 1367 #endif 1368 1369 /* wait until cd1400 is ready to process a new command */ 1370 while (cd_read_reg(cy, CD1400_CCR) != 0 && waitcnt-- > 0) 1371 ; 1372 1373 if (waitcnt == 0) 1374 log(LOG_ERR, "cy: channel command timeout\n"); 1375 1376 cd_write_reg(cy, CD1400_CCR, cmd); 1377 } 1378 1379 /* 1380 * Compute clock option register and baud rate register values 1381 * for a given speed. Return 0 on success, -1 on failure. 1382 * 1383 * The error between requested and actual speed seems 1384 * to be well within allowed limits (less than 3%) 1385 * with every speed value between 50 and 150000 bps. 1386 */ 1387 int 1388 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1389 { 1390 int c, co, br; 1391 1392 if (speed < 50 || speed > 150000) 1393 return (-1); 1394 1395 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1396 br = (cy_clock + (co * speed) / 2) / (co * speed); 1397 if (br < 0x100) { 1398 *bpr = br; 1399 *cor = c; 1400 return (0); 1401 } 1402 } 1403 1404 return (-1); 1405 } 1406