1 /* $OpenBSD: gdtvar.h,v 1.17 2009/08/12 17:51:33 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 1999, 2000 Niklas Hallqvist. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 /* 28 * This driver would not have written if it was not for the hardware donations 29 * from both ICP-Vortex and �ko.neT. I want to thank them for their support. 30 */ 31 32 #define DEVNAME(s) ((s)->sc_dev.dv_xname) 33 #define GDT_CMD_RESERVE 4 /* Internal driver cmd reserve. */ 34 35 #define GDT_IOCTL_DUMMY _IOWR('B', 32, struct gdt_dummy) 36 struct gdt_dummy { 37 void *cookie; 38 int x; 39 }; 40 41 #define GDT_SCRATCH_SZ 4096 42 43 #define GDT_IOCTL_GENERAL _IOWR('B', 33, gdt_ucmd_t) /* general IOCTL */ 44 typedef struct gdt_ucmd { 45 void *cookie; 46 u_int16_t io_node; 47 u_int16_t service; 48 u_int32_t timeout; 49 u_int16_t status; 50 u_int32_t info; 51 52 u_int32_t BoardNode; /* board node (always 0) */ 53 u_int32_t CommandIndex; /* command number */ 54 u_int16_t OpCode; /* the command (READ,..) */ 55 union { 56 struct { 57 u_int16_t DeviceNo; /* number of cache drive */ 58 u_int32_t BlockNo; /* block number */ 59 u_int32_t BlockCnt; /* block count */ 60 void *DestAddr; /* data */ 61 } cache; /* cache service cmd. str. */ 62 struct { 63 u_int16_t param_size; /* size of p_param buffer */ 64 u_int32_t subfunc; /* IOCTL function */ 65 u_int32_t channel; /* device */ 66 void *p_param; /* data */ 67 } ioctl; /* IOCTL command structure */ 68 struct { 69 u_int16_t reserved; 70 u_int32_t direction; /* data direction */ 71 u_int32_t mdisc_time; /* disc. time (0: no timeout)*/ 72 u_int32_t mcon_time; /* connect time(0: no to.) */ 73 void *sdata; /* dest. addr. (if s/g: -1) */ 74 u_int32_t sdlen; /* data length (bytes) */ 75 u_int32_t clen; /* SCSI cmd. length(6,10,12) */ 76 u_int8_t cmd[12]; /* SCSI command */ 77 u_int8_t target; /* target ID */ 78 u_int8_t lun; /* LUN */ 79 u_int8_t bus; /* SCSI bus number */ 80 u_int8_t priority; /* only 0 used */ 81 u_int32_t sense_len; /* sense data length */ 82 void *sense_data; /* sense data addr. */ 83 u_int32_t link_p; /* linked cmds (not supp.) */ 84 } raw; /* raw service cmd. struct. */ 85 } u; 86 u_int8_t data[GDT_SCRATCH_SZ]; 87 int complete_flag; 88 TAILQ_ENTRY(gdt_ucmd) links; 89 } gdt_ucmd_t; 90 91 #define GDT_IOCTL_DRVERS _IOWR('B', 34, int) /* get driver version */ 92 typedef struct gdt_drvers { 93 void *cookie; 94 int vers; 95 } gdt_drvers_t; 96 97 #define GDT_IOCTL_CTRTYPE _IOR('B', 35, gdt_ctrt_t) /* get ctr. type */ 98 typedef struct gdt_ctrt { 99 void *cookie; 100 u_int16_t io_node; 101 u_int16_t oem_id; 102 u_int16_t type; 103 u_int32_t info; 104 u_int8_t access; 105 u_int8_t remote; 106 u_int16_t ext_type; 107 u_int16_t device_id; 108 u_int16_t sub_device_id; 109 } gdt_ctrt_t; 110 111 #define GDT_IOCTL_OSVERS _IOR('B', 36, gdt_osv_t) /* get OS version */ 112 typedef struct gdt_osv { 113 void *cookie; 114 u_int8_t oscode; 115 u_int8_t version; 116 u_int8_t subversion; 117 u_int16_t revision; 118 char name[64]; 119 } gdt_osv_t; 120 121 #define GDT_IOCTL_CTRCNT _IOR('B', 37, int) /* get ctr. count */ 122 typedef struct gdt_ctrcnt { 123 void *cookie; 124 int cnt; 125 } gdt_ctrcnt_t; 126 127 #define GDT_IOCTL_EVENT _IOWR('B', 38, gdt_event_t) /* get event */ 128 129 typedef struct { 130 u_int16_t size; /* size of structure */ 131 union { 132 char stream[16]; 133 struct { 134 u_int16_t ionode; 135 u_int16_t service; 136 u_int32_t index; 137 } driver; 138 struct { 139 u_int16_t ionode; 140 u_int16_t service; 141 u_int16_t status; 142 u_int32_t info; 143 u_int8_t scsi_coord[3]; 144 } async; 145 struct { 146 u_int16_t ionode; 147 u_int16_t service; 148 u_int16_t status; 149 u_int32_t info; 150 u_int16_t hostdrive; 151 u_int8_t scsi_coord[3]; 152 u_int8_t sense_key; 153 } sync; 154 struct { 155 u_int32_t l1, l2, l3, l4; 156 } test; 157 } eu; 158 u_int32_t severity; 159 u_int8_t event_string[256]; 160 } gdt_evt_data; 161 #define GDT_ES_ASYNC 1 162 #define GDT_ES_DRIVER 2 163 #define GDT_ES_TEST 3 164 #define GDT_ES_SYNC 4 165 166 /* dvrevt structure */ 167 typedef struct { 168 u_int32_t first_stamp; 169 u_int32_t last_stamp; 170 u_int16_t same_count; 171 u_int16_t event_source; 172 u_int16_t event_idx; 173 u_int8_t application; 174 u_int8_t reserved; 175 gdt_evt_data event_data; 176 } gdt_evt_str; 177 178 typedef struct gdt_event { 179 void *cookie; 180 int erase; 181 int handle; 182 gdt_evt_str dvr; 183 } gdt_event_t; 184 185 #define GDT_IOCTL_STATIST _IOR('B', 39, gdt_statist_t) /* get statistics */ 186 typedef struct gdt_statist { 187 void *cookie; 188 u_int16_t io_count_act; 189 u_int16_t io_count_max; 190 u_int16_t req_queue_act; 191 u_int16_t req_queue_max; 192 u_int16_t cmd_index_act; 193 u_int16_t cmd_index_max; 194 u_int16_t sg_count_act; 195 u_int16_t sg_count_max; 196 } gdt_statist_t; 197 198 #ifdef _KERNEL 199 200 /* Debugging */ 201 /* #define GDT_DEBUG GDT_D_IOCTL | GDT_D_INFO */ 202 #ifdef GDT_DEBUG 203 #define GDT_DPRINTF(mask, args) if (gdt_debug & (mask)) printf args 204 #define GDT_D_INTR 0x01 205 #define GDT_D_MISC 0x02 206 #define GDT_D_CMD 0x04 207 #define GDT_D_QUEUE 0x08 208 #define GDT_D_IO 0x10 209 #define GDT_D_IOCTL 0x20 210 #define GDT_D_INFO 0x40 211 extern int gdt_debug; 212 #else 213 #define GDT_DPRINTF(mask, args) 214 #endif 215 216 /* Miscellaneous constants */ 217 #define GDT_RETRIES 100000000 /* 100000 * 1us = 100s */ 218 #define GDT_TIMEOUT 100000000 /* 100000 * 1us = 100s */ 219 #define GDT_POLL_TIMEOUT 10000 /* 10000 * 1ms = 10s */ 220 #define GDT_WATCH_TIMEOUT 10000 /* 10000 * 1ms = 10s */ 221 222 /* Context structure for interrupt services */ 223 struct gdt_intr_ctx { 224 u_int32_t info, info2; 225 u_int16_t cmd_status, service; 226 u_int8_t istatus; 227 }; 228 229 /* 230 * A command contol block, one for each corresponding command index of the 231 * controller. 232 */ 233 struct gdt_ccb { 234 TAILQ_ENTRY(gdt_ccb) gc_chain; 235 struct scsi_xfer *gc_xs; 236 struct gdt_ucmd *gc_ucmd; 237 bus_dmamap_t gc_dmamap_xfer; 238 int gc_timeout; 239 u_int32_t gc_info; 240 u_int32_t gc_blockno; 241 u_int32_t gc_blockcnt; 242 u_int16_t gc_status; 243 u_int8_t gc_service; 244 u_int8_t gc_cmd_index; 245 u_int8_t gc_flags; 246 #define GDT_GCF_CMD_MASK 0x3 247 #define GDT_GCF_UNUSED 0 248 #define GDT_GCF_INTERNAL 1 249 #define GDT_GCF_SCREEN 2 250 #define GDT_GCF_SCSI 3 251 #define GDT_GCF_WATCHDOG 0x4 252 }; 253 254 static inline int gdt_ccb_set_cmd(struct gdt_ccb *, int); 255 static inline int 256 gdt_ccb_set_cmd(ccb, flag) 257 struct gdt_ccb *ccb; 258 int flag; 259 { 260 int rv = ccb->gc_flags & GDT_GCF_CMD_MASK; 261 262 ccb->gc_flags &= ~GDT_GCF_CMD_MASK; 263 ccb->gc_flags |= flag; 264 return (rv); 265 } 266 267 struct gdt_softc { 268 struct device sc_dev; 269 void *sc_ih; 270 struct scsi_link sc_link; /* Virtual SCSI bus for cache devs */ 271 struct scsi_link *sc_raw_link; /* Raw SCSI busses */ 272 273 int sc_class; /* Controller class */ 274 #define GDT_ISA 0x01 275 #define GDT_EISA 0x02 276 #define GDT_PCI 0x03 277 #define GDT_PCINEW 0x04 278 #define GDT_MPR 0x05 279 #define GDT_CLASS_MASK 0x07 280 #define GDT_FC 0x10 281 #define GDT_CLASS(gdt) ((gdt)->sc_class & GDT_CLASS_MASK) 282 283 bus_space_tag_t sc_dpmemt; 284 bus_space_handle_t sc_dpmemh; 285 bus_addr_t sc_dpmembase; 286 bus_dma_tag_t sc_dmat; 287 288 /* XXX These could go into a class-dependent opaque struct instead */ 289 bus_space_tag_t sc_iot; 290 bus_space_handle_t sc_ioh; 291 bus_addr_t sc_iobase; 292 293 u_int16_t sc_ic_all_size; 294 295 struct gdt_ccb sc_ccbs[GDT_MAXCMDS]; 296 TAILQ_HEAD(, gdt_ccb) sc_free_ccb, sc_ccbq; 297 TAILQ_HEAD(, gdt_ucmd) sc_ucmdq; 298 LIST_HEAD(, scsi_xfer) sc_queue; 299 struct scsi_xfer *sc_queuelast; 300 301 int sc_ndevs; 302 303 u_int16_t sc_cmd_len; 304 u_int16_t sc_cmd_off; 305 u_int16_t sc_cmd_cnt; 306 u_int8_t sc_cmd[GDT_CMD_SZ]; 307 308 u_int32_t sc_info; 309 u_int32_t sc_info2; 310 bus_dma_segment_t sc_scratch_seg; 311 caddr_t sc_scratch; 312 u_int16_t sc_status; 313 314 u_int8_t sc_bus_cnt; 315 u_int8_t sc_bus_id[GDT_MAXBUS]; 316 u_int8_t sc_more_proc; 317 318 u_int32_t sc_total_disks; 319 320 struct { 321 u_int8_t hd_present; 322 u_int8_t hd_is_logdrv; 323 u_int8_t hd_is_arraydrv; 324 u_int8_t hd_is_master; 325 u_int8_t hd_is_parity; 326 u_int8_t hd_is_hotfix; 327 u_int8_t hd_master_no; 328 u_int8_t hd_lock; 329 u_int8_t hd_heads; 330 u_int8_t hd_secs; 331 u_int16_t hd_devtype; 332 u_int32_t hd_size; 333 u_int8_t hd_ldr_no; 334 u_int8_t hd_rw_attribs; 335 u_int32_t hd_start_sec; 336 } sc_hdr[GDT_MAX_HDRIVES]; 337 338 struct { 339 u_int8_t ra_lock; /* chan locked? (hot plug */ 340 u_int8_t ra_phys_cnt; /* physical disk count */ 341 u_int8_t ra_local_no; /* local channel number */ 342 u_int8_t ra_io_cnt[GDT_MAXID]; /* current IO count */ 343 u_int32_t ra_address; /* channel address */ 344 u_int32_t ra_id_list[GDT_MAXID]; /* IDs of phys disks */ 345 } sc_raw[GDT_MAXBUS]; /* SCSI channels */ 346 347 struct { 348 u_int32_t cp_version; 349 u_int16_t cp_state; 350 u_int16_t cp_strategy; 351 u_int16_t cp_write_back; 352 u_int16_t cp_block_size; 353 } sc_cpar; 354 355 struct { 356 u_int32_t bi_ser_no; /* serial number */ 357 u_int8_t bi_oem_id[2]; /* u_int8_t OEM ID */ 358 u_int16_t bi_ep_flags; /* eprom flags */ 359 u_int32_t bi_proc_id; /* processor ID */ 360 u_int32_t bi_memsize; /* memory size (bytes) */ 361 u_int8_t bi_mem_banks; /* memory banks */ 362 u_int8_t bi_chan_type; /* channel type */ 363 u_int8_t bi_chan_count; /* channel count */ 364 u_int8_t bi_rdongle_pres; /* dongle present */ 365 u_int32_t bi_epr_fw_ver; /* (eprom) firmware ver */ 366 u_int32_t bi_upd_fw_ver; /* (update) firmware ver */ 367 u_int32_t bi_upd_revision; /* update revision */ 368 char bi_type_string[16]; /* char controller name */ 369 char bi_raid_string[16]; /* char RAID firmware name */ 370 u_int8_t bi_update_pres; /* update present? */ 371 u_int8_t bi_xor_pres; /* XOR engine present */ 372 u_int8_t bi_prom_type; /* ROM type (eprom/flash) */ 373 u_int8_t bi_prom_count; /* number of ROM devices */ 374 u_int32_t bi_dup_pres; /* duplexing module pres? */ 375 u_int32_t bi_chan_pres; /* # of exp. channels */ 376 u_int32_t bi_mem_pres; /* memory expansion inst? */ 377 u_int8_t bi_ft_bus_system; /* fault bus supported? */ 378 u_int8_t bi_subtype_valid; /* board_subtype valid */ 379 u_int8_t bi_board_subtype; /* subtype/hardware level */ 380 u_int8_t bi_rampar_pres; /* RAM parity check hw? */ 381 } sc_binfo; 382 383 struct { 384 u_int8_t bf_chaining; /* chaining supported */ 385 u_int8_t bf_striping; /* striping (RAID-0) supported */ 386 u_int8_t bf_mirroring; /* mirroring (RAID-1) supported */ 387 u_int8_t bf_raid; /* RAID-4/5/10 supported */ 388 } sc_bfeat; 389 390 u_int16_t sc_raw_feat; 391 u_int16_t sc_cache_feat; 392 393 void (*sc_copy_cmd)(struct gdt_softc *, struct gdt_ccb *); 394 u_int8_t (*sc_get_status)(struct gdt_softc *); 395 void (*sc_intr)(struct gdt_softc *, struct gdt_intr_ctx *); 396 void (*sc_release_event)(struct gdt_softc *, struct gdt_ccb *); 397 void (*sc_set_sema0)(struct gdt_softc *); 398 int (*sc_test_busy)(struct gdt_softc *); 399 }; 400 401 void gdtminphys(struct buf *, struct scsi_link *); 402 int gdt_attach(struct gdt_softc *); 403 int gdt_intr(void *); 404 405 /* These all require correctly aligned buffers */ 406 static inline void gdt_enc16(u_int8_t *, u_int16_t); 407 static inline void gdt_enc32(u_int8_t *, u_int32_t); 408 static inline u_int8_t gdt_dec8(u_int8_t *); 409 static inline u_int16_t gdt_dec16(u_int8_t *); 410 static inline u_int32_t gdt_dec32(u_int8_t *); 411 412 static inline void 413 gdt_enc16(addr, value) 414 u_int8_t *addr; 415 u_int16_t value; 416 { 417 *(u_int16_t *)addr = htole16(value); 418 } 419 420 static inline void 421 gdt_enc32(addr, value) 422 u_int8_t *addr; 423 u_int32_t value; 424 { 425 *(u_int32_t *)addr = htole32(value); 426 } 427 428 static inline u_int8_t 429 gdt_dec8(addr) 430 u_int8_t *addr; 431 { 432 return *(u_int8_t *)addr; 433 } 434 435 static inline u_int16_t 436 gdt_dec16(addr) 437 u_int8_t *addr; 438 { 439 return letoh16(*(u_int16_t *)addr); 440 } 441 442 static inline u_int32_t 443 gdt_dec32(addr) 444 u_int8_t *addr; 445 { 446 return letoh32(*(u_int32_t *)addr); 447 } 448 449 extern u_int8_t gdt_polling; 450 451 #endif 452