xref: /openbsd/sys/dev/ic/ncr53c9xreg.h (revision 0ee2f123)
1 /*	$OpenBSD: ncr53c9xreg.h,v 1.1 1997/02/27 13:57:23 briggs Exp $	*/
2 /*	$NetBSD: ncr53c9xreg.h,v 1.1 1997/02/27 01:12:08 thorpej Exp $	*/
3 
4 /*
5  * Copyright (c) 1994 Peter Galbavy.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Peter Galbavy.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Register addresses, relative to some base address
35  */
36 
37 #define	NCR_TCL		0x00		/* RW - Transfer Count Low	*/
38 #define	NCR_TCM		0x01		/* RW - Transfer Count Mid	*/
39 #define	NCR_TCH		0x0e		/* RW - Transfer Count High	*/
40 					/*	NOT on 53C90		*/
41 
42 #define	NCR_FIFO	0x02		/* RW - FIFO data		*/
43 
44 #define	NCR_CMD		0x03		/* RW - Command (2 deep)	*/
45 #define  NCRCMD_DMA	0x80		/*	DMA Bit			*/
46 #define  NCRCMD_NOP	0x00		/*	No Operation		*/
47 #define  NCRCMD_FLUSH	0x01		/*	Flush FIFO		*/
48 #define  NCRCMD_RSTCHIP	0x02		/*	Reset Chip		*/
49 #define  NCRCMD_RSTSCSI	0x03		/*	Reset SCSI Bus		*/
50 #define  NCRCMD_RESEL	0x40		/*	Reselect Sequence	*/
51 #define  NCRCMD_SELNATN	0x41		/*	Select without ATN	*/
52 #define  NCRCMD_SELATN	0x42		/*	Select with ATN		*/
53 #define  NCRCMD_SELATNS	0x43		/*	Select with ATN & Stop	*/
54 #define  NCRCMD_ENSEL	0x44		/*	Enable (Re)Selection	*/
55 #define  NCRCMD_DISSEL	0x45		/*	Disable (Re)Selection	*/
56 #define  NCRCMD_SELATN3	0x46		/*	Select with ATN3	*/
57 #define  NCRCMD_RESEL3	0x47		/*	Reselect3 Sequence	*/
58 #define  NCRCMD_SNDMSG	0x20		/*	Send Message		*/
59 #define  NCRCMD_SNDSTAT	0x21		/*	Send Status		*/
60 #define  NCRCMD_SNDDATA	0x22		/*	Send Data		*/
61 #define  NCRCMD_DISCSEQ	0x23		/*	Disconnect Sequence	*/
62 #define  NCRCMD_TERMSEQ	0x24		/*	Terminate Sequence	*/
63 #define  NCRCMD_TCCS	0x25		/*	Target Command Comp Seq	*/
64 #define  NCRCMD_DISC	0x27		/*	Disconnect		*/
65 #define  NCRCMD_RECMSG	0x28		/*	Receive Message		*/
66 #define  NCRCMD_RECCMD	0x29		/*	Receive Command 	*/
67 #define  NCRCMD_RECDATA	0x2a		/*	Receive Data		*/
68 #define  NCRCMD_RECCSEQ	0x2b		/*	Receive Command Sequence*/
69 #define  NCRCMD_ABORT	0x04		/*	Target Abort DMA	*/
70 #define  NCRCMD_TRANS	0x10		/*	Transfer Information	*/
71 #define  NCRCMD_ICCS	0x11		/*	Initiator Cmd Comp Seq 	*/
72 #define  NCRCMD_MSGOK	0x12		/*	Message Accepted	*/
73 #define  NCRCMD_TRPAD	0x18		/*	Transfer Pad		*/
74 #define  NCRCMD_SETATN	0x1a		/*	Set ATN			*/
75 #define  NCRCMD_RSTATN	0x1b		/*	Reset ATN		*/
76 
77 #define	NCR_STAT	0x04		/* RO - Status			*/
78 #define  NCRSTAT_INT	0x80		/*	Interrupt		*/
79 #define  NCRSTAT_GE	0x40		/*	Gross Error		*/
80 #define  NCRSTAT_PE	0x20		/*	Parity Error		*/
81 #define  NCRSTAT_TC	0x10		/*	Terminal Count		*/
82 #define  NCRSTAT_VGC	0x08		/*	Valid Group Code	*/
83 #define  NCRSTAT_PHASE	0x07		/*	Phase bits		*/
84 
85 #define	NCR_SELID	0x04		/* WO - Select/Reselect Bus ID	*/
86 
87 #define	NCR_INTR	0x05		/* RO - Interrupt		*/
88 #define  NCRINTR_SBR	0x80		/*	SCSI Bus Reset		*/
89 #define  NCRINTR_ILL	0x40		/*	Illegal Command		*/
90 #define  NCRINTR_DIS	0x20		/*	Disconnect		*/
91 #define  NCRINTR_BS	0x10		/*	Bus Service		*/
92 #define  NCRINTR_FC	0x08		/*	Function Complete	*/
93 #define  NCRINTR_RESEL	0x04		/*	Reselected		*/
94 #define  NCRINTR_SELATN	0x02		/*	Select with ATN		*/
95 #define  NCRINTR_SEL	0x01		/*	Selected		*/
96 
97 #define	NCR_TIMEOUT	0x05		/* WO - Select/Reselect Timeout */
98 
99 #define	NCR_STEP	0x06		/* RO - Sequence Step		*/
100 #define  NCRSTEP_MASK	0x07		/*	the last 3 bits		*/
101 #define  NCRSTEP_DONE	0x04		/*	command went out	*/
102 
103 #define	NCR_SYNCTP	0x06		/* WO - Synch Transfer Period	*/
104 					/*	Default 5 (53C9X)	*/
105 
106 #define	NCR_FFLAG	0x07		/* RO - FIFO Flags		*/
107 #define  NCRFIFO_SS	0xe0		/*	Sequence Step (Dup)	*/
108 #define  NCRFIFO_FF	0x1f		/*	Bytes in FIFO		*/
109 
110 #define	NCR_SYNCOFF	0x07		/* WO - Synch Offset		*/
111 					/*	0 = ASYNC		*/
112 					/*	1 - 15 = SYNC bytes	*/
113 
114 #define	NCR_CFG1	0x08		/* RW - Configuration #1	*/
115 #define  NCRCFG1_SLOW	0x80		/*	Slow Cable Mode		*/
116 #define  NCRCFG1_SRR	0x40		/*	SCSI Reset Rep Int Dis	*/
117 #define  NCRCFG1_PTEST	0x20		/*	Parity Test Mod		*/
118 #define  NCRCFG1_PARENB	0x10		/*	Enable Parity Check	*/
119 #define  NCRCFG1_CTEST	0x08		/*	Enable Chip Test	*/
120 #define  NCRCFG1_BUSID	0x07		/*	Bus ID			*/
121 
122 #define	NCR_CCF		0x09		/* WO -	Clock Conversion Factor	*/
123 					/*	0 = 35.01 - 40Mhz	*/
124 					/*	NEVER SET TO 1		*/
125 					/*	2 = 10Mhz		*/
126 					/*	3 = 10.01 - 15Mhz	*/
127 					/*	4 = 15.01 - 20Mhz	*/
128 					/*	5 = 20.01 - 25Mhz	*/
129 					/*	6 = 25.01 - 30Mhz	*/
130 					/*	7 = 30.01 - 35Mhz	*/
131 
132 #define	NCR_TEST	0x0a		/* WO - Test (Chip Test Only)	*/
133 
134 #define	NCR_CFG2	0x0b		/* RW - Configuration #2	*/
135 #define	 NCRCFG2_RSVD	0xa0		/*	reserved		*/
136 #define  NCRCFG2_FE	0x40		/* 	Features Enable		*/
137 #define  NCRCFG2_DREQ	0x10		/* 	DREQ High Impedance	*/
138 #define  NCRCFG2_SCSI2	0x08		/* 	SCSI-2 Enable		*/
139 #define  NCRCFG2_BPA	0x04		/* 	Target Bad Parity Abort	*/
140 #define  NCRCFG2_RPE	0x02		/* 	Register Parity Error	*/
141 #define  NCRCFG2_DPE	0x01		/* 	DMA Parity Error	*/
142 
143 /* Config #3 only on 53C9X */
144 #define	NCR_CFG3	0x0c		/* RW - Configuration #3	*/
145 #define	 NCRCFG3_RSVD	0xe0		/*	reserved		*/
146 #define  NCRCFG3_IDM	0x10		/*	ID Message Res Check	*/
147 #define  NCRCFG3_QTE	0x08		/*	Queue Tag Enable	*/
148 #define  NCRCFG3_CDB	0x04		/*	CDB 10-bytes OK		*/
149 #define  NCRCFG3_FSCSI	0x02		/*	Fast SCSI		*/
150 #define  NCRCFG3_FCLK	0x01		/*	Fast Clock (>25Mhz)	*/
151