1*d2cfaccaSjsg /* $OpenBSD: rf3000reg.h,v 1.3 2009/08/16 18:03:48 jsg Exp $ */ 2d96b1169Smillert /* $NetBSD: rf3000reg.h,v 1.3 2004/07/21 04:25:22 dyoung Exp $ */ 32b3868e1Smillert 42b3868e1Smillert /* 52b3868e1Smillert * Copyright (c) 2004 David Young. All rights reserved. 62b3868e1Smillert * 72b3868e1Smillert * This code was written by David Young. 82b3868e1Smillert * 92b3868e1Smillert * Redistribution and use in source and binary forms, with or without 102b3868e1Smillert * modification, are permitted provided that the following conditions 112b3868e1Smillert * are met: 122b3868e1Smillert * 1. Redistributions of source code must retain the above copyright 132b3868e1Smillert * notice, this list of conditions and the following disclaimer. 142b3868e1Smillert * 2. Redistributions in binary form must reproduce the above copyright 152b3868e1Smillert * notice, this list of conditions and the following disclaimer in the 162b3868e1Smillert * documentation and/or other materials provided with the distribution. 172b3868e1Smillert * 3. Neither the name of the author nor the names of any co-contributors 182b3868e1Smillert * may be used to endorse or promote products derived from this software 192b3868e1Smillert * without specific prior written permission. 202b3868e1Smillert * 212b3868e1Smillert * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 222b3868e1Smillert * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 232b3868e1Smillert * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 242b3868e1Smillert * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 252b3868e1Smillert * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 262b3868e1Smillert * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 272b3868e1Smillert * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 282b3868e1Smillert * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 292b3868e1Smillert * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 302b3868e1Smillert * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 312b3868e1Smillert * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 322b3868e1Smillert * OF SUCH DAMAGE. 332b3868e1Smillert */ 342b3868e1Smillert 352b3868e1Smillert #ifndef _DEV_IC_RF3000REG_H_ 362b3868e1Smillert #define _DEV_IC_RF3000REG_H_ 372b3868e1Smillert 382b3868e1Smillert /* 39d96b1169Smillert * Serial bus format for RF Microdevices RF3000 spread-spectrum 40d96b1169Smillert * baseband modem. 41d96b1169Smillert */ 42d96b1169Smillert #define RF3000_TWI_DATA_MASK 0xff 43d96b1169Smillert #define RF3000_TWI_ADDR_MASK 0x7f 44d96b1169Smillert #define RF3000_TWI_AI 0x80 /* auto-increment */ 45d96b1169Smillert 46d96b1169Smillert /* 47d96b1169Smillert * Registers for RFMD RF3000. 482b3868e1Smillert */ 492b3868e1Smillert #define RF3000_CTL 0x01 /* modem control */ 50*d2cfaccaSjsg #define RF3000_CTL_MODE_MASK 0xf0 51d96b1169Smillert #define RF3000_CTL_MODE_1MBPS 0 52d96b1169Smillert #define RF3000_CTL_MODE_RSVD0 1 53d96b1169Smillert #define RF3000_CTL_MODE_2MBPS 2 54d96b1169Smillert #define RF3000_CTL_MODE_2MBPS_SHORT 3 55d96b1169Smillert #define RF3000_CTL_MODE_5MBPS 4 56d96b1169Smillert #define RF3000_CTL_MODE_5MBPS_SHORT 5 57d96b1169Smillert #define RF3000_CTL_MODE_11MBPS 6 58d96b1169Smillert #define RF3000_CTL_MODE_11MBPS_SHORT 7 59d96b1169Smillert #define RF3000_CTL_MODE_BPSK 8 60d96b1169Smillert #define RF3000_CTL_MODE_QPSK 9 61d96b1169Smillert #define RF3000_CTL_MODE_RSVD1 10 62d96b1169Smillert #define RF3000_CTL_MODE_RSVD2 11 63d96b1169Smillert #define RF3000_RXSTAT RF3000_CTL /* RX status */ 64*d2cfaccaSjsg #define RF3000_RXSTAT_SHORTPRE (1<<3) /* 1: short preamble */ 65*d2cfaccaSjsg #define RF3000_RXSTAT_ACQ (1<<2) /* 1: acquired */ 66*d2cfaccaSjsg #define RF3000_RXSTAT_SFD (1<<1) /* 1: SFD detected */ 67*d2cfaccaSjsg #define RF3000_RXSTAT_CRC (1<<0) /* 1: CRC invalid */ 682b3868e1Smillert #define RF3000_CCACTL 0x02 /* CCA control */ 692b3868e1Smillert /* CCA mode */ 70*d2cfaccaSjsg #define RF3000_CCACTL_MODE_MASK 0xc0 712b3868e1Smillert #define RF3000_CCACTL_MODE_RSSIT 0 /* RSSI threshold */ 722b3868e1Smillert #define RF3000_CCACTL_MODE_ACQ 1 /* acquisition */ 732b3868e1Smillert #define RF3000_CCACTL_MODE_BOTH 2 /* threshold or acq. */ 742b3868e1Smillert /* RSSI threshold for CCA */ 75*d2cfaccaSjsg #define RF3000_CCACTL_RSSIT_MASK 0x3f 762b3868e1Smillert #define RF3000_DIVCTL 0x03 /* diversity control */ 77*d2cfaccaSjsg #define RF3000_DIVCTL_ENABLE (1<<7) /* enable diversity */ 78*d2cfaccaSjsg #define RF3000_DIVCTL_ANTSEL (1<<6) /* if ENABLE = 0, set 792b3868e1Smillert * ANT SEL 802b3868e1Smillert */ 812b3868e1Smillert #define RF3000_RSSI RF3000_DIVCTL /* RSSI value */ 82*d2cfaccaSjsg #define RF3000_RSSI_MASK 0x3f 832b3868e1Smillert #define RF3000_GAINCTL 0x11 /* TX variable gain control */ 84*d2cfaccaSjsg #define RF3000_GAINCTL_TXVGC_MASK 0xfc 85*d2cfaccaSjsg #define RF3000_GAINCTL_SCRAMBLER (1<<1) 862b3868e1Smillert #define RF3000_LOGAINCAL 0x14 /* low gain calibration */ 87*d2cfaccaSjsg #define RF3000_LOGAINCAL_CAL_MASK 0x3f 882b3868e1Smillert #define RF3000_HIGAINCAL 0x15 /* high gain calibration */ 89*d2cfaccaSjsg #define RF3000_HIGAINCAL_CAL_MASK 0x3f 90*d2cfaccaSjsg #define RF3000_HIGAINCAL_DSSSPAD (1<<6) /* 6dB gain pad for DSSS 912b3868e1Smillert * modes (meaning?) 922b3868e1Smillert */ 932b3868e1Smillert #define RF3000_OPTIONS1 0x1C /* Options Register 1 */ 942b3868e1Smillert /* Saturation threshold is 4 + offset, where -3 <= offset <= 3. 952b3868e1Smillert * SAT_THRESH is the absolute value, SAT_THRESH_SIGN is the sign. 962b3868e1Smillert */ 97*d2cfaccaSjsg #define RF3000_OPTIONS1_SAT_THRESH_SIGN (1<<7) 98*d2cfaccaSjsg #define RF3000_OPTIONS1_SAT_THRESH 0x60 99*d2cfaccaSjsg #define RF3000_OPTIONS1_ALTAGC (1<<4) /* 1: retrigger AGC 1002b3868e1Smillert * algorithm on ADC 1012b3868e1Smillert * saturation 1022b3868e1Smillert */ 103*d2cfaccaSjsg #define RF3000_OPTIONS1_ALTBUS (1<<3) /* 1: enable alternate 1042b3868e1Smillert * Tx/Rx data bus 1052b3868e1Smillert * interface. 1062b3868e1Smillert */ 107*d2cfaccaSjsg #define RF3000_OPTIONS1_RESERVED0_MASK 0x7/* 0 */ 1082b3868e1Smillert 1092b3868e1Smillert #define RF3000_OPTIONS2 0x1D /* Options Register 2 */ 1102b3868e1Smillert /* 1: delay next AGC 2us instead of 1us after a 1->0 LNAGS-pin transition. */ 111*d2cfaccaSjsg #define RF3000_OPTIONS2_LNAGS_DELAY (1<<7) 112*d2cfaccaSjsg #define RF3000_OPTIONS2_RESERVED0_MASK 0x78 /* 0 */ 1132b3868e1Smillert /* Threshold for AGC re-trigger. 0: high count, 1: low count. */ 114*d2cfaccaSjsg #define RF3000_OPTIONS2_RTG_THRESH (1<<2) 115*d2cfaccaSjsg #define RF3000_OPTIONS2_RESERVED1_MASK 0x3 /* 0 */ 1162b3868e1Smillert 1172b3868e1Smillert #endif /* _DEV_IC_RF3000REG_H_ */ 118