1 /* $OpenBSD: rt2560.c,v 1.80 2016/04/13 10:49:26 mpi Exp $ */ 2 3 /*- 4 * Copyright (c) 2005, 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Ralink Technology RT2560 chipset driver 22 * http://www.ralinktech.com/ 23 */ 24 25 #include "bpfilter.h" 26 27 #include <sys/param.h> 28 #include <sys/sockio.h> 29 #include <sys/mbuf.h> 30 #include <sys/kernel.h> 31 #include <sys/socket.h> 32 #include <sys/systm.h> 33 #include <sys/malloc.h> 34 #include <sys/timeout.h> 35 #include <sys/conf.h> 36 #include <sys/device.h> 37 #include <sys/endian.h> 38 39 #include <machine/bus.h> 40 #include <machine/intr.h> 41 42 #if NBPFILTER > 0 43 #include <net/bpf.h> 44 #endif 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_media.h> 48 49 #include <netinet/in.h> 50 #include <netinet/if_ether.h> 51 52 #include <net80211/ieee80211_var.h> 53 #include <net80211/ieee80211_amrr.h> 54 #include <net80211/ieee80211_radiotap.h> 55 56 #include <dev/ic/rt2560reg.h> 57 #include <dev/ic/rt2560var.h> 58 59 #ifdef RAL_DEBUG 60 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 61 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 62 int rt2560_debug = 1; 63 #else 64 #define DPRINTF(x) 65 #define DPRINTFN(n, x) 66 #endif 67 68 int rt2560_alloc_tx_ring(struct rt2560_softc *, 69 struct rt2560_tx_ring *, int); 70 void rt2560_reset_tx_ring(struct rt2560_softc *, 71 struct rt2560_tx_ring *); 72 void rt2560_free_tx_ring(struct rt2560_softc *, 73 struct rt2560_tx_ring *); 74 int rt2560_alloc_rx_ring(struct rt2560_softc *, 75 struct rt2560_rx_ring *, int); 76 void rt2560_reset_rx_ring(struct rt2560_softc *, 77 struct rt2560_rx_ring *); 78 void rt2560_free_rx_ring(struct rt2560_softc *, 79 struct rt2560_rx_ring *); 80 struct ieee80211_node *rt2560_node_alloc(struct ieee80211com *); 81 int rt2560_media_change(struct ifnet *); 82 void rt2560_next_scan(void *); 83 void rt2560_iter_func(void *, struct ieee80211_node *); 84 void rt2560_amrr_timeout(void *); 85 void rt2560_newassoc(struct ieee80211com *, struct ieee80211_node *, 86 int); 87 int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 88 int); 89 uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 90 void rt2560_encryption_intr(struct rt2560_softc *); 91 void rt2560_tx_intr(struct rt2560_softc *); 92 void rt2560_prio_intr(struct rt2560_softc *); 93 void rt2560_decryption_intr(struct rt2560_softc *); 94 void rt2560_rx_intr(struct rt2560_softc *); 95 #ifndef IEEE80211_STA_ONLY 96 void rt2560_beacon_expire(struct rt2560_softc *); 97 #endif 98 void rt2560_wakeup_expire(struct rt2560_softc *); 99 #if NBPFILTER > 0 100 uint8_t rt2560_rxrate(const struct rt2560_rx_desc *); 101 #endif 102 int rt2560_ack_rate(struct ieee80211com *, int); 103 uint16_t rt2560_txtime(int, int, uint32_t); 104 uint8_t rt2560_plcp_signal(int); 105 void rt2560_setup_tx_desc(struct rt2560_softc *, 106 struct rt2560_tx_desc *, uint32_t, int, int, int, 107 bus_addr_t); 108 #ifndef IEEE80211_STA_ONLY 109 int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 110 struct ieee80211_node *); 111 #endif 112 int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 113 struct ieee80211_node *); 114 int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 115 struct ieee80211_node *); 116 void rt2560_start(struct ifnet *); 117 void rt2560_watchdog(struct ifnet *); 118 int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 119 void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 120 uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 121 void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 122 void rt2560_set_chan(struct rt2560_softc *, 123 struct ieee80211_channel *); 124 void rt2560_disable_rf_tune(struct rt2560_softc *); 125 void rt2560_enable_tsf_sync(struct rt2560_softc *); 126 void rt2560_update_plcp(struct rt2560_softc *); 127 void rt2560_updateslot(struct ieee80211com *); 128 void rt2560_set_slottime(struct rt2560_softc *); 129 void rt2560_set_basicrates(struct rt2560_softc *); 130 void rt2560_update_led(struct rt2560_softc *, int, int); 131 void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 132 void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 133 void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 134 void rt2560_update_promisc(struct rt2560_softc *); 135 void rt2560_set_txantenna(struct rt2560_softc *, int); 136 void rt2560_set_rxantenna(struct rt2560_softc *, int); 137 const char *rt2560_get_rf(int); 138 void rt2560_read_eeprom(struct rt2560_softc *); 139 int rt2560_bbp_init(struct rt2560_softc *); 140 int rt2560_init(struct ifnet *); 141 void rt2560_stop(struct ifnet *, int); 142 143 static const struct { 144 uint32_t reg; 145 uint32_t val; 146 } rt2560_def_mac[] = { 147 RT2560_DEF_MAC 148 }; 149 150 static const struct { 151 uint8_t reg; 152 uint8_t val; 153 } rt2560_def_bbp[] = { 154 RT2560_DEF_BBP 155 }; 156 157 static const uint32_t rt2560_rf2522_r2[] = RT2560_RF2522_R2; 158 static const uint32_t rt2560_rf2523_r2[] = RT2560_RF2523_R2; 159 static const uint32_t rt2560_rf2524_r2[] = RT2560_RF2524_R2; 160 static const uint32_t rt2560_rf2525_r2[] = RT2560_RF2525_R2; 161 static const uint32_t rt2560_rf2525_hi_r2[] = RT2560_RF2525_HI_R2; 162 static const uint32_t rt2560_rf2525e_r2[] = RT2560_RF2525E_R2; 163 static const uint32_t rt2560_rf2526_r2[] = RT2560_RF2526_R2; 164 static const uint32_t rt2560_rf2526_hi_r2[] = RT2560_RF2526_HI_R2; 165 166 int 167 rt2560_attach(void *xsc, int id) 168 { 169 struct rt2560_softc *sc = xsc; 170 struct ieee80211com *ic = &sc->sc_ic; 171 struct ifnet *ifp = &ic->ic_if; 172 int error, i; 173 174 sc->amrr.amrr_min_success_threshold = 1; 175 sc->amrr.amrr_max_success_threshold = 15; 176 timeout_set(&sc->amrr_to, rt2560_amrr_timeout, sc); 177 timeout_set(&sc->scan_to, rt2560_next_scan, sc); 178 179 /* retrieve RT2560 rev. no */ 180 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 181 182 /* retrieve MAC address */ 183 rt2560_get_macaddr(sc, ic->ic_myaddr); 184 printf(", address %s\n", ether_sprintf(ic->ic_myaddr)); 185 186 /* retrieve RF rev. no and various other things from EEPROM */ 187 rt2560_read_eeprom(sc); 188 189 printf("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", sc->sc_dev.dv_xname, 190 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 191 192 /* 193 * Allocate Tx and Rx rings. 194 */ 195 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 196 if (error != 0) { 197 printf("%s: could not allocate Tx ring\n", 198 sc->sc_dev.dv_xname); 199 goto fail1; 200 } 201 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 202 if (error != 0) { 203 printf("%s: could not allocate ATIM ring\n", 204 sc->sc_dev.dv_xname); 205 goto fail2; 206 } 207 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 208 if (error != 0) { 209 printf("%s: could not allocate Prio ring\n", 210 sc->sc_dev.dv_xname); 211 goto fail3; 212 } 213 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 214 if (error != 0) { 215 printf("%s: could not allocate Beacon ring\n", 216 sc->sc_dev.dv_xname); 217 goto fail4; 218 } 219 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 220 if (error != 0) { 221 printf("%s: could not allocate Rx ring\n", 222 sc->sc_dev.dv_xname); 223 goto fail5; 224 } 225 226 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 227 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 228 ic->ic_state = IEEE80211_S_INIT; 229 230 /* set device capabilities */ 231 ic->ic_caps = 232 IEEE80211_C_MONITOR | /* monitor mode supported */ 233 #ifndef IEEE80211_STA_ONLY 234 IEEE80211_C_IBSS | /* IBSS mode supported */ 235 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 236 #endif 237 IEEE80211_C_TXPMGT | /* tx power management */ 238 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 239 IEEE80211_C_SHSLOT | /* short slot time supported */ 240 IEEE80211_C_WEP | /* s/w WEP */ 241 IEEE80211_C_RSN; /* WPA/RSN */ 242 243 /* set supported .11b and .11g rates */ 244 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 245 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 246 247 /* set supported .11b and .11g channels (1 through 14) */ 248 for (i = 1; i <= 14; i++) { 249 ic->ic_channels[i].ic_freq = 250 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 251 ic->ic_channels[i].ic_flags = 252 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 253 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 254 } 255 256 ifp->if_softc = sc; 257 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 258 ifp->if_ioctl = rt2560_ioctl; 259 ifp->if_start = rt2560_start; 260 ifp->if_watchdog = rt2560_watchdog; 261 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 262 263 if_attach(ifp); 264 ieee80211_ifattach(ifp); 265 ic->ic_node_alloc = rt2560_node_alloc; 266 ic->ic_newassoc = rt2560_newassoc; 267 ic->ic_updateslot = rt2560_updateslot; 268 269 /* override state transition machine */ 270 sc->sc_newstate = ic->ic_newstate; 271 ic->ic_newstate = rt2560_newstate; 272 ieee80211_media_init(ifp, rt2560_media_change, ieee80211_media_status); 273 274 #if NBPFILTER > 0 275 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 276 sizeof (struct ieee80211_frame) + 64); 277 278 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 279 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 280 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 281 282 sc->sc_txtap_len = sizeof sc->sc_txtapu; 283 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 284 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 285 #endif 286 return 0; 287 288 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 289 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 290 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 291 fail2: rt2560_free_tx_ring(sc, &sc->txq); 292 fail1: return ENXIO; 293 } 294 295 int 296 rt2560_detach(void *xsc) 297 { 298 struct rt2560_softc *sc = xsc; 299 struct ifnet *ifp = &sc->sc_ic.ic_if; 300 301 timeout_del(&sc->scan_to); 302 timeout_del(&sc->amrr_to); 303 304 ieee80211_ifdetach(ifp); /* free all nodes */ 305 if_detach(ifp); 306 307 rt2560_free_tx_ring(sc, &sc->txq); 308 rt2560_free_tx_ring(sc, &sc->atimq); 309 rt2560_free_tx_ring(sc, &sc->prioq); 310 rt2560_free_tx_ring(sc, &sc->bcnq); 311 rt2560_free_rx_ring(sc, &sc->rxq); 312 313 return 0; 314 } 315 316 void 317 rt2560_suspend(void *xsc) 318 { 319 struct rt2560_softc *sc = xsc; 320 struct ifnet *ifp = &sc->sc_ic.ic_if; 321 322 if (ifp->if_flags & IFF_RUNNING) 323 rt2560_stop(ifp, 1); 324 } 325 326 void 327 rt2560_wakeup(void *xsc) 328 { 329 struct rt2560_softc *sc = xsc; 330 struct ifnet *ifp = &sc->sc_ic.ic_if; 331 332 if (ifp->if_flags & IFF_UP) 333 rt2560_init(ifp); 334 } 335 336 int 337 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 338 int count) 339 { 340 int i, nsegs, error; 341 342 ring->count = count; 343 ring->queued = 0; 344 ring->cur = ring->next = 0; 345 ring->cur_encrypt = ring->next_encrypt = 0; 346 347 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 348 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 349 if (error != 0) { 350 printf("%s: could not create desc DMA map\n", 351 sc->sc_dev.dv_xname); 352 goto fail; 353 } 354 355 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 356 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 357 if (error != 0) { 358 printf("%s: could not allocate DMA memory\n", 359 sc->sc_dev.dv_xname); 360 goto fail; 361 } 362 363 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 364 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 365 BUS_DMA_NOWAIT); 366 if (error != 0) { 367 printf("%s: can't map desc DMA memory\n", 368 sc->sc_dev.dv_xname); 369 goto fail; 370 } 371 372 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 373 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 374 if (error != 0) { 375 printf("%s: could not load desc DMA map\n", 376 sc->sc_dev.dv_xname); 377 goto fail; 378 } 379 380 ring->physaddr = ring->map->dm_segs->ds_addr; 381 382 ring->data = mallocarray(count, sizeof (struct rt2560_tx_data), 383 M_DEVBUF, M_NOWAIT | M_ZERO); 384 if (ring->data == NULL) { 385 printf("%s: could not allocate soft data\n", 386 sc->sc_dev.dv_xname); 387 error = ENOMEM; 388 goto fail; 389 } 390 391 for (i = 0; i < count; i++) { 392 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 393 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 394 &ring->data[i].map); 395 if (error != 0) { 396 printf("%s: could not create DMA map\n", 397 sc->sc_dev.dv_xname); 398 goto fail; 399 } 400 } 401 402 return 0; 403 404 fail: rt2560_free_tx_ring(sc, ring); 405 return error; 406 } 407 408 void 409 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 410 { 411 int i; 412 413 for (i = 0; i < ring->count; i++) { 414 struct rt2560_tx_desc *desc = &ring->desc[i]; 415 struct rt2560_tx_data *data = &ring->data[i]; 416 417 if (data->m != NULL) { 418 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 419 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 420 bus_dmamap_unload(sc->sc_dmat, data->map); 421 m_freem(data->m); 422 data->m = NULL; 423 } 424 425 /* 426 * The node has already been freed at that point so don't call 427 * ieee80211_release_node() here. 428 */ 429 data->ni = NULL; 430 431 desc->flags = 0; 432 } 433 434 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 435 BUS_DMASYNC_PREWRITE); 436 437 ring->queued = 0; 438 ring->cur = ring->next = 0; 439 ring->cur_encrypt = ring->next_encrypt = 0; 440 } 441 442 void 443 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 444 { 445 int i; 446 447 if (ring->desc != NULL) { 448 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 449 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 450 bus_dmamap_unload(sc->sc_dmat, ring->map); 451 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 452 ring->count * RT2560_TX_DESC_SIZE); 453 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 454 } 455 456 if (ring->data != NULL) { 457 for (i = 0; i < ring->count; i++) { 458 struct rt2560_tx_data *data = &ring->data[i]; 459 460 if (data->m != NULL) { 461 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 462 data->map->dm_mapsize, 463 BUS_DMASYNC_POSTWRITE); 464 bus_dmamap_unload(sc->sc_dmat, data->map); 465 m_freem(data->m); 466 } 467 468 /* 469 * The node has already been freed at that point so 470 * don't call ieee80211_release_node() here. 471 */ 472 data->ni = NULL; 473 474 if (data->map != NULL) 475 bus_dmamap_destroy(sc->sc_dmat, data->map); 476 } 477 free(ring->data, M_DEVBUF, ring->count * sizeof *ring->data); 478 } 479 } 480 481 int 482 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 483 int count) 484 { 485 int i, nsegs, error; 486 487 ring->count = count; 488 ring->cur = ring->next = 0; 489 ring->cur_decrypt = 0; 490 491 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 492 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 493 if (error != 0) { 494 printf("%s: could not create desc DMA map\n", 495 sc->sc_dev.dv_xname); 496 goto fail; 497 } 498 499 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 500 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO); 501 if (error != 0) { 502 printf("%s: could not allocate DMA memory\n", 503 sc->sc_dev.dv_xname); 504 goto fail; 505 } 506 507 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 508 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 509 BUS_DMA_NOWAIT); 510 if (error != 0) { 511 printf("%s: can't map desc DMA memory\n", 512 sc->sc_dev.dv_xname); 513 goto fail; 514 } 515 516 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 517 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 518 if (error != 0) { 519 printf("%s: could not load desc DMA map\n", 520 sc->sc_dev.dv_xname); 521 goto fail; 522 } 523 524 ring->physaddr = ring->map->dm_segs->ds_addr; 525 526 ring->data = mallocarray(count, sizeof (struct rt2560_rx_data), 527 M_DEVBUF, M_NOWAIT | M_ZERO); 528 if (ring->data == NULL) { 529 printf("%s: could not allocate soft data\n", 530 sc->sc_dev.dv_xname); 531 error = ENOMEM; 532 goto fail; 533 } 534 535 /* 536 * Pre-allocate Rx buffers and populate Rx ring. 537 */ 538 for (i = 0; i < count; i++) { 539 struct rt2560_rx_desc *desc = &sc->rxq.desc[i]; 540 struct rt2560_rx_data *data = &sc->rxq.data[i]; 541 542 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 543 0, BUS_DMA_NOWAIT, &data->map); 544 if (error != 0) { 545 printf("%s: could not create DMA map\n", 546 sc->sc_dev.dv_xname); 547 goto fail; 548 } 549 550 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 551 if (data->m == NULL) { 552 printf("%s: could not allocate rx mbuf\n", 553 sc->sc_dev.dv_xname); 554 error = ENOMEM; 555 goto fail; 556 } 557 MCLGET(data->m, M_DONTWAIT); 558 if (!(data->m->m_flags & M_EXT)) { 559 printf("%s: could not allocate rx mbuf cluster\n", 560 sc->sc_dev.dv_xname); 561 error = ENOMEM; 562 goto fail; 563 } 564 565 error = bus_dmamap_load(sc->sc_dmat, data->map, 566 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 567 if (error != 0) { 568 printf("%s: could not load rx buf DMA map", 569 sc->sc_dev.dv_xname); 570 goto fail; 571 } 572 573 desc->flags = htole32(RT2560_RX_BUSY); 574 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 575 } 576 577 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 578 BUS_DMASYNC_PREWRITE); 579 580 return 0; 581 582 fail: rt2560_free_rx_ring(sc, ring); 583 return error; 584 } 585 586 void 587 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 588 { 589 int i; 590 591 for (i = 0; i < ring->count; i++) { 592 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 593 ring->data[i].drop = 0; 594 } 595 596 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 597 BUS_DMASYNC_PREWRITE); 598 599 ring->cur = ring->next = 0; 600 ring->cur_decrypt = 0; 601 } 602 603 void 604 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 605 { 606 int i; 607 608 if (ring->desc != NULL) { 609 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 610 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 611 bus_dmamap_unload(sc->sc_dmat, ring->map); 612 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 613 ring->count * RT2560_RX_DESC_SIZE); 614 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 615 } 616 617 if (ring->data != NULL) { 618 for (i = 0; i < ring->count; i++) { 619 struct rt2560_rx_data *data = &ring->data[i]; 620 621 if (data->m != NULL) { 622 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 623 data->map->dm_mapsize, 624 BUS_DMASYNC_POSTREAD); 625 bus_dmamap_unload(sc->sc_dmat, data->map); 626 m_freem(data->m); 627 } 628 629 if (data->map != NULL) 630 bus_dmamap_destroy(sc->sc_dmat, data->map); 631 } 632 free(ring->data, M_DEVBUF, ring->count * sizeof *ring->data); 633 } 634 } 635 636 struct ieee80211_node * 637 rt2560_node_alloc(struct ieee80211com *ic) 638 { 639 return malloc(sizeof (struct rt2560_node), M_DEVBUF, 640 M_NOWAIT | M_ZERO); 641 } 642 643 int 644 rt2560_media_change(struct ifnet *ifp) 645 { 646 int error; 647 648 error = ieee80211_media_change(ifp); 649 if (error != ENETRESET) 650 return error; 651 652 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 653 rt2560_init(ifp); 654 655 return 0; 656 } 657 658 /* 659 * This function is called periodically (every 200ms) during scanning to 660 * switch from one channel to another. 661 */ 662 void 663 rt2560_next_scan(void *arg) 664 { 665 struct rt2560_softc *sc = arg; 666 struct ieee80211com *ic = &sc->sc_ic; 667 struct ifnet *ifp = &ic->ic_if; 668 int s; 669 670 s = splnet(); 671 if (ic->ic_state == IEEE80211_S_SCAN) 672 ieee80211_next_scan(ifp); 673 splx(s); 674 } 675 676 /* 677 * This function is called for each neighbor node. 678 */ 679 void 680 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 681 { 682 struct rt2560_softc *sc = arg; 683 struct rt2560_node *rn = (struct rt2560_node *)ni; 684 685 ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn); 686 } 687 688 void 689 rt2560_amrr_timeout(void *arg) 690 { 691 struct rt2560_softc *sc = arg; 692 struct ieee80211com *ic = &sc->sc_ic; 693 int s; 694 695 s = splnet(); 696 if (ic->ic_opmode == IEEE80211_M_STA) 697 rt2560_iter_func(sc, ic->ic_bss); 698 #ifndef IEEE80211_STA_ONLY 699 else 700 ieee80211_iterate_nodes(ic, rt2560_iter_func, sc); 701 #endif 702 splx(s); 703 704 timeout_add_msec(&sc->amrr_to, 500); 705 } 706 707 void 708 rt2560_newassoc(struct ieee80211com *ic, struct ieee80211_node *ni, int isnew) 709 { 710 struct rt2560_softc *sc = ic->ic_softc; 711 int i; 712 713 ieee80211_amrr_node_init(&sc->amrr, &((struct rt2560_node *)ni)->amn); 714 715 /* set rate to some reasonable initial value */ 716 for (i = ni->ni_rates.rs_nrates - 1; 717 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 718 i--); 719 ni->ni_txrate = i; 720 } 721 722 int 723 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 724 { 725 struct rt2560_softc *sc = ic->ic_if.if_softc; 726 enum ieee80211_state ostate; 727 struct ieee80211_node *ni; 728 int error = 0; 729 730 ostate = ic->ic_state; 731 timeout_del(&sc->scan_to); 732 timeout_del(&sc->amrr_to); 733 734 switch (nstate) { 735 case IEEE80211_S_INIT: 736 if (ostate == IEEE80211_S_RUN) { 737 /* abort TSF synchronization */ 738 RAL_WRITE(sc, RT2560_CSR14, 0); 739 740 /* turn association led off */ 741 rt2560_update_led(sc, 0, 0); 742 } 743 break; 744 745 case IEEE80211_S_SCAN: 746 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 747 timeout_add_msec(&sc->scan_to, 200); 748 break; 749 750 case IEEE80211_S_AUTH: 751 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 752 break; 753 754 case IEEE80211_S_ASSOC: 755 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 756 break; 757 758 case IEEE80211_S_RUN: 759 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 760 761 ni = ic->ic_bss; 762 763 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 764 rt2560_update_plcp(sc); 765 rt2560_set_slottime(sc); 766 rt2560_set_basicrates(sc); 767 rt2560_set_bssid(sc, ni->ni_bssid); 768 } 769 770 #ifndef IEEE80211_STA_ONLY 771 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 772 ic->ic_opmode == IEEE80211_M_IBSS) { 773 struct mbuf *m = ieee80211_beacon_alloc(ic, ni); 774 if (m == NULL) { 775 printf("%s: could not allocate beacon\n", 776 sc->sc_dev.dv_xname); 777 error = ENOBUFS; 778 break; 779 } 780 781 error = rt2560_tx_bcn(sc, m, ni); 782 if (error != 0) 783 break; 784 } 785 #endif 786 787 /* turn assocation led on */ 788 rt2560_update_led(sc, 1, 0); 789 790 if (ic->ic_opmode == IEEE80211_M_STA) { 791 /* fake a join to init the tx rate */ 792 rt2560_newassoc(ic, ni, 1); 793 } 794 795 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 796 /* start automatic rate control timer */ 797 if (ic->ic_fixed_rate == -1) 798 timeout_add_msec(&sc->amrr_to, 500); 799 800 rt2560_enable_tsf_sync(sc); 801 } 802 break; 803 } 804 805 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 806 } 807 808 /* 809 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 810 * 93C66). 811 */ 812 uint16_t 813 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 814 { 815 uint32_t tmp; 816 uint16_t val; 817 int n; 818 819 /* clock C once before the first command */ 820 RT2560_EEPROM_CTL(sc, 0); 821 822 RT2560_EEPROM_CTL(sc, RT2560_S); 823 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 824 RT2560_EEPROM_CTL(sc, RT2560_S); 825 826 /* write start bit (1) */ 827 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 828 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 829 830 /* write READ opcode (10) */ 831 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 832 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 833 RT2560_EEPROM_CTL(sc, RT2560_S); 834 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 835 836 /* write address (A5-A0 or A7-A0) */ 837 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 838 for (; n >= 0; n--) { 839 RT2560_EEPROM_CTL(sc, RT2560_S | 840 (((addr >> n) & 1) << RT2560_SHIFT_D)); 841 RT2560_EEPROM_CTL(sc, RT2560_S | 842 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 843 } 844 845 RT2560_EEPROM_CTL(sc, RT2560_S); 846 847 /* read data Q15-Q0 */ 848 val = 0; 849 for (n = 15; n >= 0; n--) { 850 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 851 tmp = RAL_READ(sc, RT2560_CSR21); 852 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 853 RT2560_EEPROM_CTL(sc, RT2560_S); 854 } 855 856 RT2560_EEPROM_CTL(sc, 0); 857 858 /* clear Chip Select and clock C */ 859 RT2560_EEPROM_CTL(sc, RT2560_S); 860 RT2560_EEPROM_CTL(sc, 0); 861 RT2560_EEPROM_CTL(sc, RT2560_C); 862 863 return val; 864 } 865 866 /* 867 * Some frames were processed by the hardware cipher engine and are ready for 868 * transmission. 869 */ 870 void 871 rt2560_encryption_intr(struct rt2560_softc *sc) 872 { 873 int hw; 874 875 /* retrieve last descriptor index processed by cipher engine */ 876 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 877 RT2560_TX_DESC_SIZE; 878 879 for (; sc->txq.next_encrypt != hw;) { 880 struct rt2560_tx_desc *desc = 881 &sc->txq.desc[sc->txq.next_encrypt]; 882 883 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 884 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 885 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 886 887 if (letoh32(desc->flags) & 888 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 889 break; 890 891 /* for TKIP, swap eiv field to fix a bug in ASIC */ 892 if ((letoh32(desc->flags) & RT2560_TX_CIPHER_MASK) == 893 RT2560_TX_CIPHER_TKIP) 894 desc->eiv = swap32(desc->eiv); 895 896 /* mark the frame ready for transmission */ 897 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 898 899 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 900 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 901 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 902 903 DPRINTFN(15, ("encryption done idx=%u\n", 904 sc->txq.next_encrypt)); 905 906 sc->txq.next_encrypt = 907 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 908 } 909 910 /* kick Tx */ 911 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 912 } 913 914 void 915 rt2560_tx_intr(struct rt2560_softc *sc) 916 { 917 struct ieee80211com *ic = &sc->sc_ic; 918 struct ifnet *ifp = &ic->ic_if; 919 920 for (;;) { 921 struct rt2560_tx_desc *desc = &sc->txq.desc[sc->txq.next]; 922 struct rt2560_tx_data *data = &sc->txq.data[sc->txq.next]; 923 struct rt2560_node *rn; 924 925 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 926 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 927 BUS_DMASYNC_POSTREAD); 928 929 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 930 (letoh32(desc->flags) & RT2560_TX_CIPHER_BUSY) || 931 !(letoh32(desc->flags) & RT2560_TX_VALID)) 932 break; 933 934 rn = (struct rt2560_node *)data->ni; 935 936 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 937 case RT2560_TX_SUCCESS: 938 DPRINTFN(10, ("data frame sent successfully\n")); 939 rn->amn.amn_txcnt++; 940 ifp->if_opackets++; 941 break; 942 943 case RT2560_TX_SUCCESS_RETRY: 944 DPRINTFN(9, ("data frame sent after %u retries\n", 945 (letoh32(desc->flags) >> 5) & 0x7)); 946 rn->amn.amn_txcnt++; 947 rn->amn.amn_retrycnt++; 948 ifp->if_opackets++; 949 break; 950 951 case RT2560_TX_FAIL_RETRY: 952 DPRINTFN(9, ("sending data frame failed (too much " 953 "retries)\n")); 954 rn->amn.amn_txcnt++; 955 rn->amn.amn_retrycnt++; 956 ifp->if_oerrors++; 957 break; 958 959 case RT2560_TX_FAIL_INVALID: 960 case RT2560_TX_FAIL_OTHER: 961 default: 962 printf("%s: sending data frame failed 0x%08x\n", 963 sc->sc_dev.dv_xname, letoh32(desc->flags)); 964 ifp->if_oerrors++; 965 } 966 967 /* descriptor is no longer valid */ 968 desc->flags &= ~htole32(RT2560_TX_VALID); 969 970 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 971 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 972 BUS_DMASYNC_PREWRITE); 973 974 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 975 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 976 bus_dmamap_unload(sc->sc_dmat, data->map); 977 m_freem(data->m); 978 data->m = NULL; 979 ieee80211_release_node(ic, data->ni); 980 data->ni = NULL; 981 982 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 983 984 sc->txq.queued--; 985 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 986 } 987 988 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 989 sc->sc_tx_timer = 0; 990 if (sc->txq.queued < RT2560_TX_RING_COUNT - 1) { 991 sc->sc_flags &= ~RT2560_DATA_OACTIVE; 992 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 993 ifq_clr_oactive(&ifp->if_snd); 994 rt2560_start(ifp); 995 } 996 } 997 998 void 999 rt2560_prio_intr(struct rt2560_softc *sc) 1000 { 1001 struct ieee80211com *ic = &sc->sc_ic; 1002 struct ifnet *ifp = &ic->ic_if; 1003 1004 for (;;) { 1005 struct rt2560_tx_desc *desc = &sc->prioq.desc[sc->prioq.next]; 1006 struct rt2560_tx_data *data = &sc->prioq.data[sc->prioq.next]; 1007 1008 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1009 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1010 BUS_DMASYNC_POSTREAD); 1011 1012 if ((letoh32(desc->flags) & RT2560_TX_BUSY) || 1013 !(letoh32(desc->flags) & RT2560_TX_VALID)) 1014 break; 1015 1016 switch (letoh32(desc->flags) & RT2560_TX_RESULT_MASK) { 1017 case RT2560_TX_SUCCESS: 1018 DPRINTFN(10, ("mgt frame sent successfully\n")); 1019 break; 1020 1021 case RT2560_TX_SUCCESS_RETRY: 1022 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1023 (letoh32(desc->flags) >> 5) & 0x7)); 1024 break; 1025 1026 case RT2560_TX_FAIL_RETRY: 1027 DPRINTFN(9, ("sending mgt frame failed (too much " 1028 "retries)\n")); 1029 break; 1030 1031 case RT2560_TX_FAIL_INVALID: 1032 case RT2560_TX_FAIL_OTHER: 1033 default: 1034 printf("%s: sending mgt frame failed 0x%08x\n", 1035 sc->sc_dev.dv_xname, letoh32(desc->flags)); 1036 } 1037 1038 /* descriptor is no longer valid */ 1039 desc->flags &= ~htole32(RT2560_TX_VALID); 1040 1041 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1042 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1043 BUS_DMASYNC_PREWRITE); 1044 1045 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1046 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1047 bus_dmamap_unload(sc->sc_dmat, data->map); 1048 m_freem(data->m); 1049 data->m = NULL; 1050 ieee80211_release_node(ic, data->ni); 1051 data->ni = NULL; 1052 1053 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1054 1055 sc->prioq.queued--; 1056 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1057 } 1058 1059 if (sc->txq.queued == 0 && sc->prioq.queued == 0) 1060 sc->sc_tx_timer = 0; 1061 if (sc->prioq.queued < RT2560_PRIO_RING_COUNT) { 1062 sc->sc_flags &= ~RT2560_PRIO_OACTIVE; 1063 if (!(sc->sc_flags & (RT2560_DATA_OACTIVE|RT2560_PRIO_OACTIVE))) 1064 ifq_clr_oactive(&ifp->if_snd); 1065 rt2560_start(ifp); 1066 } 1067 } 1068 1069 /* 1070 * Some frames were processed by the hardware cipher engine and are ready for 1071 * transmission to the IEEE802.11 layer. 1072 */ 1073 void 1074 rt2560_decryption_intr(struct rt2560_softc *sc) 1075 { 1076 struct ieee80211com *ic = &sc->sc_ic; 1077 struct ifnet *ifp = &ic->ic_if; 1078 struct ieee80211_frame *wh; 1079 struct ieee80211_rxinfo rxi; 1080 struct ieee80211_node *ni; 1081 struct mbuf *mnew, *m; 1082 int hw, error; 1083 1084 /* retrieve last decriptor index processed by cipher engine */ 1085 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1086 RT2560_RX_DESC_SIZE; 1087 1088 for (; sc->rxq.cur_decrypt != hw;) { 1089 struct rt2560_rx_desc *desc = 1090 &sc->rxq.desc[sc->rxq.cur_decrypt]; 1091 struct rt2560_rx_data *data = 1092 &sc->rxq.data[sc->rxq.cur_decrypt]; 1093 1094 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1095 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1096 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1097 1098 if (letoh32(desc->flags) & 1099 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1100 break; 1101 1102 if (data->drop) { 1103 ifp->if_ierrors++; 1104 goto skip; 1105 } 1106 1107 if ((letoh32(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1108 (letoh32(desc->flags) & RT2560_RX_ICV_ERROR)) { 1109 ifp->if_ierrors++; 1110 goto skip; 1111 } 1112 1113 /* 1114 * Try to allocate a new mbuf for this ring element and load it 1115 * before processing the current mbuf. If the ring element 1116 * cannot be loaded, drop the received packet and reuse the old 1117 * mbuf. In the unlikely case that the old mbuf can't be 1118 * reloaded either, explicitly panic. 1119 */ 1120 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1121 if (mnew == NULL) { 1122 ifp->if_ierrors++; 1123 goto skip; 1124 } 1125 MCLGET(mnew, M_DONTWAIT); 1126 if (!(mnew->m_flags & M_EXT)) { 1127 m_freem(mnew); 1128 ifp->if_ierrors++; 1129 goto skip; 1130 } 1131 1132 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1133 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1134 bus_dmamap_unload(sc->sc_dmat, data->map); 1135 1136 error = bus_dmamap_load(sc->sc_dmat, data->map, 1137 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1138 if (error != 0) { 1139 m_freem(mnew); 1140 1141 /* try to reload the old mbuf */ 1142 error = bus_dmamap_load(sc->sc_dmat, data->map, 1143 mtod(data->m, void *), MCLBYTES, NULL, 1144 BUS_DMA_NOWAIT); 1145 if (error != 0) { 1146 /* very unlikely that it will fail... */ 1147 panic("%s: could not load old rx mbuf", 1148 sc->sc_dev.dv_xname); 1149 } 1150 /* physical address may have changed */ 1151 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1152 ifp->if_ierrors++; 1153 goto skip; 1154 } 1155 1156 /* 1157 * New mbuf successfully loaded, update Rx ring and continue 1158 * processing. 1159 */ 1160 m = data->m; 1161 data->m = mnew; 1162 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1163 1164 /* finalize mbuf */ 1165 m->m_pkthdr.len = m->m_len = 1166 (letoh32(desc->flags) >> 16) & 0xfff; 1167 1168 #if NBPFILTER > 0 1169 if (sc->sc_drvbpf != NULL) { 1170 struct mbuf mb; 1171 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1172 uint32_t tsf_lo, tsf_hi; 1173 1174 /* get timestamp (low and high 32 bits) */ 1175 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1176 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1177 1178 tap->wr_tsf = 1179 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1180 tap->wr_flags = 0; 1181 tap->wr_rate = rt2560_rxrate(desc); 1182 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1183 tap->wr_chan_flags = 1184 htole16(ic->ic_ibss_chan->ic_flags); 1185 tap->wr_antenna = sc->rx_ant; 1186 tap->wr_antsignal = desc->rssi; 1187 1188 mb.m_data = (caddr_t)tap; 1189 mb.m_len = sc->sc_txtap_len; 1190 mb.m_next = m; 1191 mb.m_nextpkt = NULL; 1192 mb.m_type = 0; 1193 mb.m_flags = 0; 1194 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1195 } 1196 #endif 1197 wh = mtod(m, struct ieee80211_frame *); 1198 ni = ieee80211_find_rxnode(ic, wh); 1199 1200 /* send the frame to the 802.11 layer */ 1201 rxi.rxi_flags = 0; 1202 rxi.rxi_rssi = desc->rssi; 1203 rxi.rxi_tstamp = 0; /* unused */ 1204 ieee80211_input(ifp, m, ni, &rxi); 1205 1206 /* node is no longer needed */ 1207 ieee80211_release_node(ic, ni); 1208 1209 skip: desc->flags = htole32(RT2560_RX_BUSY); 1210 1211 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1212 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1213 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1214 1215 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1216 1217 sc->rxq.cur_decrypt = 1218 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1219 } 1220 } 1221 1222 /* 1223 * Some frames were received. Pass them to the hardware cipher engine before 1224 * sending them to the 802.11 layer. 1225 */ 1226 void 1227 rt2560_rx_intr(struct rt2560_softc *sc) 1228 { 1229 for (;;) { 1230 struct rt2560_rx_desc *desc = &sc->rxq.desc[sc->rxq.cur]; 1231 struct rt2560_rx_data *data = &sc->rxq.data[sc->rxq.cur]; 1232 1233 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1234 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1235 BUS_DMASYNC_POSTREAD); 1236 1237 if (letoh32(desc->flags) & 1238 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1239 break; 1240 1241 data->drop = 0; 1242 1243 if (letoh32(desc->flags) & 1244 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1245 /* 1246 * This should not happen since we did not request 1247 * to receive those frames when we filled RXCSR0. 1248 */ 1249 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1250 letoh32(desc->flags))); 1251 data->drop = 1; 1252 } 1253 1254 if (((letoh32(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1255 DPRINTFN(5, ("bad length\n")); 1256 data->drop = 1; 1257 } 1258 1259 /* mark the frame for decryption */ 1260 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1261 1262 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1263 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1264 BUS_DMASYNC_PREWRITE); 1265 1266 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1267 1268 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1269 } 1270 1271 /* kick decrypt */ 1272 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1273 } 1274 1275 #ifndef IEEE80211_STA_ONLY 1276 /* 1277 * This function is called in HostAP or IBSS modes when it's time to send a 1278 * new beacon (every ni_intval milliseconds). 1279 */ 1280 void 1281 rt2560_beacon_expire(struct rt2560_softc *sc) 1282 { 1283 struct ieee80211com *ic = &sc->sc_ic; 1284 struct rt2560_tx_data *data; 1285 1286 if (ic->ic_opmode != IEEE80211_M_IBSS && 1287 ic->ic_opmode != IEEE80211_M_HOSTAP) 1288 return; 1289 1290 data = &sc->bcnq.data[sc->bcnq.next]; 1291 1292 if (sc->sc_flags & RT2560_UPDATE_SLOT) { 1293 sc->sc_flags &= ~RT2560_UPDATE_SLOT; 1294 sc->sc_flags |= RT2560_SET_SLOTTIME; 1295 } else if (sc->sc_flags & RT2560_SET_SLOTTIME) { 1296 sc->sc_flags &= ~RT2560_SET_SLOTTIME; 1297 rt2560_set_slottime(sc); 1298 } 1299 1300 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1301 /* update ERP Information Element */ 1302 *sc->erp = ic->ic_bss->ni_erp; 1303 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1304 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1305 } 1306 1307 #if defined(RT2560_DEBUG) && NBPFILTER > 0 1308 if (ic->ic_rawbpf != NULL) 1309 bpf_mtap(ic->ic_rawbpf, data->m, BPF_DIRECTION_OUT); 1310 #endif 1311 1312 DPRINTFN(15, ("beacon expired\n")); 1313 } 1314 #endif 1315 1316 void 1317 rt2560_wakeup_expire(struct rt2560_softc *sc) 1318 { 1319 DPRINTFN(15, ("wakeup expired\n")); 1320 } 1321 1322 int 1323 rt2560_intr(void *arg) 1324 { 1325 struct rt2560_softc *sc = arg; 1326 struct ifnet *ifp = &sc->sc_ic.ic_if; 1327 uint32_t r; 1328 1329 r = RAL_READ(sc, RT2560_CSR7); 1330 if (__predict_false(r == 0xffffffff)) 1331 return 0; /* device likely went away */ 1332 if (r == 0) 1333 return 0; /* not for us */ 1334 1335 /* disable interrupts */ 1336 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1337 1338 /* acknowledge interrupts */ 1339 RAL_WRITE(sc, RT2560_CSR7, r); 1340 1341 /* don't re-enable interrupts if we're shutting down */ 1342 if (!(ifp->if_flags & IFF_RUNNING)) 1343 return 0; 1344 1345 #ifndef IEEE80211_STA_ONLY 1346 if (r & RT2560_BEACON_EXPIRE) 1347 rt2560_beacon_expire(sc); 1348 #endif 1349 1350 if (r & RT2560_WAKEUP_EXPIRE) 1351 rt2560_wakeup_expire(sc); 1352 1353 if (r & RT2560_ENCRYPTION_DONE) 1354 rt2560_encryption_intr(sc); 1355 1356 if (r & RT2560_TX_DONE) 1357 rt2560_tx_intr(sc); 1358 1359 if (r & RT2560_PRIO_DONE) 1360 rt2560_prio_intr(sc); 1361 1362 if (r & RT2560_DECRYPTION_DONE) 1363 rt2560_decryption_intr(sc); 1364 1365 if (r & RT2560_RX_DONE) 1366 rt2560_rx_intr(sc); 1367 1368 /* re-enable interrupts */ 1369 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1370 1371 return 1; 1372 } 1373 1374 /* quickly determine if a given rate is CCK or OFDM */ 1375 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1376 1377 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1378 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1379 1380 #define RAL_SIFS 10 /* us */ 1381 1382 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1383 1384 /* 1385 * This function is only used by the Rx radiotap code. It returns the rate at 1386 * which a given frame was received. 1387 */ 1388 #if NBPFILTER > 0 1389 uint8_t 1390 rt2560_rxrate(const struct rt2560_rx_desc *desc) 1391 { 1392 if (letoh32(desc->flags) & RT2560_RX_OFDM) { 1393 /* reverse function of rt2560_plcp_signal */ 1394 switch (desc->rate) { 1395 case 0xb: return 12; 1396 case 0xf: return 18; 1397 case 0xa: return 24; 1398 case 0xe: return 36; 1399 case 0x9: return 48; 1400 case 0xd: return 72; 1401 case 0x8: return 96; 1402 case 0xc: return 108; 1403 } 1404 } else { 1405 if (desc->rate == 10) 1406 return 2; 1407 if (desc->rate == 20) 1408 return 4; 1409 if (desc->rate == 55) 1410 return 11; 1411 if (desc->rate == 110) 1412 return 22; 1413 } 1414 return 2; /* should not get there */ 1415 } 1416 #endif 1417 1418 /* 1419 * Return the expected ack rate for a frame transmitted at rate `rate'. 1420 */ 1421 int 1422 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1423 { 1424 switch (rate) { 1425 /* CCK rates */ 1426 case 2: 1427 return 2; 1428 case 4: 1429 case 11: 1430 case 22: 1431 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1432 1433 /* OFDM rates */ 1434 case 12: 1435 case 18: 1436 return 12; 1437 case 24: 1438 case 36: 1439 return 24; 1440 case 48: 1441 case 72: 1442 case 96: 1443 case 108: 1444 return 48; 1445 } 1446 1447 /* default to 1Mbps */ 1448 return 2; 1449 } 1450 1451 /* 1452 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1453 * The function automatically determines the operating mode depending on the 1454 * given rate. `flags' indicates whether short preamble is in use or not. 1455 */ 1456 uint16_t 1457 rt2560_txtime(int len, int rate, uint32_t flags) 1458 { 1459 uint16_t txtime; 1460 1461 if (RAL_RATE_IS_OFDM(rate)) { 1462 /* IEEE Std 802.11g-2003, pp. 44 */ 1463 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1464 txtime = 16 + 4 + 4 * txtime + 6; 1465 } else { 1466 /* IEEE Std 802.11b-1999, pp. 28 */ 1467 txtime = (16 * len + rate - 1) / rate; 1468 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1469 txtime += 72 + 24; 1470 else 1471 txtime += 144 + 48; 1472 } 1473 return txtime; 1474 } 1475 1476 uint8_t 1477 rt2560_plcp_signal(int rate) 1478 { 1479 switch (rate) { 1480 /* CCK rates (returned values are device-dependent) */ 1481 case 2: return 0x0; 1482 case 4: return 0x1; 1483 case 11: return 0x2; 1484 case 22: return 0x3; 1485 1486 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1487 case 12: return 0xb; 1488 case 18: return 0xf; 1489 case 24: return 0xa; 1490 case 36: return 0xe; 1491 case 48: return 0x9; 1492 case 72: return 0xd; 1493 case 96: return 0x8; 1494 case 108: return 0xc; 1495 1496 /* unsupported rates (should not get there) */ 1497 default: return 0xff; 1498 } 1499 } 1500 1501 void 1502 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1503 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1504 { 1505 struct ieee80211com *ic = &sc->sc_ic; 1506 uint16_t plcp_length; 1507 int remainder; 1508 1509 desc->flags = htole32(flags); 1510 desc->flags |= htole32(len << 16); 1511 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1512 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1513 1514 desc->physaddr = htole32(physaddr); 1515 desc->wme = htole16( 1516 RT2560_AIFSN(2) | 1517 RT2560_LOGCWMIN(3) | 1518 RT2560_LOGCWMAX(8)); 1519 1520 /* setup PLCP fields */ 1521 desc->plcp_signal = rt2560_plcp_signal(rate); 1522 desc->plcp_service = 4; 1523 1524 len += IEEE80211_CRC_LEN; 1525 if (RAL_RATE_IS_OFDM(rate)) { 1526 desc->flags |= htole32(RT2560_TX_OFDM); 1527 1528 plcp_length = len & 0xfff; 1529 desc->plcp_length_hi = plcp_length >> 6; 1530 desc->plcp_length_lo = plcp_length & 0x3f; 1531 } else { 1532 plcp_length = (16 * len + rate - 1) / rate; 1533 if (rate == 22) { 1534 remainder = (16 * len) % 22; 1535 if (remainder != 0 && remainder < 7) 1536 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1537 } 1538 desc->plcp_length_hi = plcp_length >> 8; 1539 desc->plcp_length_lo = plcp_length & 0xff; 1540 1541 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1542 desc->plcp_signal |= 0x08; 1543 } 1544 } 1545 1546 #ifndef IEEE80211_STA_ONLY 1547 int 1548 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1549 struct ieee80211_node *ni) 1550 { 1551 struct ieee80211com *ic = &sc->sc_ic; 1552 struct rt2560_tx_desc *desc; 1553 struct rt2560_tx_data *data; 1554 int rate = 2, error; 1555 1556 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1557 data = &sc->bcnq.data[sc->bcnq.cur]; 1558 1559 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1560 BUS_DMA_NOWAIT); 1561 if (error != 0) { 1562 printf("%s: can't map mbuf (error %d)\n", 1563 sc->sc_dev.dv_xname, error); 1564 m_freem(m0); 1565 return error; 1566 } 1567 1568 data->m = m0; 1569 data->ni = ni; 1570 1571 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1572 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1573 data->map->dm_segs->ds_addr); 1574 1575 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1576 BUS_DMASYNC_PREWRITE); 1577 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1578 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1579 BUS_DMASYNC_PREWRITE); 1580 1581 /* 1582 * Store pointer to ERP Information Element so that we can update it 1583 * dynamically when the slot time changes. 1584 * XXX: this is ugly since it depends on how net80211 builds beacon 1585 * frames but ieee80211_beacon_alloc() don't store offsets for us. 1586 */ 1587 if (ic->ic_curmode == IEEE80211_MODE_11G) { 1588 sc->erp = 1589 mtod(m0, uint8_t *) + 1590 sizeof (struct ieee80211_frame) + 1591 8 + 2 + 2 + 1592 ((ic->ic_flags & IEEE80211_F_HIDENWID) ? 1593 1 : 2 + ni->ni_esslen) + 1594 2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) + 1595 2 + 1 + 1596 ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) + 1597 2; 1598 } 1599 1600 return 0; 1601 } 1602 #endif 1603 1604 int 1605 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1606 struct ieee80211_node *ni) 1607 { 1608 struct ieee80211com *ic = &sc->sc_ic; 1609 struct rt2560_tx_desc *desc; 1610 struct rt2560_tx_data *data; 1611 struct ieee80211_frame *wh; 1612 uint16_t dur; 1613 uint32_t flags = 0; 1614 int rate = 2, error; 1615 1616 desc = &sc->prioq.desc[sc->prioq.cur]; 1617 data = &sc->prioq.data[sc->prioq.cur]; 1618 1619 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1620 BUS_DMA_NOWAIT); 1621 if (error != 0) { 1622 printf("%s: can't map mbuf (error %d)\n", 1623 sc->sc_dev.dv_xname, error); 1624 m_freem(m0); 1625 return error; 1626 } 1627 1628 #if NBPFILTER > 0 1629 if (sc->sc_drvbpf != NULL) { 1630 struct mbuf mb; 1631 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1632 1633 tap->wt_flags = 0; 1634 tap->wt_rate = rate; 1635 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1636 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1637 tap->wt_antenna = sc->tx_ant; 1638 1639 mb.m_data = (caddr_t)tap; 1640 mb.m_len = sc->sc_txtap_len; 1641 mb.m_next = m0; 1642 mb.m_nextpkt = NULL; 1643 mb.m_type = 0; 1644 mb.m_flags = 0; 1645 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1646 } 1647 #endif 1648 1649 data->m = m0; 1650 data->ni = ni; 1651 1652 wh = mtod(m0, struct ieee80211_frame *); 1653 1654 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1655 flags |= RT2560_TX_NEED_ACK; 1656 1657 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1658 RAL_SIFS; 1659 *(uint16_t *)wh->i_dur = htole16(dur); 1660 1661 #ifndef IEEE80211_STA_ONLY 1662 /* tell hardware to set timestamp for probe responses */ 1663 if ((wh->i_fc[0] & 1664 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1665 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1666 flags |= RT2560_TX_TIMESTAMP; 1667 #endif 1668 } 1669 1670 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1671 data->map->dm_segs->ds_addr); 1672 1673 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1674 BUS_DMASYNC_PREWRITE); 1675 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1676 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1677 BUS_DMASYNC_PREWRITE); 1678 1679 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1680 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1681 1682 /* kick prio */ 1683 sc->prioq.queued++; 1684 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1685 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1686 1687 return 0; 1688 } 1689 1690 int 1691 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1692 struct ieee80211_node *ni) 1693 { 1694 struct ieee80211com *ic = &sc->sc_ic; 1695 struct rt2560_tx_ring *txq = &sc->txq; 1696 struct rt2560_tx_desc *desc; 1697 struct rt2560_tx_data *data; 1698 struct ieee80211_frame *wh; 1699 struct ieee80211_key *k; 1700 struct mbuf *m1; 1701 uint16_t dur; 1702 uint32_t flags = 0; 1703 int pktlen, rate, needcts = 0, needrts = 0, error; 1704 1705 wh = mtod(m0, struct ieee80211_frame *); 1706 1707 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1708 k = ieee80211_get_txkey(ic, wh, ni); 1709 1710 if ((m0 = ieee80211_encrypt(ic, m0, k)) == NULL) 1711 return ENOBUFS; 1712 1713 /* packet header may have moved, reset our local pointer */ 1714 wh = mtod(m0, struct ieee80211_frame *); 1715 } 1716 1717 /* compute actual packet length (including CRC and crypto overhead) */ 1718 pktlen = m0->m_pkthdr.len + IEEE80211_CRC_LEN; 1719 1720 /* pickup a rate */ 1721 if (IEEE80211_IS_MULTICAST(wh->i_addr1) || 1722 ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1723 IEEE80211_FC0_TYPE_MGT)) { 1724 /* mgmt/multicast frames are sent at the lowest avail. rate */ 1725 rate = ni->ni_rates.rs_rates[0]; 1726 } else if (ic->ic_fixed_rate != -1) { 1727 rate = ic->ic_sup_rates[ic->ic_curmode]. 1728 rs_rates[ic->ic_fixed_rate]; 1729 } else 1730 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1731 if (rate == 0) 1732 rate = 2; /* XXX should not happen */ 1733 rate &= IEEE80211_RATE_VAL; 1734 1735 /* 1736 * Packet Bursting: backoff after ppb=8 frames to give other STAs a 1737 * chance to contend for the wireless medium. 1738 */ 1739 if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseq & 7)) 1740 flags |= RT2560_TX_IFS_SIFS; 1741 1742 /* check if RTS/CTS or CTS-to-self protection must be used */ 1743 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1744 /* multicast frames are not sent at OFDM rates in 802.11b/g */ 1745 if (pktlen > ic->ic_rtsthreshold) { 1746 needrts = 1; /* RTS/CTS based on frame length */ 1747 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1748 RAL_RATE_IS_OFDM(rate)) { 1749 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) 1750 needcts = 1; /* CTS-to-self */ 1751 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) 1752 needrts = 1; /* RTS/CTS */ 1753 } 1754 } 1755 if (needrts || needcts) { 1756 struct mbuf *mprot; 1757 int protrate, ackrate; 1758 1759 protrate = 2; /* XXX */ 1760 ackrate = rt2560_ack_rate(ic, rate); 1761 1762 dur = rt2560_txtime(pktlen, rate, ic->ic_flags) + 1763 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1764 2 * RAL_SIFS; 1765 if (needrts) { 1766 dur += rt2560_txtime(RAL_CTS_SIZE, rt2560_ack_rate(ic, 1767 protrate), ic->ic_flags) + RAL_SIFS; 1768 mprot = ieee80211_get_rts(ic, wh, dur); 1769 } else { 1770 mprot = ieee80211_get_cts_to_self(ic, dur); 1771 } 1772 if (mprot == NULL) { 1773 printf("%s: could not allocate protection frame\n", 1774 sc->sc_dev.dv_xname); 1775 m_freem(m0); 1776 return ENOBUFS; 1777 } 1778 1779 desc = &txq->desc[txq->cur_encrypt]; 1780 data = &txq->data[txq->cur_encrypt]; 1781 1782 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, mprot, 1783 BUS_DMA_NOWAIT); 1784 if (error != 0) { 1785 printf("%s: can't map mbuf (error %d)\n", 1786 sc->sc_dev.dv_xname, error); 1787 m_freem(mprot); 1788 m_freem(m0); 1789 return error; 1790 } 1791 1792 data->m = mprot; 1793 /* avoid multiple free() of the same node for each fragment */ 1794 data->ni = ieee80211_ref_node(ni); 1795 1796 /* XXX may want to pass the protection frame to BPF */ 1797 1798 rt2560_setup_tx_desc(sc, desc, 1799 (needrts ? RT2560_TX_NEED_ACK : 0) | RT2560_TX_MORE_FRAG, 1800 mprot->m_pkthdr.len, protrate, 1, 1801 data->map->dm_segs->ds_addr); 1802 1803 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1804 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1805 bus_dmamap_sync(sc->sc_dmat, txq->map, 1806 txq->cur_encrypt * RT2560_TX_DESC_SIZE, 1807 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1808 1809 txq->queued++; 1810 if (++txq->cur_encrypt >= txq->count) 1811 txq->cur_encrypt = 0; 1812 1813 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1814 } 1815 1816 data = &txq->data[txq->cur_encrypt]; 1817 desc = &txq->desc[txq->cur_encrypt]; 1818 1819 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1820 BUS_DMA_NOWAIT); 1821 if (error != 0 && error != EFBIG) { 1822 printf("%s: can't map mbuf (error %d)\n", 1823 sc->sc_dev.dv_xname, error); 1824 m_freem(m0); 1825 return error; 1826 } 1827 if (error != 0) { 1828 /* too many fragments, linearize */ 1829 MGETHDR(m1, M_DONTWAIT, MT_DATA); 1830 if (m1 == NULL) { 1831 m_freem(m0); 1832 return ENOBUFS; 1833 } 1834 if (m0->m_pkthdr.len > MHLEN) { 1835 MCLGET(m1, M_DONTWAIT); 1836 if (!(m1->m_flags & M_EXT)) { 1837 m_freem(m0); 1838 m_freem(m1); 1839 return ENOBUFS; 1840 } 1841 } 1842 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m1, caddr_t)); 1843 m1->m_pkthdr.len = m1->m_len = m0->m_pkthdr.len; 1844 m_freem(m0); 1845 m0 = m1; 1846 1847 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1848 BUS_DMA_NOWAIT); 1849 if (error != 0) { 1850 printf("%s: can't map mbuf (error %d)\n", 1851 sc->sc_dev.dv_xname, error); 1852 m_freem(m0); 1853 return error; 1854 } 1855 1856 /* packet header have moved, reset our local pointer */ 1857 wh = mtod(m0, struct ieee80211_frame *); 1858 } 1859 1860 #if NBPFILTER > 0 1861 if (sc->sc_drvbpf != NULL) { 1862 struct mbuf mb; 1863 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1864 1865 tap->wt_flags = 0; 1866 tap->wt_rate = rate; 1867 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1868 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1869 tap->wt_antenna = sc->tx_ant; 1870 1871 mb.m_data = (caddr_t)tap; 1872 mb.m_len = sc->sc_txtap_len; 1873 mb.m_next = m0; 1874 mb.m_nextpkt = NULL; 1875 mb.m_type = 0; 1876 mb.m_flags = 0; 1877 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1878 } 1879 #endif 1880 1881 data->m = m0; 1882 data->ni = ni; 1883 1884 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1885 flags |= RT2560_TX_NEED_ACK; 1886 1887 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 1888 ic->ic_flags) + RAL_SIFS; 1889 *(uint16_t *)wh->i_dur = htole16(dur); 1890 } 1891 1892 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 1893 data->map->dm_segs->ds_addr); 1894 1895 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1896 BUS_DMASYNC_PREWRITE); 1897 bus_dmamap_sync(sc->sc_dmat, txq->map, 1898 txq->cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1899 BUS_DMASYNC_PREWRITE); 1900 1901 DPRINTFN(10, ("sending frame len=%u idx=%u rate=%u\n", 1902 m0->m_pkthdr.len, txq->cur_encrypt, rate)); 1903 1904 /* kick encrypt */ 1905 txq->queued++; 1906 if (++txq->cur_encrypt >= txq->count) 1907 txq->cur_encrypt = 0; 1908 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 1909 1910 return 0; 1911 } 1912 1913 void 1914 rt2560_start(struct ifnet *ifp) 1915 { 1916 struct rt2560_softc *sc = ifp->if_softc; 1917 struct ieee80211com *ic = &sc->sc_ic; 1918 struct mbuf *m0; 1919 struct ieee80211_node *ni; 1920 1921 /* 1922 * net80211 may still try to send management frames even if the 1923 * IFF_RUNNING flag is not set... 1924 */ 1925 if (!(ifp->if_flags & IFF_RUNNING) || ifq_is_oactive(&ifp->if_snd)) 1926 return; 1927 1928 for (;;) { 1929 if (mq_len(&ic->ic_mgtq) > 0) { 1930 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 1931 ifq_set_oactive(&ifp->if_snd); 1932 sc->sc_flags |= RT2560_PRIO_OACTIVE; 1933 break; 1934 } 1935 1936 m0 = mq_dequeue(&ic->ic_mgtq); 1937 if (m0 == NULL) 1938 continue; 1939 ni = m0->m_pkthdr.ph_cookie; 1940 #if NBPFILTER > 0 1941 if (ic->ic_rawbpf != NULL) 1942 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1943 #endif 1944 if (rt2560_tx_mgt(sc, m0, ni) != 0) 1945 break; 1946 1947 } else { 1948 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 1949 ifq_set_oactive(&ifp->if_snd); 1950 sc->sc_flags |= RT2560_DATA_OACTIVE; 1951 break; 1952 } 1953 1954 if (ic->ic_state != IEEE80211_S_RUN) 1955 break; 1956 1957 IFQ_DEQUEUE(&ifp->if_snd, m0); 1958 if (m0 == NULL) 1959 break; 1960 #if NBPFILTER > 0 1961 if (ifp->if_bpf != NULL) 1962 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1963 #endif 1964 m0 = ieee80211_encap(ifp, m0, &ni); 1965 if (m0 == NULL) 1966 continue; 1967 #if NBPFILTER > 0 1968 if (ic->ic_rawbpf != NULL) 1969 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1970 #endif 1971 if (rt2560_tx_data(sc, m0, ni) != 0) { 1972 if (ni != NULL) 1973 ieee80211_release_node(ic, ni); 1974 ifp->if_oerrors++; 1975 break; 1976 } 1977 } 1978 1979 sc->sc_tx_timer = 5; 1980 ifp->if_timer = 1; 1981 } 1982 } 1983 1984 void 1985 rt2560_watchdog(struct ifnet *ifp) 1986 { 1987 struct rt2560_softc *sc = ifp->if_softc; 1988 1989 ifp->if_timer = 0; 1990 1991 if (sc->sc_tx_timer > 0) { 1992 if (--sc->sc_tx_timer == 0) { 1993 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1994 rt2560_init(ifp); 1995 ifp->if_oerrors++; 1996 return; 1997 } 1998 ifp->if_timer = 1; 1999 } 2000 2001 ieee80211_watchdog(ifp); 2002 } 2003 2004 int 2005 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2006 { 2007 struct rt2560_softc *sc = ifp->if_softc; 2008 struct ieee80211com *ic = &sc->sc_ic; 2009 struct ifreq *ifr; 2010 int s, error = 0; 2011 2012 s = splnet(); 2013 2014 switch (cmd) { 2015 case SIOCSIFADDR: 2016 ifp->if_flags |= IFF_UP; 2017 /* FALLTHROUGH */ 2018 case SIOCSIFFLAGS: 2019 if (ifp->if_flags & IFF_UP) { 2020 if (ifp->if_flags & IFF_RUNNING) 2021 rt2560_update_promisc(sc); 2022 else 2023 rt2560_init(ifp); 2024 } else { 2025 if (ifp->if_flags & IFF_RUNNING) 2026 rt2560_stop(ifp, 1); 2027 } 2028 break; 2029 2030 case SIOCADDMULTI: 2031 case SIOCDELMULTI: 2032 ifr = (struct ifreq *)data; 2033 error = (cmd == SIOCADDMULTI) ? 2034 ether_addmulti(ifr, &ic->ic_ac) : 2035 ether_delmulti(ifr, &ic->ic_ac); 2036 2037 if (error == ENETRESET) 2038 error = 0; 2039 break; 2040 2041 case SIOCS80211CHANNEL: 2042 /* 2043 * This allows for fast channel switching in monitor mode 2044 * (used by kismet). In IBSS mode, we must explicitly reset 2045 * the interface to generate a new beacon frame. 2046 */ 2047 error = ieee80211_ioctl(ifp, cmd, data); 2048 if (error == ENETRESET && 2049 ic->ic_opmode == IEEE80211_M_MONITOR) { 2050 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2051 (IFF_UP | IFF_RUNNING)) 2052 rt2560_set_chan(sc, ic->ic_ibss_chan); 2053 error = 0; 2054 } 2055 break; 2056 2057 default: 2058 error = ieee80211_ioctl(ifp, cmd, data); 2059 } 2060 2061 if (error == ENETRESET) { 2062 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2063 (IFF_UP | IFF_RUNNING)) 2064 rt2560_init(ifp); 2065 error = 0; 2066 } 2067 2068 splx(s); 2069 2070 return error; 2071 } 2072 2073 void 2074 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2075 { 2076 uint32_t tmp; 2077 int ntries; 2078 2079 for (ntries = 0; ntries < 100; ntries++) { 2080 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2081 break; 2082 DELAY(1); 2083 } 2084 if (ntries == 100) { 2085 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2086 return; 2087 } 2088 2089 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2090 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2091 2092 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2093 } 2094 2095 uint8_t 2096 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2097 { 2098 uint32_t val; 2099 int ntries; 2100 2101 for (ntries = 0; ntries < 100; ntries++) { 2102 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2103 break; 2104 DELAY(1); 2105 } 2106 if (ntries == 100) { 2107 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2108 return 0; 2109 } 2110 2111 val = RT2560_BBP_BUSY | reg << 8; 2112 RAL_WRITE(sc, RT2560_BBPCSR, val); 2113 2114 for (ntries = 0; ntries < 100; ntries++) { 2115 val = RAL_READ(sc, RT2560_BBPCSR); 2116 if (!(val & RT2560_BBP_BUSY)) 2117 return val & 0xff; 2118 DELAY(1); 2119 } 2120 2121 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2122 return 0; 2123 } 2124 2125 void 2126 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2127 { 2128 uint32_t tmp; 2129 int ntries; 2130 2131 for (ntries = 0; ntries < 100; ntries++) { 2132 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2133 break; 2134 DELAY(1); 2135 } 2136 if (ntries == 100) { 2137 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2138 return; 2139 } 2140 2141 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2142 (reg & 0x3); 2143 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2144 2145 /* remember last written value in sc */ 2146 sc->rf_regs[reg] = val; 2147 2148 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2149 } 2150 2151 void 2152 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2153 { 2154 struct ieee80211com *ic = &sc->sc_ic; 2155 uint8_t power, tmp; 2156 u_int chan; 2157 2158 chan = ieee80211_chan2ieee(ic, c); 2159 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2160 return; 2161 2162 power = min(sc->txpow[chan - 1], 31); 2163 2164 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2165 2166 switch (sc->rf_rev) { 2167 case RT2560_RF_2522: 2168 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2169 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2170 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2171 break; 2172 2173 case RT2560_RF_2523: 2174 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2175 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2176 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2177 rt2560_rf_write(sc, RT2560_RF4, 2178 (chan == 14) ? 0x00280 : 0x00286); 2179 break; 2180 2181 case RT2560_RF_2524: 2182 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2183 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2184 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2185 rt2560_rf_write(sc, RT2560_RF4, 2186 (chan == 14) ? 0x00280 : 0x00286); 2187 break; 2188 2189 case RT2560_RF_2525: 2190 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2191 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2192 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2193 rt2560_rf_write(sc, RT2560_RF4, 2194 (chan == 14) ? 0x00280 : 0x00286); 2195 2196 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2197 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2198 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2199 rt2560_rf_write(sc, RT2560_RF4, 2200 (chan == 14) ? 0x00280 : 0x00286); 2201 break; 2202 2203 case RT2560_RF_2525E: 2204 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2205 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2206 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2207 rt2560_rf_write(sc, RT2560_RF4, 2208 (chan == 14) ? 0x00286 : 0x00282); 2209 break; 2210 2211 case RT2560_RF_2526: 2212 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2213 rt2560_rf_write(sc, RT2560_RF4, 2214 (chan & 1) ? 0x00386 : 0x00381); 2215 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2216 2217 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2218 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2219 rt2560_rf_write(sc, RT2560_RF4, 2220 (chan & 1) ? 0x00386 : 0x00381); 2221 break; 2222 } 2223 2224 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2225 ic->ic_state != IEEE80211_S_SCAN) { 2226 /* set Japan filter bit for channel 14 */ 2227 tmp = rt2560_bbp_read(sc, 70); 2228 2229 tmp &= ~RT2560_JAPAN_FILTER; 2230 if (chan == 14) 2231 tmp |= RT2560_JAPAN_FILTER; 2232 2233 rt2560_bbp_write(sc, 70, tmp); 2234 2235 DELAY(1000); /* RF needs a 1ms delay here */ 2236 rt2560_disable_rf_tune(sc); 2237 2238 /* clear CRC errors */ 2239 RAL_READ(sc, RT2560_CNT0); 2240 } 2241 } 2242 2243 /* 2244 * Disable RF auto-tuning. 2245 */ 2246 void 2247 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2248 { 2249 uint32_t tmp; 2250 2251 if (sc->rf_rev != RT2560_RF_2523) { 2252 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2253 rt2560_rf_write(sc, RT2560_RF1, tmp); 2254 } 2255 2256 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2257 rt2560_rf_write(sc, RT2560_RF3, tmp); 2258 2259 DPRINTFN(2, ("disabling RF autotune\n")); 2260 } 2261 2262 /* 2263 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2264 * synchronization. 2265 */ 2266 void 2267 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2268 { 2269 struct ieee80211com *ic = &sc->sc_ic; 2270 uint16_t logcwmin, preload; 2271 uint32_t tmp; 2272 2273 /* first, disable TSF synchronization */ 2274 RAL_WRITE(sc, RT2560_CSR14, 0); 2275 2276 tmp = 16 * ic->ic_bss->ni_intval; 2277 RAL_WRITE(sc, RT2560_CSR12, tmp); 2278 2279 RAL_WRITE(sc, RT2560_CSR13, 0); 2280 2281 logcwmin = 5; 2282 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2283 tmp = logcwmin << 16 | preload; 2284 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2285 2286 /* finally, enable TSF synchronization */ 2287 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2288 if (ic->ic_opmode == IEEE80211_M_STA) 2289 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2290 #ifndef IEEE80211_STA_ONLY 2291 else 2292 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2293 RT2560_ENABLE_BEACON_GENERATOR; 2294 #endif 2295 RAL_WRITE(sc, RT2560_CSR14, tmp); 2296 2297 DPRINTF(("enabling TSF synchronization\n")); 2298 } 2299 2300 void 2301 rt2560_update_plcp(struct rt2560_softc *sc) 2302 { 2303 struct ieee80211com *ic = &sc->sc_ic; 2304 2305 /* no short preamble for 1Mbps */ 2306 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2307 2308 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2309 /* values taken from the reference driver */ 2310 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2311 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2312 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2313 } else { 2314 /* same values as above or'ed 0x8 */ 2315 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2316 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2317 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2318 } 2319 2320 DPRINTF(("updating PLCP for %s preamble\n", 2321 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2322 } 2323 2324 void 2325 rt2560_updateslot(struct ieee80211com *ic) 2326 { 2327 struct rt2560_softc *sc = ic->ic_if.if_softc; 2328 2329 #ifndef IEEE80211_STA_ONLY 2330 if (ic->ic_opmode == IEEE80211_M_HOSTAP) { 2331 /* 2332 * In HostAP mode, we defer setting of new slot time until 2333 * updated ERP Information Element has propagated to all 2334 * associated STAs. 2335 */ 2336 sc->sc_flags |= RT2560_UPDATE_SLOT; 2337 } else 2338 #endif 2339 rt2560_set_slottime(sc); 2340 } 2341 2342 /* 2343 * IEEE 802.11a (and possibly 802.11g) use short slot time. Refer to 2344 * IEEE Std 802.11-1999 pp. 85 to know how these values are computed. 2345 */ 2346 void 2347 rt2560_set_slottime(struct rt2560_softc *sc) 2348 { 2349 struct ieee80211com *ic = &sc->sc_ic; 2350 uint8_t slottime; 2351 uint16_t sifs, pifs, difs, eifs; 2352 uint32_t tmp; 2353 2354 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2355 2356 /* define the MAC slot boundaries */ 2357 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2358 pifs = sifs + slottime; 2359 difs = sifs + 2 * slottime; 2360 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2361 2362 tmp = RAL_READ(sc, RT2560_CSR11); 2363 tmp = (tmp & ~0x1f00) | slottime << 8; 2364 RAL_WRITE(sc, RT2560_CSR11, tmp); 2365 2366 tmp = pifs << 16 | sifs; 2367 RAL_WRITE(sc, RT2560_CSR18, tmp); 2368 2369 tmp = eifs << 16 | difs; 2370 RAL_WRITE(sc, RT2560_CSR19, tmp); 2371 2372 DPRINTF(("setting slottime to %uus\n", slottime)); 2373 } 2374 2375 void 2376 rt2560_set_basicrates(struct rt2560_softc *sc) 2377 { 2378 struct ieee80211com *ic = &sc->sc_ic; 2379 2380 /* update basic rate set */ 2381 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2382 /* 11b basic rates: 1, 2Mbps */ 2383 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2384 } else { 2385 /* 11b/g basic rates: 1, 2, 5.5, 11Mbps */ 2386 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0xf); 2387 } 2388 } 2389 2390 void 2391 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2392 { 2393 uint32_t tmp; 2394 2395 /* set ON period to 70ms and OFF period to 30ms */ 2396 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2397 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2398 } 2399 2400 void 2401 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2402 { 2403 uint32_t tmp; 2404 2405 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2406 RAL_WRITE(sc, RT2560_CSR5, tmp); 2407 2408 tmp = bssid[4] | bssid[5] << 8; 2409 RAL_WRITE(sc, RT2560_CSR6, tmp); 2410 2411 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2412 } 2413 2414 void 2415 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2416 { 2417 uint32_t tmp; 2418 2419 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2420 RAL_WRITE(sc, RT2560_CSR3, tmp); 2421 2422 tmp = addr[4] | addr[5] << 8; 2423 RAL_WRITE(sc, RT2560_CSR4, tmp); 2424 2425 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2426 } 2427 2428 void 2429 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2430 { 2431 uint32_t tmp; 2432 2433 tmp = RAL_READ(sc, RT2560_CSR3); 2434 addr[0] = tmp & 0xff; 2435 addr[1] = (tmp >> 8) & 0xff; 2436 addr[2] = (tmp >> 16) & 0xff; 2437 addr[3] = (tmp >> 24); 2438 2439 tmp = RAL_READ(sc, RT2560_CSR4); 2440 addr[4] = tmp & 0xff; 2441 addr[5] = (tmp >> 8) & 0xff; 2442 } 2443 2444 void 2445 rt2560_update_promisc(struct rt2560_softc *sc) 2446 { 2447 struct ifnet *ifp = &sc->sc_ic.ic_if; 2448 uint32_t tmp; 2449 2450 tmp = RAL_READ(sc, RT2560_RXCSR0); 2451 2452 tmp &= ~RT2560_DROP_NOT_TO_ME; 2453 if (!(ifp->if_flags & IFF_PROMISC)) 2454 tmp |= RT2560_DROP_NOT_TO_ME; 2455 2456 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2457 2458 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2459 "entering" : "leaving")); 2460 } 2461 2462 void 2463 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2464 { 2465 uint32_t tmp; 2466 uint8_t tx; 2467 2468 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2469 if (antenna == 1) 2470 tx |= RT2560_BBP_ANTA; 2471 else if (antenna == 2) 2472 tx |= RT2560_BBP_ANTB; 2473 else 2474 tx |= RT2560_BBP_DIVERSITY; 2475 2476 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2477 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2478 sc->rf_rev == RT2560_RF_5222) 2479 tx |= RT2560_BBP_FLIPIQ; 2480 2481 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2482 2483 /* update values for CCK and OFDM in BBPCSR1 */ 2484 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2485 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2486 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2487 } 2488 2489 void 2490 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2491 { 2492 uint8_t rx; 2493 2494 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2495 if (antenna == 1) 2496 rx |= RT2560_BBP_ANTA; 2497 else if (antenna == 2) 2498 rx |= RT2560_BBP_ANTB; 2499 else 2500 rx |= RT2560_BBP_DIVERSITY; 2501 2502 /* need to force no I/Q flip for RF 2525e and 2526 */ 2503 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2504 rx &= ~RT2560_BBP_FLIPIQ; 2505 2506 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2507 } 2508 2509 const char * 2510 rt2560_get_rf(int rev) 2511 { 2512 switch (rev) { 2513 case RT2560_RF_2522: return "RT2522"; 2514 case RT2560_RF_2523: return "RT2523"; 2515 case RT2560_RF_2524: return "RT2524"; 2516 case RT2560_RF_2525: return "RT2525"; 2517 case RT2560_RF_2525E: return "RT2525e"; 2518 case RT2560_RF_2526: return "RT2526"; 2519 case RT2560_RF_5222: return "RT5222"; 2520 default: return "unknown"; 2521 } 2522 } 2523 2524 void 2525 rt2560_read_eeprom(struct rt2560_softc *sc) 2526 { 2527 uint16_t val; 2528 int i; 2529 2530 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2531 sc->rf_rev = (val >> 11) & 0x1f; 2532 sc->hw_radio = (val >> 10) & 0x1; 2533 sc->led_mode = (val >> 6) & 0x7; 2534 sc->rx_ant = (val >> 4) & 0x3; 2535 sc->tx_ant = (val >> 2) & 0x3; 2536 sc->nb_ant = val & 0x3; 2537 2538 /* read default values for BBP registers */ 2539 for (i = 0; i < 16; i++) { 2540 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2541 sc->bbp_prom[i].reg = val >> 8; 2542 sc->bbp_prom[i].val = val & 0xff; 2543 } 2544 2545 /* read Tx power for all b/g channels */ 2546 for (i = 0; i < 14 / 2; i++) { 2547 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2548 sc->txpow[i * 2] = val >> 8; 2549 sc->txpow[i * 2 + 1] = val & 0xff; 2550 } 2551 } 2552 2553 int 2554 rt2560_bbp_init(struct rt2560_softc *sc) 2555 { 2556 int i, ntries; 2557 2558 /* wait for BBP to be ready */ 2559 for (ntries = 0; ntries < 100; ntries++) { 2560 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2561 break; 2562 DELAY(1); 2563 } 2564 if (ntries == 100) { 2565 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2566 return EIO; 2567 } 2568 2569 /* initialize BBP registers to default values */ 2570 for (i = 0; i < nitems(rt2560_def_bbp); i++) { 2571 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2572 rt2560_def_bbp[i].val); 2573 } 2574 #if 0 2575 /* initialize BBP registers to values stored in EEPROM */ 2576 for (i = 0; i < 16; i++) { 2577 if (sc->bbp_prom[i].reg == 0xff) 2578 continue; 2579 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2580 } 2581 #endif 2582 2583 return 0; 2584 } 2585 2586 int 2587 rt2560_init(struct ifnet *ifp) 2588 { 2589 struct rt2560_softc *sc = ifp->if_softc; 2590 struct ieee80211com *ic = &sc->sc_ic; 2591 uint32_t tmp; 2592 int i; 2593 2594 /* for CardBus, power on the socket */ 2595 if (!(sc->sc_flags & RT2560_ENABLED)) { 2596 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2597 printf("%s: could not enable device\n", 2598 sc->sc_dev.dv_xname); 2599 return EIO; 2600 } 2601 sc->sc_flags |= RT2560_ENABLED; 2602 } 2603 2604 rt2560_stop(ifp, 0); 2605 2606 /* setup tx rings */ 2607 tmp = RT2560_PRIO_RING_COUNT << 24 | 2608 RT2560_ATIM_RING_COUNT << 16 | 2609 RT2560_TX_RING_COUNT << 8 | 2610 RT2560_TX_DESC_SIZE; 2611 2612 /* rings _must_ be initialized in this _exact_ order! */ 2613 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2614 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2615 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2616 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2617 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2618 2619 /* setup rx ring */ 2620 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2621 2622 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2623 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2624 2625 /* initialize MAC registers to default values */ 2626 for (i = 0; i < nitems(rt2560_def_mac); i++) 2627 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2628 2629 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2630 rt2560_set_macaddr(sc, ic->ic_myaddr); 2631 2632 /* set basic rate set (will be updated later) */ 2633 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2634 2635 rt2560_set_slottime(sc); 2636 rt2560_update_plcp(sc); 2637 rt2560_update_led(sc, 0, 0); 2638 2639 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2640 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2641 2642 if (rt2560_bbp_init(sc) != 0) { 2643 rt2560_stop(ifp, 1); 2644 return EIO; 2645 } 2646 2647 rt2560_set_txantenna(sc, 1); 2648 rt2560_set_rxantenna(sc, 1); 2649 2650 /* set default BSS channel */ 2651 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2652 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2653 2654 /* kick Rx */ 2655 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2656 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2657 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2658 #ifndef IEEE80211_STA_ONLY 2659 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2660 #endif 2661 tmp |= RT2560_DROP_TODS; 2662 if (!(ifp->if_flags & IFF_PROMISC)) 2663 tmp |= RT2560_DROP_NOT_TO_ME; 2664 } 2665 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2666 2667 /* clear old FCS and Rx FIFO errors */ 2668 RAL_READ(sc, RT2560_CNT0); 2669 RAL_READ(sc, RT2560_CNT4); 2670 2671 /* clear any pending interrupts */ 2672 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2673 2674 /* enable interrupts */ 2675 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2676 2677 ifp->if_flags |= IFF_RUNNING; 2678 ifq_clr_oactive(&ifp->if_snd); 2679 2680 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2681 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2682 else 2683 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2684 2685 return 0; 2686 } 2687 2688 void 2689 rt2560_stop(struct ifnet *ifp, int disable) 2690 { 2691 struct rt2560_softc *sc = ifp->if_softc; 2692 struct ieee80211com *ic = &sc->sc_ic; 2693 2694 sc->sc_tx_timer = 0; 2695 sc->sc_flags &= ~(RT2560_PRIO_OACTIVE|RT2560_DATA_OACTIVE); 2696 ifp->if_timer = 0; 2697 ifp->if_flags &= ~IFF_RUNNING; 2698 ifq_clr_oactive(&ifp->if_snd); 2699 2700 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2701 2702 /* abort Tx */ 2703 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2704 2705 /* disable Rx */ 2706 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2707 2708 /* reset ASIC (and thus, BBP) */ 2709 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2710 RAL_WRITE(sc, RT2560_CSR1, 0); 2711 2712 /* disable interrupts */ 2713 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2714 2715 /* clear any pending interrupt */ 2716 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2717 2718 /* reset Tx and Rx rings */ 2719 rt2560_reset_tx_ring(sc, &sc->txq); 2720 rt2560_reset_tx_ring(sc, &sc->atimq); 2721 rt2560_reset_tx_ring(sc, &sc->prioq); 2722 rt2560_reset_tx_ring(sc, &sc->bcnq); 2723 rt2560_reset_rx_ring(sc, &sc->rxq); 2724 2725 /* for CardBus, power down the socket */ 2726 if (disable && sc->sc_disable != NULL) { 2727 if (sc->sc_flags & RT2560_ENABLED) { 2728 (*sc->sc_disable)(sc); 2729 sc->sc_flags &= ~RT2560_ENABLED; 2730 } 2731 } 2732 } 2733 2734 struct cfdriver ral_cd = { 2735 NULL, "ral", DV_IFNET 2736 }; 2737