1 /* $OpenBSD: cac_pci.c,v 1.18 2022/03/11 18:00:45 mpi Exp $ */ 2 /* $NetBSD: cac_pci.c,v 1.10 2001/01/10 16:48:04 ad Exp $ */ 3 4 /*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Andrew Doran. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI front-end for cac(4) driver. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 #include <sys/queue.h> 42 #include <sys/endian.h> 43 #include <sys/sensors.h> 44 45 #include <machine/bus.h> 46 47 #include <dev/pci/pcidevs.h> 48 #include <dev/pci/pcivar.h> 49 50 #include <scsi/scsi_all.h> 51 #include <scsi/scsi_disk.h> 52 #include <scsi/scsiconf.h> 53 54 #include <dev/ic/cacreg.h> 55 #include <dev/ic/cacvar.h> 56 57 void cac_pci_attach(struct device *, struct device *, void *); 58 const struct cac_pci_type *cac_pci_findtype(struct pci_attach_args *); 59 int cac_pci_match(struct device *, void *, void *); 60 int cac_activate(struct device *, int); 61 62 struct cac_ccb *cac_pci_l0_completed(struct cac_softc *); 63 int cac_pci_l0_fifo_full(struct cac_softc *); 64 void cac_pci_l0_intr_enable(struct cac_softc *, int); 65 int cac_pci_l0_intr_pending(struct cac_softc *); 66 void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *); 67 68 const struct cfattach cac_pci_ca = { 69 sizeof(struct cac_softc), cac_pci_match, cac_pci_attach 70 }; 71 72 static const struct cac_linkage cac_pci_l0 = { 73 cac_pci_l0_completed, 74 cac_pci_l0_fifo_full, 75 cac_pci_l0_intr_enable, 76 cac_pci_l0_intr_pending, 77 cac_pci_l0_submit 78 }; 79 80 #define CT_STARTFW 0x01 /* Need to start controller firmware */ 81 82 static const 83 struct cac_pci_type { 84 int ct_subsysid; 85 int ct_flags; 86 const struct cac_linkage *ct_linkage; 87 char *ct_typestr; 88 } cac_pci_type[] = { 89 { 0x40300e11, 0, &cac_l0, "SMART-2/P" }, 90 { 0x40310e11, 0, &cac_l0, "SMART-2SL" }, 91 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" }, 92 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" }, 93 { 0x40340e11, 0, &cac_l0, "Smart Array 221" }, 94 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" }, 95 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" }, 96 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" }, 97 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" }, 98 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" }, 99 }; 100 101 static const 102 struct cac_pci_product { 103 u_short cp_vendor; 104 u_short cp_product; 105 } cac_pci_product[] = { 106 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P }, 107 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 }, 108 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 }, 109 }; 110 111 const struct cac_pci_type * 112 cac_pci_findtype(struct pci_attach_args *pa) 113 { 114 const struct cac_pci_type *ct; 115 const struct cac_pci_product *cp; 116 pcireg_t subsysid; 117 int i; 118 119 cp = cac_pci_product; 120 i = 0; 121 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) { 122 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor && 123 PCI_PRODUCT(pa->pa_id) == cp->cp_product) 124 break; 125 cp++; 126 i++; 127 } 128 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) 129 return (NULL); 130 131 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 132 ct = cac_pci_type; 133 i = 0; 134 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) { 135 if (subsysid == ct->ct_subsysid) 136 break; 137 ct++; 138 i++; 139 } 140 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) 141 return (NULL); 142 143 return (ct); 144 } 145 146 int 147 cac_pci_match(struct device *parent, void *match, void *aux) 148 { 149 150 return (cac_pci_findtype(aux) != NULL); 151 } 152 153 void 154 cac_pci_attach(struct device *parent, struct device *self, void *aux) 155 { 156 struct pci_attach_args *pa; 157 const struct cac_pci_type *ct; 158 struct cac_softc *sc; 159 pci_chipset_tag_t pc; 160 pci_intr_handle_t ih; 161 const char *intrstr; 162 pcireg_t reg; 163 bus_size_t size; 164 int memr, ior, i; 165 166 sc = (struct cac_softc *)self; 167 pa = (struct pci_attach_args *)aux; 168 pc = pa->pa_pc; 169 ct = cac_pci_findtype(pa); 170 171 /* 172 * Map the PCI register window. 173 */ 174 memr = -1; 175 ior = -1; 176 177 for (i = 0x10; i <= 0x14; i += 4) { 178 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 179 180 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 181 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 182 ior = i; 183 } else { 184 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 185 memr = i; 186 } 187 } 188 189 if (memr != -1) { 190 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 191 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0)) 192 memr = -1; 193 else 194 ior = -1; 195 } 196 if (ior != -1) 197 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 198 &sc->sc_iot, &sc->sc_ioh, NULL, &size, 0)) 199 ior = -1; 200 if (memr == -1 && ior == -1) { 201 printf(": can't map i/o or memory space\n"); 202 return; 203 } 204 205 sc->sc_dmat = pa->pa_dmat; 206 207 /* Map and establish the interrupt. */ 208 if (pci_intr_map(pa, &ih)) { 209 printf(": can't map interrupt\n"); 210 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size); 211 return; 212 } 213 intrstr = pci_intr_string(pc, ih); 214 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, 215 sc, sc->sc_dv.dv_xname); 216 if (sc->sc_ih == NULL) { 217 printf(": can't establish interrupt"); 218 if (intrstr != NULL) 219 printf(" at %s", intrstr); 220 printf("\n"); 221 bus_space_unmap(sc->sc_iot, sc->sc_ioh, size); 222 return; 223 } 224 225 printf(": %s, %s\n", intrstr, ct->ct_typestr); 226 227 /* Now attach to the bus-independent code. */ 228 sc->sc_cl = ct->ct_linkage; 229 cac_init(sc, (ct->ct_flags & CT_STARTFW) != 0); 230 } 231 232 int 233 cac_activate(struct device *self, int act) 234 { 235 struct cac_softc *sc = (struct cac_softc *)self; 236 int ret = 0; 237 238 ret = config_activate_children(self, act); 239 240 switch (act) { 241 case DVACT_POWERDOWN: 242 cac_flush(sc); 243 break; 244 } 245 246 return (ret); 247 } 248 249 void 250 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 251 { 252 253 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0, 254 sc->sc_dmamap->dm_mapsize, 255 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 256 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr); 257 } 258 259 struct cac_ccb * 260 cac_pci_l0_completed(struct cac_softc *sc) 261 { 262 struct cac_ccb *ccb; 263 u_int32_t off; 264 265 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU) 266 return (NULL); 267 268 cac_outl(sc, CAC_42REG_DONE_FIFO, 0); 269 off = (off & ~3) - sc->sc_ccbs_paddr; 270 ccb = (struct cac_ccb *)(sc->sc_ccbs + off); 271 272 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 0, 273 sc->sc_dmamap->dm_mapsize, 274 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 275 276 return (ccb); 277 } 278 279 int 280 cac_pci_l0_intr_pending(struct cac_softc *sc) 281 { 282 283 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0); 284 } 285 286 void 287 cac_pci_l0_intr_enable(struct cac_softc *sc, int state) 288 { 289 290 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */ 291 } 292 293 int 294 cac_pci_l0_fifo_full(struct cac_softc *sc) 295 { 296 297 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0); 298 } 299