xref: /openbsd/sys/dev/pci/drm/drm_cache.c (revision 5af055cd)
1 /*	$OpenBSD: drm_cache.c,v 1.2 2015/09/23 23:12:11 kettenis Exp $	*/
2 /**************************************************************************
3  *
4  * Copyright (c) 2006-2007 Tungsten Graphics, Inc., Cedar Park, TX., USA
5  * All Rights Reserved.
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a
8  * copy of this software and associated documentation files (the
9  * "Software"), to deal in the Software without restriction, including
10  * without limitation the rights to use, copy, modify, merge, publish,
11  * distribute, sub license, and/or sell copies of the Software, and to
12  * permit persons to whom the Software is furnished to do so, subject to
13  * the following conditions:
14  *
15  * The above copyright notice and this permission notice (including the
16  * next paragraph) shall be included in all copies or substantial portions
17  * of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
23  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
24  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
25  * USE OR OTHER DEALINGS IN THE SOFTWARE.
26  *
27  **************************************************************************/
28 /*
29  * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
30  */
31 
32 #include <linux/export.h>
33 #include <drm/drmP.h>
34 
35 #if defined(CONFIG_X86)
36 static void
37 drm_clflush_page(struct page *page)
38 {
39 	uint8_t *page_virtual;
40 	unsigned int i;
41 	const int size = boot_cpu_data.x86_clflush_size;
42 
43 	if (unlikely(page == NULL))
44 		return;
45 
46 	page_virtual = kmap_atomic(page);
47 	for (i = 0; i < PAGE_SIZE; i += size)
48 		clflush(page_virtual + i);
49 	kunmap_atomic(page_virtual);
50 }
51 
52 static void drm_cache_flush_clflush(struct page *pages[],
53 				    unsigned long num_pages)
54 {
55 	unsigned long i;
56 
57 	mb();
58 	for (i = 0; i < num_pages; i++)
59 		drm_clflush_page(*pages++);
60 	mb();
61 }
62 
63 static void
64 drm_clflush_ipi_handler(void *null)
65 {
66 	wbinvd();
67 }
68 #endif
69 
70 void
71 drm_clflush_pages(struct page *pages[], unsigned long num_pages)
72 {
73 
74 #if defined(CONFIG_X86)
75 	if (cpu_has_clflush) {
76 		drm_cache_flush_clflush(pages, num_pages);
77 		return;
78 	}
79 
80 	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
81 		printk(KERN_ERR "Timed out waiting for cache flush.\n");
82 
83 #elif defined(__powerpc__)
84 	unsigned long i;
85 	for (i = 0; i < num_pages; i++) {
86 		struct page *page = pages[i];
87 		void *page_virtual;
88 
89 		if (unlikely(page == NULL))
90 			continue;
91 
92 		page_virtual = kmap_atomic(page);
93 		flush_dcache_range((unsigned long)page_virtual,
94 				   (unsigned long)page_virtual + PAGE_SIZE);
95 		kunmap_atomic(page_virtual);
96 	}
97 #else
98 	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
99 	WARN_ON_ONCE(1);
100 #endif
101 }
102 EXPORT_SYMBOL(drm_clflush_pages);
103 
104 void
105 drm_clflush_sg(struct sg_table *st)
106 {
107 #if defined(CONFIG_X86)
108 	if (cpu_has_clflush) {
109 		struct sg_page_iter sg_iter;
110 
111 		mb();
112 		for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)
113 			drm_clflush_page(sg_page_iter_page(&sg_iter));
114 		mb();
115 
116 		return;
117 	}
118 
119 	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
120 		printk(KERN_ERR "Timed out waiting for cache flush.\n");
121 #else
122 	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
123 	WARN_ON_ONCE(1);
124 #endif
125 }
126 EXPORT_SYMBOL(drm_clflush_sg);
127 
128 void
129 drm_clflush_virt_range(char *addr, unsigned long length)
130 {
131 #if defined(CONFIG_X86)
132 	if (cpu_has_clflush) {
133 		char *end = addr + length;
134 		mb();
135 		for (; addr < end; addr += boot_cpu_data.x86_clflush_size)
136 			clflush(addr);
137 		clflush(end - 1);
138 		mb();
139 		return;
140 	}
141 
142 	if (on_each_cpu(drm_clflush_ipi_handler, NULL, 1) != 0)
143 		printk(KERN_ERR "Timed out waiting for cache flush.\n");
144 #else
145 	printk(KERN_ERR "Architecture has no drm_cache.c support\n");
146 	WARN_ON_ONCE(1);
147 #endif
148 }
149 EXPORT_SYMBOL(drm_clflush_virt_range);
150