1 /* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33 #include <linux/kernel.h> 34 #include <linux/moduleparam.h> 35 #include <linux/pwm.h> 36 37 #include "intel_connector.h" 38 #include "intel_display_types.h" 39 #include "intel_dp_aux_backlight.h" 40 #include "intel_dsi_dcs_backlight.h" 41 #include "intel_panel.h" 42 43 #define CRC_PMIC_PWM_PERIOD_NS 21333 44 45 void 46 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 47 struct drm_display_mode *adjusted_mode) 48 { 49 drm_mode_copy(adjusted_mode, fixed_mode); 50 51 drm_mode_set_crtcinfo(adjusted_mode, 0); 52 } 53 54 static bool is_downclock_mode(const struct drm_display_mode *downclock_mode, 55 const struct drm_display_mode *fixed_mode) 56 { 57 return drm_mode_match(downclock_mode, fixed_mode, 58 DRM_MODE_MATCH_TIMINGS | 59 DRM_MODE_MATCH_FLAGS | 60 DRM_MODE_MATCH_3D_FLAGS) && 61 downclock_mode->clock < fixed_mode->clock; 62 } 63 64 struct drm_display_mode * 65 intel_panel_edid_downclock_mode(struct intel_connector *connector, 66 const struct drm_display_mode *fixed_mode) 67 { 68 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 69 const struct drm_display_mode *scan, *best_mode = NULL; 70 struct drm_display_mode *downclock_mode; 71 int best_clock = fixed_mode->clock; 72 73 list_for_each_entry(scan, &connector->base.probed_modes, head) { 74 /* 75 * If one mode has the same resolution with the fixed_panel 76 * mode while they have the different refresh rate, it means 77 * that the reduced downclock is found. In such 78 * case we can set the different FPx0/1 to dynamically select 79 * between low and high frequency. 80 */ 81 if (is_downclock_mode(scan, fixed_mode) && 82 scan->clock < best_clock) { 83 /* 84 * The downclock is already found. But we 85 * expect to find the lower downclock. 86 */ 87 best_clock = scan->clock; 88 best_mode = scan; 89 } 90 } 91 92 if (!best_mode) 93 return NULL; 94 95 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode); 96 if (!downclock_mode) 97 return NULL; 98 99 drm_dbg_kms(&dev_priv->drm, 100 "[CONNECTOR:%d:%s] using downclock mode from EDID: ", 101 connector->base.base.id, connector->base.name); 102 drm_mode_debug_printmodeline(downclock_mode); 103 104 return downclock_mode; 105 } 106 107 struct drm_display_mode * 108 intel_panel_edid_fixed_mode(struct intel_connector *connector) 109 { 110 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 111 const struct drm_display_mode *scan; 112 struct drm_display_mode *fixed_mode; 113 114 if (list_empty(&connector->base.probed_modes)) 115 return NULL; 116 117 /* prefer fixed mode from EDID if available */ 118 list_for_each_entry(scan, &connector->base.probed_modes, head) { 119 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0) 120 continue; 121 122 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 123 if (!fixed_mode) 124 return NULL; 125 126 drm_dbg_kms(&dev_priv->drm, 127 "[CONNECTOR:%d:%s] using preferred mode from EDID: ", 128 connector->base.base.id, connector->base.name); 129 drm_mode_debug_printmodeline(fixed_mode); 130 131 return fixed_mode; 132 } 133 134 scan = list_first_entry(&connector->base.probed_modes, 135 typeof(*scan), head); 136 137 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 138 if (!fixed_mode) 139 return NULL; 140 141 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 142 143 drm_dbg_kms(&dev_priv->drm, 144 "[CONNECTOR:%d:%s] using first mode from EDID: ", 145 connector->base.base.id, connector->base.name); 146 drm_mode_debug_printmodeline(fixed_mode); 147 148 return fixed_mode; 149 } 150 151 struct drm_display_mode * 152 intel_panel_vbt_fixed_mode(struct intel_connector *connector) 153 { 154 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 155 struct drm_display_info *info = &connector->base.display_info; 156 struct drm_display_mode *fixed_mode; 157 158 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 159 return NULL; 160 161 fixed_mode = drm_mode_duplicate(&dev_priv->drm, 162 dev_priv->vbt.lfp_lvds_vbt_mode); 163 if (!fixed_mode) 164 return NULL; 165 166 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 167 168 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", 169 connector->base.base.id, connector->base.name); 170 drm_mode_debug_printmodeline(fixed_mode); 171 172 info->width_mm = fixed_mode->width_mm; 173 info->height_mm = fixed_mode->height_mm; 174 175 return fixed_mode; 176 } 177 178 /* adjusted_mode has been preset to be the panel's fixed mode */ 179 void 180 intel_pch_panel_fitting(struct intel_crtc *intel_crtc, 181 struct intel_crtc_state *pipe_config, 182 int fitting_mode) 183 { 184 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 185 int x = 0, y = 0, width = 0, height = 0; 186 187 /* Native modes don't need fitting */ 188 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 189 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h && 190 pipe_config->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) 191 goto done; 192 193 switch (fitting_mode) { 194 case DRM_MODE_SCALE_CENTER: 195 width = pipe_config->pipe_src_w; 196 height = pipe_config->pipe_src_h; 197 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 198 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 199 break; 200 201 case DRM_MODE_SCALE_ASPECT: 202 /* Scale but preserve the aspect ratio */ 203 { 204 u32 scaled_width = adjusted_mode->crtc_hdisplay 205 * pipe_config->pipe_src_h; 206 u32 scaled_height = pipe_config->pipe_src_w 207 * adjusted_mode->crtc_vdisplay; 208 if (scaled_width > scaled_height) { /* pillar */ 209 width = scaled_height / pipe_config->pipe_src_h; 210 if (width & 1) 211 width++; 212 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 213 y = 0; 214 height = adjusted_mode->crtc_vdisplay; 215 } else if (scaled_width < scaled_height) { /* letter */ 216 height = scaled_width / pipe_config->pipe_src_w; 217 if (height & 1) 218 height++; 219 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 220 x = 0; 221 width = adjusted_mode->crtc_hdisplay; 222 } else { 223 x = y = 0; 224 width = adjusted_mode->crtc_hdisplay; 225 height = adjusted_mode->crtc_vdisplay; 226 } 227 } 228 break; 229 230 case DRM_MODE_SCALE_FULLSCREEN: 231 x = y = 0; 232 width = adjusted_mode->crtc_hdisplay; 233 height = adjusted_mode->crtc_vdisplay; 234 break; 235 236 default: 237 WARN(1, "bad panel fit mode: %d\n", fitting_mode); 238 return; 239 } 240 241 done: 242 pipe_config->pch_pfit.pos = (x << 16) | y; 243 pipe_config->pch_pfit.size = (width << 16) | height; 244 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0; 245 } 246 247 static void 248 centre_horizontally(struct drm_display_mode *adjusted_mode, 249 int width) 250 { 251 u32 border, sync_pos, blank_width, sync_width; 252 253 /* keep the hsync and hblank widths constant */ 254 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 255 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 256 sync_pos = (blank_width - sync_width + 1) / 2; 257 258 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 259 border += border & 1; /* make the border even */ 260 261 adjusted_mode->crtc_hdisplay = width; 262 adjusted_mode->crtc_hblank_start = width + border; 263 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 264 265 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 266 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 267 } 268 269 static void 270 centre_vertically(struct drm_display_mode *adjusted_mode, 271 int height) 272 { 273 u32 border, sync_pos, blank_width, sync_width; 274 275 /* keep the vsync and vblank widths constant */ 276 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 277 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 278 sync_pos = (blank_width - sync_width + 1) / 2; 279 280 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 281 282 adjusted_mode->crtc_vdisplay = height; 283 adjusted_mode->crtc_vblank_start = height + border; 284 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 285 286 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 287 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 288 } 289 290 static inline u32 panel_fitter_scaling(u32 source, u32 target) 291 { 292 /* 293 * Floating point operation is not supported. So the FACTOR 294 * is defined, which can avoid the floating point computation 295 * when calculating the panel ratio. 296 */ 297 #define ACCURACY 12 298 #define FACTOR (1 << ACCURACY) 299 u32 ratio = source * FACTOR / target; 300 return (FACTOR * ratio + FACTOR/2) / FACTOR; 301 } 302 303 static void i965_scale_aspect(struct intel_crtc_state *pipe_config, 304 u32 *pfit_control) 305 { 306 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 307 u32 scaled_width = adjusted_mode->crtc_hdisplay * 308 pipe_config->pipe_src_h; 309 u32 scaled_height = pipe_config->pipe_src_w * 310 adjusted_mode->crtc_vdisplay; 311 312 /* 965+ is easy, it does everything in hw */ 313 if (scaled_width > scaled_height) 314 *pfit_control |= PFIT_ENABLE | 315 PFIT_SCALING_PILLAR; 316 else if (scaled_width < scaled_height) 317 *pfit_control |= PFIT_ENABLE | 318 PFIT_SCALING_LETTER; 319 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w) 320 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 321 } 322 323 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config, 324 u32 *pfit_control, u32 *pfit_pgm_ratios, 325 u32 *border) 326 { 327 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 328 u32 scaled_width = adjusted_mode->crtc_hdisplay * 329 pipe_config->pipe_src_h; 330 u32 scaled_height = pipe_config->pipe_src_w * 331 adjusted_mode->crtc_vdisplay; 332 u32 bits; 333 334 /* 335 * For earlier chips we have to calculate the scaling 336 * ratio by hand and program it into the 337 * PFIT_PGM_RATIO register 338 */ 339 if (scaled_width > scaled_height) { /* pillar */ 340 centre_horizontally(adjusted_mode, 341 scaled_height / 342 pipe_config->pipe_src_h); 343 344 *border = LVDS_BORDER_ENABLE; 345 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) { 346 bits = panel_fitter_scaling(pipe_config->pipe_src_h, 347 adjusted_mode->crtc_vdisplay); 348 349 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 350 bits << PFIT_VERT_SCALE_SHIFT); 351 *pfit_control |= (PFIT_ENABLE | 352 VERT_INTERP_BILINEAR | 353 HORIZ_INTERP_BILINEAR); 354 } 355 } else if (scaled_width < scaled_height) { /* letter */ 356 centre_vertically(adjusted_mode, 357 scaled_width / 358 pipe_config->pipe_src_w); 359 360 *border = LVDS_BORDER_ENABLE; 361 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 362 bits = panel_fitter_scaling(pipe_config->pipe_src_w, 363 adjusted_mode->crtc_hdisplay); 364 365 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 366 bits << PFIT_VERT_SCALE_SHIFT); 367 *pfit_control |= (PFIT_ENABLE | 368 VERT_INTERP_BILINEAR | 369 HORIZ_INTERP_BILINEAR); 370 } 371 } else { 372 /* Aspects match, Let hw scale both directions */ 373 *pfit_control |= (PFIT_ENABLE | 374 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 375 VERT_INTERP_BILINEAR | 376 HORIZ_INTERP_BILINEAR); 377 } 378 } 379 380 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, 381 struct intel_crtc_state *pipe_config, 382 int fitting_mode) 383 { 384 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev); 385 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 386 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; 387 388 /* Native modes don't need fitting */ 389 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w && 390 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h) 391 goto out; 392 393 switch (fitting_mode) { 394 case DRM_MODE_SCALE_CENTER: 395 /* 396 * For centered modes, we have to calculate border widths & 397 * heights and modify the values programmed into the CRTC. 398 */ 399 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w); 400 centre_vertically(adjusted_mode, pipe_config->pipe_src_h); 401 border = LVDS_BORDER_ENABLE; 402 break; 403 case DRM_MODE_SCALE_ASPECT: 404 /* Scale but preserve the aspect ratio */ 405 if (INTEL_GEN(dev_priv) >= 4) 406 i965_scale_aspect(pipe_config, &pfit_control); 407 else 408 i9xx_scale_aspect(pipe_config, &pfit_control, 409 &pfit_pgm_ratios, &border); 410 break; 411 case DRM_MODE_SCALE_FULLSCREEN: 412 /* 413 * Full scaling, even if it changes the aspect ratio. 414 * Fortunately this is all done for us in hw. 415 */ 416 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay || 417 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) { 418 pfit_control |= PFIT_ENABLE; 419 if (INTEL_GEN(dev_priv) >= 4) 420 pfit_control |= PFIT_SCALING_AUTO; 421 else 422 pfit_control |= (VERT_AUTO_SCALE | 423 VERT_INTERP_BILINEAR | 424 HORIZ_AUTO_SCALE | 425 HORIZ_INTERP_BILINEAR); 426 } 427 break; 428 default: 429 drm_WARN(&dev_priv->drm, 1, "bad panel fit mode: %d\n", 430 fitting_mode); 431 return; 432 } 433 434 /* 965+ wants fuzzy fitting */ 435 /* FIXME: handle multiple panels by failing gracefully */ 436 if (INTEL_GEN(dev_priv) >= 4) 437 pfit_control |= PFIT_PIPE(intel_crtc->pipe) | PFIT_FILTER_FUZZY; 438 439 out: 440 if ((pfit_control & PFIT_ENABLE) == 0) { 441 pfit_control = 0; 442 pfit_pgm_ratios = 0; 443 } 444 445 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 446 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18) 447 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 448 449 pipe_config->gmch_pfit.control = pfit_control; 450 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 451 pipe_config->gmch_pfit.lvds_border_bits = border; 452 } 453 454 /** 455 * scale - scale values from one range to another 456 * @source_val: value in range [@source_min..@source_max] 457 * @source_min: minimum legal value for @source_val 458 * @source_max: maximum legal value for @source_val 459 * @target_min: corresponding target value for @source_min 460 * @target_max: corresponding target value for @source_max 461 * 462 * Return @source_val in range [@source_min..@source_max] scaled to range 463 * [@target_min..@target_max]. 464 */ 465 static u32 scale(u32 source_val, 466 u32 source_min, u32 source_max, 467 u32 target_min, u32 target_max) 468 { 469 u64 target_val; 470 471 WARN_ON(source_min > source_max); 472 WARN_ON(target_min > target_max); 473 474 /* defensive */ 475 source_val = clamp(source_val, source_min, source_max); 476 477 /* avoid overflows */ 478 target_val = mul_u32_u32(source_val - source_min, 479 target_max - target_min); 480 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); 481 target_val += target_min; 482 483 return target_val; 484 } 485 486 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 487 static inline u32 scale_user_to_hw(struct intel_connector *connector, 488 u32 user_level, u32 user_max) 489 { 490 struct intel_panel *panel = &connector->panel; 491 492 return scale(user_level, 0, user_max, 493 panel->backlight.min, panel->backlight.max); 494 } 495 496 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 497 * to [hw_min..hw_max]. */ 498 static inline u32 clamp_user_to_hw(struct intel_connector *connector, 499 u32 user_level, u32 user_max) 500 { 501 struct intel_panel *panel = &connector->panel; 502 u32 hw_level; 503 504 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 505 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 506 507 return hw_level; 508 } 509 510 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 511 static inline u32 scale_hw_to_user(struct intel_connector *connector, 512 u32 hw_level, u32 user_max) 513 { 514 struct intel_panel *panel = &connector->panel; 515 516 return scale(hw_level, panel->backlight.min, panel->backlight.max, 517 0, user_max); 518 } 519 520 static u32 intel_panel_compute_brightness(struct intel_connector *connector, 521 u32 val) 522 { 523 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 524 struct intel_panel *panel = &connector->panel; 525 526 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 527 528 if (i915_modparams.invert_brightness < 0) 529 return val; 530 531 if (i915_modparams.invert_brightness > 0 || 532 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 533 return panel->backlight.max - val + panel->backlight.min; 534 } 535 536 return val; 537 } 538 539 static u32 lpt_get_backlight(struct intel_connector *connector) 540 { 541 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 542 543 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 544 } 545 546 static u32 pch_get_backlight(struct intel_connector *connector) 547 { 548 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 549 550 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 551 } 552 553 static u32 i9xx_get_backlight(struct intel_connector *connector) 554 { 555 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 556 struct intel_panel *panel = &connector->panel; 557 u32 val; 558 559 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 560 if (INTEL_GEN(dev_priv) < 4) 561 val >>= 1; 562 563 if (panel->backlight.combination_mode) { 564 u8 lbpc; 565 566 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc); 567 val *= lbpc; 568 } 569 570 return val; 571 } 572 573 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe) 574 { 575 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 576 return 0; 577 578 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 579 } 580 581 static u32 vlv_get_backlight(struct intel_connector *connector) 582 { 583 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 584 enum pipe pipe = intel_connector_get_pipe(connector); 585 586 return _vlv_get_backlight(dev_priv, pipe); 587 } 588 589 static u32 bxt_get_backlight(struct intel_connector *connector) 590 { 591 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 592 struct intel_panel *panel = &connector->panel; 593 594 return intel_de_read(dev_priv, 595 BXT_BLC_PWM_DUTY(panel->backlight.controller)); 596 } 597 598 static u32 pwm_get_backlight(struct intel_connector *connector) 599 { 600 struct intel_panel *panel = &connector->panel; 601 int duty_ns; 602 603 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm); 604 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS); 605 } 606 607 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 608 { 609 struct intel_connector *connector = to_intel_connector(conn_state->connector); 610 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 611 612 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 613 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); 614 } 615 616 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 617 { 618 struct intel_connector *connector = to_intel_connector(conn_state->connector); 619 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 620 u32 tmp; 621 622 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 623 intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); 624 } 625 626 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 627 { 628 struct intel_connector *connector = to_intel_connector(conn_state->connector); 629 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 630 struct intel_panel *panel = &connector->panel; 631 u32 tmp, mask; 632 633 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 634 635 if (panel->backlight.combination_mode) { 636 u8 lbpc; 637 638 lbpc = level * 0xfe / panel->backlight.max + 1; 639 level /= lbpc; 640 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc); 641 } 642 643 if (IS_GEN(dev_priv, 4)) { 644 mask = BACKLIGHT_DUTY_CYCLE_MASK; 645 } else { 646 level <<= 1; 647 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 648 } 649 650 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; 651 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); 652 } 653 654 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 655 { 656 struct intel_connector *connector = to_intel_connector(conn_state->connector); 657 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 658 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 659 u32 tmp; 660 661 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 662 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); 663 } 664 665 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 666 { 667 struct intel_connector *connector = to_intel_connector(conn_state->connector); 668 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 669 struct intel_panel *panel = &connector->panel; 670 671 intel_de_write(dev_priv, 672 BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 673 } 674 675 static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 676 { 677 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 678 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); 679 680 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS); 681 } 682 683 static void 684 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 685 { 686 struct intel_connector *connector = to_intel_connector(conn_state->connector); 687 struct intel_panel *panel = &connector->panel; 688 689 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level); 690 691 level = intel_panel_compute_brightness(connector, level); 692 panel->backlight.set(conn_state, level); 693 } 694 695 /* set backlight brightness to level in range [0..max], assuming hw min is 696 * respected. 697 */ 698 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 699 u32 user_level, u32 user_max) 700 { 701 struct intel_connector *connector = to_intel_connector(conn_state->connector); 702 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 703 struct intel_panel *panel = &connector->panel; 704 u32 hw_level; 705 706 /* 707 * Lack of crtc may occur during driver init because 708 * connection_mutex isn't held across the entire backlight 709 * setup + modeset readout, and the BIOS can issue the 710 * requests at any time. 711 */ 712 if (!panel->backlight.present || !conn_state->crtc) 713 return; 714 715 mutex_lock(&dev_priv->backlight_lock); 716 717 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 718 719 hw_level = clamp_user_to_hw(connector, user_level, user_max); 720 panel->backlight.level = hw_level; 721 722 if (panel->backlight.device) 723 panel->backlight.device->props.brightness = 724 scale_hw_to_user(connector, 725 panel->backlight.level, 726 panel->backlight.device->props.max_brightness); 727 728 if (panel->backlight.enabled) 729 intel_panel_actually_set_backlight(conn_state, hw_level); 730 731 mutex_unlock(&dev_priv->backlight_lock); 732 } 733 734 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state) 735 { 736 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 737 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 738 u32 tmp; 739 740 intel_panel_actually_set_backlight(old_conn_state, 0); 741 742 /* 743 * Although we don't support or enable CPU PWM with LPT/SPT based 744 * systems, it may have been enabled prior to loading the 745 * driver. Disable to avoid warnings on LCPLL disable. 746 * 747 * This needs rework if we need to add support for CPU PWM on PCH split 748 * platforms. 749 */ 750 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 751 if (tmp & BLM_PWM_ENABLE) { 752 drm_dbg_kms(&dev_priv->drm, 753 "cpu backlight was enabled, disabling\n"); 754 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 755 tmp & ~BLM_PWM_ENABLE); 756 } 757 758 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 759 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 760 } 761 762 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state) 763 { 764 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 765 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 766 u32 tmp; 767 768 intel_panel_actually_set_backlight(old_conn_state, 0); 769 770 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 771 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 772 773 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 774 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 775 } 776 777 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state) 778 { 779 intel_panel_actually_set_backlight(old_conn_state, 0); 780 } 781 782 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state) 783 { 784 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 785 u32 tmp; 786 787 intel_panel_actually_set_backlight(old_conn_state, 0); 788 789 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); 790 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 791 } 792 793 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state) 794 { 795 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 796 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 797 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 798 u32 tmp; 799 800 intel_panel_actually_set_backlight(old_conn_state, 0); 801 802 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 803 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 804 tmp & ~BLM_PWM_ENABLE); 805 } 806 807 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state) 808 { 809 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 810 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 811 struct intel_panel *panel = &connector->panel; 812 u32 tmp, val; 813 814 intel_panel_actually_set_backlight(old_conn_state, 0); 815 816 tmp = intel_de_read(dev_priv, 817 BXT_BLC_PWM_CTL(panel->backlight.controller)); 818 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 819 tmp & ~BXT_BLC_PWM_ENABLE); 820 821 if (panel->backlight.controller == 1) { 822 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 823 val &= ~UTIL_PIN_ENABLE; 824 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 825 } 826 } 827 828 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state) 829 { 830 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 831 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 832 struct intel_panel *panel = &connector->panel; 833 u32 tmp; 834 835 intel_panel_actually_set_backlight(old_conn_state, 0); 836 837 tmp = intel_de_read(dev_priv, 838 BXT_BLC_PWM_CTL(panel->backlight.controller)); 839 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 840 tmp & ~BXT_BLC_PWM_ENABLE); 841 } 842 843 static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state) 844 { 845 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 846 struct intel_panel *panel = &connector->panel; 847 848 /* Disable the backlight */ 849 intel_panel_actually_set_backlight(old_conn_state, 0); 850 usleep_range(2000, 3000); 851 pwm_disable(panel->backlight.pwm); 852 } 853 854 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 855 { 856 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 857 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 858 struct intel_panel *panel = &connector->panel; 859 860 if (!panel->backlight.present) 861 return; 862 863 /* 864 * Do not disable backlight on the vga_switcheroo path. When switching 865 * away from i915, the other client may depend on i915 to handle the 866 * backlight. This will leave the backlight on unnecessarily when 867 * another client is not activated. 868 */ 869 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 870 drm_dbg(&dev_priv->drm, 871 "Skipping backlight disable on vga switch\n"); 872 return; 873 } 874 875 mutex_lock(&dev_priv->backlight_lock); 876 877 if (panel->backlight.device) 878 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 879 panel->backlight.enabled = false; 880 panel->backlight.disable(old_conn_state); 881 882 mutex_unlock(&dev_priv->backlight_lock); 883 } 884 885 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 886 const struct drm_connector_state *conn_state) 887 { 888 struct intel_connector *connector = to_intel_connector(conn_state->connector); 889 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 890 struct intel_panel *panel = &connector->panel; 891 u32 pch_ctl1, pch_ctl2, schicken; 892 893 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 894 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 895 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 896 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 897 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 898 } 899 900 if (HAS_PCH_LPT(dev_priv)) { 901 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); 902 if (panel->backlight.alternate_pwm_increment) 903 schicken |= LPT_PWM_GRANULARITY; 904 else 905 schicken &= ~LPT_PWM_GRANULARITY; 906 intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); 907 } else { 908 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); 909 if (panel->backlight.alternate_pwm_increment) 910 schicken |= SPT_PWM_GRANULARITY; 911 else 912 schicken &= ~SPT_PWM_GRANULARITY; 913 intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); 914 } 915 916 pch_ctl2 = panel->backlight.max << 16; 917 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 918 919 pch_ctl1 = 0; 920 if (panel->backlight.active_low_pwm) 921 pch_ctl1 |= BLM_PCH_POLARITY; 922 923 /* After LPT, override is the default. */ 924 if (HAS_PCH_LPT(dev_priv)) 925 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 926 927 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 928 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 929 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 930 pch_ctl1 | BLM_PCH_PWM_ENABLE); 931 932 /* This won't stick until the above enable. */ 933 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 934 } 935 936 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 937 const struct drm_connector_state *conn_state) 938 { 939 struct intel_connector *connector = to_intel_connector(conn_state->connector); 940 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 941 struct intel_panel *panel = &connector->panel; 942 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 943 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 944 945 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 946 if (cpu_ctl2 & BLM_PWM_ENABLE) { 947 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); 948 cpu_ctl2 &= ~BLM_PWM_ENABLE; 949 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 950 } 951 952 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 953 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 954 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 955 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 956 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 957 } 958 959 if (cpu_transcoder == TRANSCODER_EDP) 960 cpu_ctl2 = BLM_TRANSCODER_EDP; 961 else 962 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 963 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 964 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); 965 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 966 967 /* This won't stick until the above enable. */ 968 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 969 970 pch_ctl2 = panel->backlight.max << 16; 971 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 972 973 pch_ctl1 = 0; 974 if (panel->backlight.active_low_pwm) 975 pch_ctl1 |= BLM_PCH_POLARITY; 976 977 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 978 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 979 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 980 pch_ctl1 | BLM_PCH_PWM_ENABLE); 981 } 982 983 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 984 const struct drm_connector_state *conn_state) 985 { 986 struct intel_connector *connector = to_intel_connector(conn_state->connector); 987 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 988 struct intel_panel *panel = &connector->panel; 989 u32 ctl, freq; 990 991 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 992 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 993 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 994 intel_de_write(dev_priv, BLC_PWM_CTL, 0); 995 } 996 997 freq = panel->backlight.max; 998 if (panel->backlight.combination_mode) 999 freq /= 0xff; 1000 1001 ctl = freq << 17; 1002 if (panel->backlight.combination_mode) 1003 ctl |= BLM_LEGACY_MODE; 1004 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 1005 ctl |= BLM_POLARITY_PNV; 1006 1007 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1008 intel_de_posting_read(dev_priv, BLC_PWM_CTL); 1009 1010 /* XXX: combine this into above write? */ 1011 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1012 1013 /* 1014 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 1015 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 1016 * that has backlight. 1017 */ 1018 if (IS_GEN(dev_priv, 2)) 1019 intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 1020 } 1021 1022 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 1023 const struct drm_connector_state *conn_state) 1024 { 1025 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1026 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1027 struct intel_panel *panel = &connector->panel; 1028 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1029 u32 ctl, ctl2, freq; 1030 1031 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1032 if (ctl2 & BLM_PWM_ENABLE) { 1033 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1034 ctl2 &= ~BLM_PWM_ENABLE; 1035 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1036 } 1037 1038 freq = panel->backlight.max; 1039 if (panel->backlight.combination_mode) 1040 freq /= 0xff; 1041 1042 ctl = freq << 16; 1043 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1044 1045 ctl2 = BLM_PIPE(pipe); 1046 if (panel->backlight.combination_mode) 1047 ctl2 |= BLM_COMBINATION_MODE; 1048 if (panel->backlight.active_low_pwm) 1049 ctl2 |= BLM_POLARITY_I965; 1050 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1051 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); 1052 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1053 1054 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1055 } 1056 1057 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1058 const struct drm_connector_state *conn_state) 1059 { 1060 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1061 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1062 struct intel_panel *panel = &connector->panel; 1063 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1064 u32 ctl, ctl2; 1065 1066 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1067 if (ctl2 & BLM_PWM_ENABLE) { 1068 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1069 ctl2 &= ~BLM_PWM_ENABLE; 1070 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1071 } 1072 1073 ctl = panel->backlight.max << 16; 1074 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); 1075 1076 /* XXX: combine this into above write? */ 1077 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1078 1079 ctl2 = 0; 1080 if (panel->backlight.active_low_pwm) 1081 ctl2 |= BLM_POLARITY_I965; 1082 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1083 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1084 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 1085 ctl2 | BLM_PWM_ENABLE); 1086 } 1087 1088 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1089 const struct drm_connector_state *conn_state) 1090 { 1091 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1092 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1093 struct intel_panel *panel = &connector->panel; 1094 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1095 u32 pwm_ctl, val; 1096 1097 /* Controller 1 uses the utility pin. */ 1098 if (panel->backlight.controller == 1) { 1099 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1100 if (val & UTIL_PIN_ENABLE) { 1101 drm_dbg_kms(&dev_priv->drm, 1102 "util pin already enabled\n"); 1103 val &= ~UTIL_PIN_ENABLE; 1104 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 1105 } 1106 1107 val = 0; 1108 if (panel->backlight.util_pin_active_low) 1109 val |= UTIL_PIN_POLARITY; 1110 intel_de_write(dev_priv, UTIL_PIN_CTL, 1111 val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1112 } 1113 1114 pwm_ctl = intel_de_read(dev_priv, 1115 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1116 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1117 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1118 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1119 intel_de_write(dev_priv, 1120 BXT_BLC_PWM_CTL(panel->backlight.controller), 1121 pwm_ctl); 1122 } 1123 1124 intel_de_write(dev_priv, 1125 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1126 panel->backlight.max); 1127 1128 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1129 1130 pwm_ctl = 0; 1131 if (panel->backlight.active_low_pwm) 1132 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1133 1134 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1135 pwm_ctl); 1136 intel_de_posting_read(dev_priv, 1137 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1138 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1139 pwm_ctl | BXT_BLC_PWM_ENABLE); 1140 } 1141 1142 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1143 const struct drm_connector_state *conn_state) 1144 { 1145 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1146 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1147 struct intel_panel *panel = &connector->panel; 1148 u32 pwm_ctl; 1149 1150 pwm_ctl = intel_de_read(dev_priv, 1151 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1152 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1153 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1154 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1155 intel_de_write(dev_priv, 1156 BXT_BLC_PWM_CTL(panel->backlight.controller), 1157 pwm_ctl); 1158 } 1159 1160 intel_de_write(dev_priv, 1161 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1162 panel->backlight.max); 1163 1164 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1165 1166 pwm_ctl = 0; 1167 if (panel->backlight.active_low_pwm) 1168 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1169 1170 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1171 pwm_ctl); 1172 intel_de_posting_read(dev_priv, 1173 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1174 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1175 pwm_ctl | BXT_BLC_PWM_ENABLE); 1176 } 1177 1178 static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1179 const struct drm_connector_state *conn_state) 1180 { 1181 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1182 struct intel_panel *panel = &connector->panel; 1183 1184 pwm_enable(panel->backlight.pwm); 1185 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1186 } 1187 1188 static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1189 const struct drm_connector_state *conn_state) 1190 { 1191 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1192 struct intel_panel *panel = &connector->panel; 1193 1194 WARN_ON(panel->backlight.max == 0); 1195 1196 if (panel->backlight.level <= panel->backlight.min) { 1197 panel->backlight.level = panel->backlight.max; 1198 if (panel->backlight.device) 1199 panel->backlight.device->props.brightness = 1200 scale_hw_to_user(connector, 1201 panel->backlight.level, 1202 panel->backlight.device->props.max_brightness); 1203 } 1204 1205 panel->backlight.enable(crtc_state, conn_state); 1206 panel->backlight.enabled = true; 1207 if (panel->backlight.device) 1208 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1209 } 1210 1211 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1212 const struct drm_connector_state *conn_state) 1213 { 1214 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1215 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1216 struct intel_panel *panel = &connector->panel; 1217 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1218 1219 if (!panel->backlight.present) 1220 return; 1221 1222 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); 1223 1224 mutex_lock(&dev_priv->backlight_lock); 1225 1226 __intel_panel_enable_backlight(crtc_state, conn_state); 1227 1228 mutex_unlock(&dev_priv->backlight_lock); 1229 } 1230 1231 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1232 static u32 intel_panel_get_backlight(struct intel_connector *connector) 1233 { 1234 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1235 struct intel_panel *panel = &connector->panel; 1236 u32 val = 0; 1237 1238 mutex_lock(&dev_priv->backlight_lock); 1239 1240 if (panel->backlight.enabled) { 1241 val = panel->backlight.get(connector); 1242 val = intel_panel_compute_brightness(connector, val); 1243 } 1244 1245 mutex_unlock(&dev_priv->backlight_lock); 1246 1247 drm_dbg(&dev_priv->drm, "get backlight PWM = %d\n", val); 1248 return val; 1249 } 1250 1251 /* set backlight brightness to level in range [0..max], scaling wrt hw min */ 1252 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 1253 u32 user_level, u32 user_max) 1254 { 1255 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1256 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1257 struct intel_panel *panel = &connector->panel; 1258 u32 hw_level; 1259 1260 if (!panel->backlight.present) 1261 return; 1262 1263 mutex_lock(&dev_priv->backlight_lock); 1264 1265 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1266 1267 hw_level = scale_user_to_hw(connector, user_level, user_max); 1268 panel->backlight.level = hw_level; 1269 1270 if (panel->backlight.enabled) 1271 intel_panel_actually_set_backlight(conn_state, hw_level); 1272 1273 mutex_unlock(&dev_priv->backlight_lock); 1274 } 1275 1276 static int intel_backlight_device_update_status(struct backlight_device *bd) 1277 { 1278 struct intel_connector *connector = bl_get_data(bd); 1279 struct intel_panel *panel = &connector->panel; 1280 struct drm_device *dev = connector->base.dev; 1281 1282 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1283 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1284 bd->props.brightness, bd->props.max_brightness); 1285 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1286 bd->props.max_brightness); 1287 1288 /* 1289 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1290 * backlight class device does not make it easy to to differentiate 1291 * between callbacks for brightness and bl_power, so our backlight_power 1292 * callback needs to take this into account. 1293 */ 1294 if (panel->backlight.enabled) { 1295 if (panel->backlight.power) { 1296 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1297 bd->props.brightness != 0; 1298 panel->backlight.power(connector, enable); 1299 } 1300 } else { 1301 bd->props.power = FB_BLANK_POWERDOWN; 1302 } 1303 1304 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1305 return 0; 1306 } 1307 1308 static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1309 { 1310 struct intel_connector *connector = bl_get_data(bd); 1311 struct drm_device *dev = connector->base.dev; 1312 struct drm_i915_private *dev_priv = to_i915(dev); 1313 intel_wakeref_t wakeref; 1314 int ret = 0; 1315 1316 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { 1317 u32 hw_level; 1318 1319 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1320 1321 hw_level = intel_panel_get_backlight(connector); 1322 ret = scale_hw_to_user(connector, 1323 hw_level, bd->props.max_brightness); 1324 1325 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1326 } 1327 1328 return ret; 1329 } 1330 1331 static const struct backlight_ops intel_backlight_device_ops = { 1332 .update_status = intel_backlight_device_update_status, 1333 .get_brightness = intel_backlight_device_get_brightness, 1334 }; 1335 1336 int intel_backlight_device_register(struct intel_connector *connector) 1337 { 1338 struct intel_panel *panel = &connector->panel; 1339 struct backlight_properties props; 1340 1341 if (WARN_ON(panel->backlight.device)) 1342 return -ENODEV; 1343 1344 if (!panel->backlight.present) 1345 return 0; 1346 1347 WARN_ON(panel->backlight.max == 0); 1348 1349 memset(&props, 0, sizeof(props)); 1350 props.type = BACKLIGHT_RAW; 1351 1352 /* 1353 * Note: Everything should work even if the backlight device max 1354 * presented to the userspace is arbitrarily chosen. 1355 */ 1356 props.max_brightness = panel->backlight.max; 1357 props.brightness = scale_hw_to_user(connector, 1358 panel->backlight.level, 1359 props.max_brightness); 1360 1361 if (panel->backlight.enabled) 1362 props.power = FB_BLANK_UNBLANK; 1363 else 1364 props.power = FB_BLANK_POWERDOWN; 1365 1366 /* 1367 * Note: using the same name independent of the connector prevents 1368 * registration of multiple backlight devices in the driver. 1369 */ 1370 panel->backlight.device = 1371 backlight_device_register("intel_backlight", 1372 connector->base.kdev, 1373 connector, 1374 &intel_backlight_device_ops, &props); 1375 1376 if (IS_ERR(panel->backlight.device)) { 1377 DRM_ERROR("Failed to register backlight: %ld\n", 1378 PTR_ERR(panel->backlight.device)); 1379 panel->backlight.device = NULL; 1380 return -ENODEV; 1381 } 1382 1383 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n", 1384 connector->base.name); 1385 1386 return 0; 1387 } 1388 1389 void intel_backlight_device_unregister(struct intel_connector *connector) 1390 { 1391 struct intel_panel *panel = &connector->panel; 1392 1393 if (panel->backlight.device) { 1394 backlight_device_unregister(panel->backlight.device); 1395 panel->backlight.device = NULL; 1396 } 1397 } 1398 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1399 1400 /* 1401 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1402 * PWM increment = 1 1403 */ 1404 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1405 { 1406 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1407 1408 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1409 pwm_freq_hz); 1410 } 1411 1412 /* 1413 * BXT: PWM clock frequency = 19.2 MHz. 1414 */ 1415 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1416 { 1417 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1418 } 1419 1420 /* 1421 * SPT: This value represents the period of the PWM stream in clock periods 1422 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1423 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1424 */ 1425 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1426 { 1427 struct intel_panel *panel = &connector->panel; 1428 u32 mul; 1429 1430 if (panel->backlight.alternate_pwm_increment) 1431 mul = 128; 1432 else 1433 mul = 16; 1434 1435 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1436 } 1437 1438 /* 1439 * LPT: This value represents the period of the PWM stream in clock periods 1440 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1441 * LPT SOUTH_CHICKEN2 register bit 5). 1442 */ 1443 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1444 { 1445 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1446 struct intel_panel *panel = &connector->panel; 1447 u32 mul, clock; 1448 1449 if (panel->backlight.alternate_pwm_increment) 1450 mul = 16; 1451 else 1452 mul = 128; 1453 1454 if (HAS_PCH_LPT_H(dev_priv)) 1455 clock = MHz(135); /* LPT:H */ 1456 else 1457 clock = MHz(24); /* LPT:LP */ 1458 1459 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1460 } 1461 1462 /* 1463 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1464 * display raw clocks multiplied by 128. 1465 */ 1466 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1467 { 1468 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1469 1470 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1471 pwm_freq_hz * 128); 1472 } 1473 1474 /* 1475 * Gen2: This field determines the number of time base events (display core 1476 * clock frequency/32) in total for a complete cycle of modulated backlight 1477 * control. 1478 * 1479 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1480 * divided by 32. 1481 */ 1482 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1483 { 1484 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1485 int clock; 1486 1487 if (IS_PINEVIEW(dev_priv)) 1488 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1489 else 1490 clock = KHz(dev_priv->cdclk.hw.cdclk); 1491 1492 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1493 } 1494 1495 /* 1496 * Gen4: This value represents the period of the PWM stream in display core 1497 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1498 * 1499 */ 1500 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1501 { 1502 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1503 int clock; 1504 1505 if (IS_G4X(dev_priv)) 1506 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1507 else 1508 clock = KHz(dev_priv->cdclk.hw.cdclk); 1509 1510 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1511 } 1512 1513 /* 1514 * VLV: This value represents the period of the PWM stream in display core 1515 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1516 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1517 */ 1518 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1519 { 1520 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1521 int mul, clock; 1522 1523 if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1524 if (IS_CHERRYVIEW(dev_priv)) 1525 clock = KHz(19200); 1526 else 1527 clock = MHz(25); 1528 mul = 16; 1529 } else { 1530 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1531 mul = 128; 1532 } 1533 1534 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1535 } 1536 1537 static u32 get_backlight_max_vbt(struct intel_connector *connector) 1538 { 1539 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1540 struct intel_panel *panel = &connector->panel; 1541 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1542 u32 pwm; 1543 1544 if (!panel->backlight.hz_to_pwm) { 1545 drm_dbg_kms(&dev_priv->drm, 1546 "backlight frequency conversion not supported\n"); 1547 return 0; 1548 } 1549 1550 if (pwm_freq_hz) { 1551 drm_dbg_kms(&dev_priv->drm, 1552 "VBT defined backlight frequency %u Hz\n", 1553 pwm_freq_hz); 1554 } else { 1555 pwm_freq_hz = 200; 1556 drm_dbg_kms(&dev_priv->drm, 1557 "default backlight frequency %u Hz\n", 1558 pwm_freq_hz); 1559 } 1560 1561 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); 1562 if (!pwm) { 1563 drm_dbg_kms(&dev_priv->drm, 1564 "backlight frequency conversion failed\n"); 1565 return 0; 1566 } 1567 1568 return pwm; 1569 } 1570 1571 /* 1572 * Note: The setup hooks can't assume pipe is set! 1573 */ 1574 static u32 get_backlight_min_vbt(struct intel_connector *connector) 1575 { 1576 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1577 struct intel_panel *panel = &connector->panel; 1578 int min; 1579 1580 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1581 1582 /* 1583 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1584 * to problems. There are such machines out there. Either our 1585 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1586 * against this by letting the minimum be at most (arbitrarily chosen) 1587 * 25% of the max. 1588 */ 1589 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1590 if (min != dev_priv->vbt.backlight.min_brightness) { 1591 drm_dbg_kms(&dev_priv->drm, 1592 "clamping VBT min backlight %d/255 to %d/255\n", 1593 dev_priv->vbt.backlight.min_brightness, min); 1594 } 1595 1596 /* vbt value is a coefficient in range [0..255] */ 1597 return scale(min, 0, 255, 0, panel->backlight.max); 1598 } 1599 1600 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1601 { 1602 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1603 struct intel_panel *panel = &connector->panel; 1604 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1605 bool alt, cpu_mode; 1606 1607 if (HAS_PCH_LPT(dev_priv)) 1608 alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1609 else 1610 alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1611 panel->backlight.alternate_pwm_increment = alt; 1612 1613 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1614 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1615 1616 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1617 panel->backlight.max = pch_ctl2 >> 16; 1618 1619 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1620 1621 if (!panel->backlight.max) 1622 panel->backlight.max = get_backlight_max_vbt(connector); 1623 1624 if (!panel->backlight.max) 1625 return -ENODEV; 1626 1627 panel->backlight.min = get_backlight_min_vbt(connector); 1628 1629 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1630 1631 cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) && 1632 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && 1633 (cpu_ctl2 & BLM_PWM_ENABLE); 1634 if (cpu_mode) 1635 val = pch_get_backlight(connector); 1636 else 1637 val = lpt_get_backlight(connector); 1638 val = intel_panel_compute_brightness(connector, val); 1639 panel->backlight.level = clamp(val, panel->backlight.min, 1640 panel->backlight.max); 1641 1642 if (cpu_mode) { 1643 drm_dbg_kms(&dev_priv->drm, 1644 "CPU backlight register was enabled, switching to PCH override\n"); 1645 1646 /* Write converted CPU PWM value to PCH override register */ 1647 lpt_set_backlight(connector->base.state, panel->backlight.level); 1648 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1649 pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); 1650 1651 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 1652 cpu_ctl2 & ~BLM_PWM_ENABLE); 1653 } 1654 1655 return 0; 1656 } 1657 1658 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) 1659 { 1660 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1661 struct intel_panel *panel = &connector->panel; 1662 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1663 1664 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1665 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1666 1667 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1668 panel->backlight.max = pch_ctl2 >> 16; 1669 1670 if (!panel->backlight.max) 1671 panel->backlight.max = get_backlight_max_vbt(connector); 1672 1673 if (!panel->backlight.max) 1674 return -ENODEV; 1675 1676 panel->backlight.min = get_backlight_min_vbt(connector); 1677 1678 val = pch_get_backlight(connector); 1679 val = intel_panel_compute_brightness(connector, val); 1680 panel->backlight.level = clamp(val, panel->backlight.min, 1681 panel->backlight.max); 1682 1683 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1684 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1685 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1686 1687 return 0; 1688 } 1689 1690 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) 1691 { 1692 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1693 struct intel_panel *panel = &connector->panel; 1694 u32 ctl, val; 1695 1696 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1697 1698 if (IS_GEN(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1699 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1700 1701 if (IS_PINEVIEW(dev_priv)) 1702 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1703 1704 panel->backlight.max = ctl >> 17; 1705 1706 if (!panel->backlight.max) { 1707 panel->backlight.max = get_backlight_max_vbt(connector); 1708 panel->backlight.max >>= 1; 1709 } 1710 1711 if (!panel->backlight.max) 1712 return -ENODEV; 1713 1714 if (panel->backlight.combination_mode) 1715 panel->backlight.max *= 0xff; 1716 1717 panel->backlight.min = get_backlight_min_vbt(connector); 1718 1719 val = i9xx_get_backlight(connector); 1720 val = intel_panel_compute_brightness(connector, val); 1721 panel->backlight.level = clamp(val, panel->backlight.min, 1722 panel->backlight.max); 1723 1724 panel->backlight.enabled = val != 0; 1725 1726 return 0; 1727 } 1728 1729 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) 1730 { 1731 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1732 struct intel_panel *panel = &connector->panel; 1733 u32 ctl, ctl2, val; 1734 1735 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1736 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1737 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1738 1739 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1740 panel->backlight.max = ctl >> 16; 1741 1742 if (!panel->backlight.max) 1743 panel->backlight.max = get_backlight_max_vbt(connector); 1744 1745 if (!panel->backlight.max) 1746 return -ENODEV; 1747 1748 if (panel->backlight.combination_mode) 1749 panel->backlight.max *= 0xff; 1750 1751 panel->backlight.min = get_backlight_min_vbt(connector); 1752 1753 val = i9xx_get_backlight(connector); 1754 val = intel_panel_compute_brightness(connector, val); 1755 panel->backlight.level = clamp(val, panel->backlight.min, 1756 panel->backlight.max); 1757 1758 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1759 1760 return 0; 1761 } 1762 1763 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1764 { 1765 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1766 struct intel_panel *panel = &connector->panel; 1767 u32 ctl, ctl2, val; 1768 1769 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 1770 return -ENODEV; 1771 1772 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1773 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1774 1775 ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); 1776 panel->backlight.max = ctl >> 16; 1777 1778 if (!panel->backlight.max) 1779 panel->backlight.max = get_backlight_max_vbt(connector); 1780 1781 if (!panel->backlight.max) 1782 return -ENODEV; 1783 1784 panel->backlight.min = get_backlight_min_vbt(connector); 1785 1786 val = _vlv_get_backlight(dev_priv, pipe); 1787 val = intel_panel_compute_brightness(connector, val); 1788 panel->backlight.level = clamp(val, panel->backlight.min, 1789 panel->backlight.max); 1790 1791 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1792 1793 return 0; 1794 } 1795 1796 static int 1797 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1798 { 1799 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1800 struct intel_panel *panel = &connector->panel; 1801 u32 pwm_ctl, val; 1802 1803 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1804 1805 pwm_ctl = intel_de_read(dev_priv, 1806 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1807 1808 /* Controller 1 uses the utility pin. */ 1809 if (panel->backlight.controller == 1) { 1810 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1811 panel->backlight.util_pin_active_low = 1812 val & UTIL_PIN_POLARITY; 1813 } 1814 1815 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1816 panel->backlight.max = 1817 intel_de_read(dev_priv, 1818 BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1819 1820 if (!panel->backlight.max) 1821 panel->backlight.max = get_backlight_max_vbt(connector); 1822 1823 if (!panel->backlight.max) 1824 return -ENODEV; 1825 1826 panel->backlight.min = get_backlight_min_vbt(connector); 1827 1828 val = bxt_get_backlight(connector); 1829 val = intel_panel_compute_brightness(connector, val); 1830 panel->backlight.level = clamp(val, panel->backlight.min, 1831 panel->backlight.max); 1832 1833 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1834 1835 return 0; 1836 } 1837 1838 static int 1839 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 1840 { 1841 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1842 struct intel_panel *panel = &connector->panel; 1843 u32 pwm_ctl, val; 1844 1845 /* 1846 * CNP has the BXT implementation of backlight, but with only one 1847 * controller. TODO: ICP has multiple controllers but we only use 1848 * controller 0 for now. 1849 */ 1850 panel->backlight.controller = 0; 1851 1852 pwm_ctl = intel_de_read(dev_priv, 1853 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1854 1855 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1856 panel->backlight.max = 1857 intel_de_read(dev_priv, 1858 BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1859 1860 if (!panel->backlight.max) 1861 panel->backlight.max = get_backlight_max_vbt(connector); 1862 1863 if (!panel->backlight.max) 1864 return -ENODEV; 1865 1866 panel->backlight.min = get_backlight_min_vbt(connector); 1867 1868 val = bxt_get_backlight(connector); 1869 val = intel_panel_compute_brightness(connector, val); 1870 panel->backlight.level = clamp(val, panel->backlight.min, 1871 panel->backlight.max); 1872 1873 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1874 1875 return 0; 1876 } 1877 1878 static int pwm_setup_backlight(struct intel_connector *connector, 1879 enum pipe pipe) 1880 { 1881 struct drm_device *dev = connector->base.dev; 1882 struct drm_i915_private *dev_priv = to_i915(dev); 1883 struct intel_panel *panel = &connector->panel; 1884 const char *desc; 1885 u32 level, ns; 1886 int retval; 1887 1888 /* Get the right PWM chip for DSI backlight according to VBT */ 1889 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { 1890 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); 1891 desc = "PMIC"; 1892 } else { 1893 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); 1894 desc = "SoC"; 1895 } 1896 1897 if (IS_ERR(panel->backlight.pwm)) { 1898 drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", 1899 desc); 1900 panel->backlight.pwm = NULL; 1901 return -ENODEV; 1902 } 1903 1904 /* 1905 * FIXME: pwm_apply_args() should be removed when switching to 1906 * the atomic PWM API. 1907 */ 1908 pwm_apply_args(panel->backlight.pwm); 1909 1910 panel->backlight.min = 0; /* 0% */ 1911 panel->backlight.max = 100; /* 100% */ 1912 level = intel_panel_compute_brightness(connector, 100); 1913 ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100); 1914 1915 retval = pwm_config(panel->backlight.pwm, ns, CRC_PMIC_PWM_PERIOD_NS); 1916 if (retval < 0) { 1917 drm_err(&dev_priv->drm, "Failed to configure the pwm chip\n"); 1918 pwm_put(panel->backlight.pwm); 1919 panel->backlight.pwm = NULL; 1920 return retval; 1921 } 1922 1923 level = DIV_ROUND_UP(pwm_get_duty_cycle(panel->backlight.pwm) * 100, 1924 CRC_PMIC_PWM_PERIOD_NS); 1925 panel->backlight.level = 1926 intel_panel_compute_brightness(connector, level); 1927 panel->backlight.enabled = panel->backlight.level != 0; 1928 1929 drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", 1930 desc); 1931 return 0; 1932 } 1933 1934 void intel_panel_update_backlight(struct intel_encoder *encoder, 1935 const struct intel_crtc_state *crtc_state, 1936 const struct drm_connector_state *conn_state) 1937 { 1938 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1939 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1940 struct intel_panel *panel = &connector->panel; 1941 1942 if (!panel->backlight.present) 1943 return; 1944 1945 mutex_lock(&dev_priv->backlight_lock); 1946 if (!panel->backlight.enabled) 1947 __intel_panel_enable_backlight(crtc_state, conn_state); 1948 1949 mutex_unlock(&dev_priv->backlight_lock); 1950 } 1951 1952 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) 1953 { 1954 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1955 struct intel_connector *intel_connector = to_intel_connector(connector); 1956 struct intel_panel *panel = &intel_connector->panel; 1957 int ret; 1958 1959 if (!dev_priv->vbt.backlight.present) { 1960 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 1961 drm_dbg_kms(&dev_priv->drm, 1962 "no backlight present per VBT, but present per quirk\n"); 1963 } else { 1964 drm_dbg_kms(&dev_priv->drm, 1965 "no backlight present per VBT\n"); 1966 return 0; 1967 } 1968 } 1969 1970 /* ensure intel_panel has been initialized first */ 1971 if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.setup)) 1972 return -ENODEV; 1973 1974 /* set level and max in panel struct */ 1975 mutex_lock(&dev_priv->backlight_lock); 1976 ret = panel->backlight.setup(intel_connector, pipe); 1977 mutex_unlock(&dev_priv->backlight_lock); 1978 1979 if (ret) { 1980 drm_dbg_kms(&dev_priv->drm, 1981 "failed to setup backlight for connector %s\n", 1982 connector->name); 1983 return ret; 1984 } 1985 1986 panel->backlight.present = true; 1987 1988 drm_dbg_kms(&dev_priv->drm, 1989 "Connector %s backlight initialized, %s, brightness %u/%u\n", 1990 connector->name, 1991 enableddisabled(panel->backlight.enabled), 1992 panel->backlight.level, panel->backlight.max); 1993 1994 return 0; 1995 } 1996 1997 static void intel_panel_destroy_backlight(struct intel_panel *panel) 1998 { 1999 /* dispose of the pwm */ 2000 if (panel->backlight.pwm) 2001 pwm_put(panel->backlight.pwm); 2002 2003 panel->backlight.present = false; 2004 } 2005 2006 /* Set up chip specific backlight functions */ 2007 static void 2008 intel_panel_init_backlight_funcs(struct intel_panel *panel) 2009 { 2010 struct intel_connector *connector = 2011 container_of(panel, struct intel_connector, panel); 2012 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2013 2014 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 2015 intel_dp_aux_init_backlight_funcs(connector) == 0) 2016 return; 2017 2018 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 2019 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 2020 return; 2021 2022 if (IS_GEN9_LP(dev_priv)) { 2023 panel->backlight.setup = bxt_setup_backlight; 2024 panel->backlight.enable = bxt_enable_backlight; 2025 panel->backlight.disable = bxt_disable_backlight; 2026 panel->backlight.set = bxt_set_backlight; 2027 panel->backlight.get = bxt_get_backlight; 2028 panel->backlight.hz_to_pwm = bxt_hz_to_pwm; 2029 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { 2030 panel->backlight.setup = cnp_setup_backlight; 2031 panel->backlight.enable = cnp_enable_backlight; 2032 panel->backlight.disable = cnp_disable_backlight; 2033 panel->backlight.set = bxt_set_backlight; 2034 panel->backlight.get = bxt_get_backlight; 2035 panel->backlight.hz_to_pwm = cnp_hz_to_pwm; 2036 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { 2037 panel->backlight.setup = lpt_setup_backlight; 2038 panel->backlight.enable = lpt_enable_backlight; 2039 panel->backlight.disable = lpt_disable_backlight; 2040 panel->backlight.set = lpt_set_backlight; 2041 panel->backlight.get = lpt_get_backlight; 2042 if (HAS_PCH_LPT(dev_priv)) 2043 panel->backlight.hz_to_pwm = lpt_hz_to_pwm; 2044 else 2045 panel->backlight.hz_to_pwm = spt_hz_to_pwm; 2046 } else if (HAS_PCH_SPLIT(dev_priv)) { 2047 panel->backlight.setup = pch_setup_backlight; 2048 panel->backlight.enable = pch_enable_backlight; 2049 panel->backlight.disable = pch_disable_backlight; 2050 panel->backlight.set = pch_set_backlight; 2051 panel->backlight.get = pch_get_backlight; 2052 panel->backlight.hz_to_pwm = pch_hz_to_pwm; 2053 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 2054 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 2055 panel->backlight.setup = pwm_setup_backlight; 2056 panel->backlight.enable = pwm_enable_backlight; 2057 panel->backlight.disable = pwm_disable_backlight; 2058 panel->backlight.set = pwm_set_backlight; 2059 panel->backlight.get = pwm_get_backlight; 2060 } else { 2061 panel->backlight.setup = vlv_setup_backlight; 2062 panel->backlight.enable = vlv_enable_backlight; 2063 panel->backlight.disable = vlv_disable_backlight; 2064 panel->backlight.set = vlv_set_backlight; 2065 panel->backlight.get = vlv_get_backlight; 2066 panel->backlight.hz_to_pwm = vlv_hz_to_pwm; 2067 } 2068 } else if (IS_GEN(dev_priv, 4)) { 2069 panel->backlight.setup = i965_setup_backlight; 2070 panel->backlight.enable = i965_enable_backlight; 2071 panel->backlight.disable = i965_disable_backlight; 2072 panel->backlight.set = i9xx_set_backlight; 2073 panel->backlight.get = i9xx_get_backlight; 2074 panel->backlight.hz_to_pwm = i965_hz_to_pwm; 2075 } else { 2076 panel->backlight.setup = i9xx_setup_backlight; 2077 panel->backlight.enable = i9xx_enable_backlight; 2078 panel->backlight.disable = i9xx_disable_backlight; 2079 panel->backlight.set = i9xx_set_backlight; 2080 panel->backlight.get = i9xx_get_backlight; 2081 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; 2082 } 2083 } 2084 2085 int intel_panel_init(struct intel_panel *panel, 2086 struct drm_display_mode *fixed_mode, 2087 struct drm_display_mode *downclock_mode) 2088 { 2089 intel_panel_init_backlight_funcs(panel); 2090 2091 panel->fixed_mode = fixed_mode; 2092 panel->downclock_mode = downclock_mode; 2093 2094 return 0; 2095 } 2096 2097 void intel_panel_fini(struct intel_panel *panel) 2098 { 2099 struct intel_connector *intel_connector = 2100 container_of(panel, struct intel_connector, panel); 2101 2102 intel_panel_destroy_backlight(panel); 2103 2104 if (panel->fixed_mode) 2105 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2106 2107 if (panel->downclock_mode) 2108 drm_mode_destroy(intel_connector->base.dev, 2109 panel->downclock_mode); 2110 } 2111