1 /* $OpenBSD: atom-names.h,v 1.1 2013/08/12 04:11:53 jsg Exp $ */ 2 /* 3 * Copyright 2008 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Author: Stanislaw Skowronek 24 */ 25 26 #ifndef ATOM_NAMES_H 27 #define ATOM_NAMES_H 28 29 #include "atom.h" 30 31 #ifdef ATOM_DEBUG 32 33 #define ATOM_OP_NAMES_CNT 123 34 static char *atom_op_names[ATOM_OP_NAMES_CNT] = { 35 "RESERVED", "MOVE_REG", "MOVE_PS", "MOVE_WS", "MOVE_FB", "MOVE_PLL", 36 "MOVE_MC", "AND_REG", "AND_PS", "AND_WS", "AND_FB", "AND_PLL", "AND_MC", 37 "OR_REG", "OR_PS", "OR_WS", "OR_FB", "OR_PLL", "OR_MC", "SHIFT_LEFT_REG", 38 "SHIFT_LEFT_PS", "SHIFT_LEFT_WS", "SHIFT_LEFT_FB", "SHIFT_LEFT_PLL", 39 "SHIFT_LEFT_MC", "SHIFT_RIGHT_REG", "SHIFT_RIGHT_PS", "SHIFT_RIGHT_WS", 40 "SHIFT_RIGHT_FB", "SHIFT_RIGHT_PLL", "SHIFT_RIGHT_MC", "MUL_REG", 41 "MUL_PS", "MUL_WS", "MUL_FB", "MUL_PLL", "MUL_MC", "DIV_REG", "DIV_PS", 42 "DIV_WS", "DIV_FB", "DIV_PLL", "DIV_MC", "ADD_REG", "ADD_PS", "ADD_WS", 43 "ADD_FB", "ADD_PLL", "ADD_MC", "SUB_REG", "SUB_PS", "SUB_WS", "SUB_FB", 44 "SUB_PLL", "SUB_MC", "SET_ATI_PORT", "SET_PCI_PORT", "SET_SYS_IO_PORT", 45 "SET_REG_BLOCK", "SET_FB_BASE", "COMPARE_REG", "COMPARE_PS", 46 "COMPARE_WS", "COMPARE_FB", "COMPARE_PLL", "COMPARE_MC", "SWITCH", 47 "JUMP", "JUMP_EQUAL", "JUMP_BELOW", "JUMP_ABOVE", "JUMP_BELOW_OR_EQUAL", 48 "JUMP_ABOVE_OR_EQUAL", "JUMP_NOT_EQUAL", "TEST_REG", "TEST_PS", "TEST_WS", 49 "TEST_FB", "TEST_PLL", "TEST_MC", "DELAY_MILLISEC", "DELAY_MICROSEC", 50 "CALL_TABLE", "REPEAT", "CLEAR_REG", "CLEAR_PS", "CLEAR_WS", "CLEAR_FB", 51 "CLEAR_PLL", "CLEAR_MC", "NOP", "EOT", "MASK_REG", "MASK_PS", "MASK_WS", 52 "MASK_FB", "MASK_PLL", "MASK_MC", "POST_CARD", "BEEP", "SAVE_REG", 53 "RESTORE_REG", "SET_DATA_BLOCK", "XOR_REG", "XOR_PS", "XOR_WS", "XOR_FB", 54 "XOR_PLL", "XOR_MC", "SHL_REG", "SHL_PS", "SHL_WS", "SHL_FB", "SHL_PLL", 55 "SHL_MC", "SHR_REG", "SHR_PS", "SHR_WS", "SHR_FB", "SHR_PLL", "SHR_MC", 56 "DEBUG", "CTB_DS", 57 }; 58 59 #define ATOM_TABLE_NAMES_CNT 74 60 static char *atom_table_names[ATOM_TABLE_NAMES_CNT] = { 61 "ASIC_Init", "GetDisplaySurfaceSize", "ASIC_RegistersInit", 62 "VRAM_BlockVenderDetection", "SetClocksRatio", "MemoryControllerInit", 63 "GPIO_PinInit", "MemoryParamAdjust", "DVOEncoderControl", 64 "GPIOPinControl", "SetEngineClock", "SetMemoryClock", "SetPixelClock", 65 "DynamicClockGating", "ResetMemoryDLL", "ResetMemoryDevice", 66 "MemoryPLLInit", "EnableMemorySelfRefresh", "AdjustMemoryController", 67 "EnableASIC_StaticPwrMgt", "ASIC_StaticPwrMgtStatusChange", 68 "DAC_LoadDetection", "TMDS2EncoderControl", "LCD1OutputControl", 69 "DAC1EncoderControl", "DAC2EncoderControl", "DVOOutputControl", 70 "CV1OutputControl", "SetCRTC_DPM_State", "TVEncoderControl", 71 "TMDS1EncoderControl", "LVDSEncoderControl", "TV1OutputControl", 72 "EnableScaler", "BlankCRTC", "EnableCRTC", "GetPixelClock", 73 "EnableVGA_Render", "EnableVGA_Access", "SetCRTC_Timing", 74 "SetCRTC_OverScan", "SetCRTC_Replication", "SelectCRTC_Source", 75 "EnableGraphSurfaces", "UpdateCRTC_DoubleBufferRegisters", 76 "LUT_AutoFill", "EnableHW_IconCursor", "GetMemoryClock", 77 "GetEngineClock", "SetCRTC_UsingDTDTiming", "TVBootUpStdPinDetection", 78 "DFP2OutputControl", "VRAM_BlockDetectionByStrap", "MemoryCleanUp", 79 "ReadEDIDFromHWAssistedI2C", "WriteOneByteToHWAssistedI2C", 80 "ReadHWAssistedI2CStatus", "SpeedFanControl", "PowerConnectorDetection", 81 "MC_Synchronization", "ComputeMemoryEnginePLL", "MemoryRefreshConversion", 82 "VRAM_GetCurrentInfoBlock", "DynamicMemorySettings", "MemoryTraining", 83 "EnableLVDS_SS", "DFP1OutputControl", "SetVoltage", "CRT1OutputControl", 84 "CRT2OutputControl", "SetupHWAssistedI2CStatus", "ClockSource", 85 "MemoryDeviceInit", "EnableYUV", 86 }; 87 88 #define ATOM_IO_NAMES_CNT 5 89 static char *atom_io_names[ATOM_IO_NAMES_CNT] = { 90 "MM", "PLL", "MC", "PCIE", "PCIE PORT", 91 }; 92 93 #else 94 95 #define ATOM_OP_NAMES_CNT 0 96 #define ATOM_TABLE_NAMES_CNT 0 97 #define ATOM_IO_NAMES_CNT 0 98 99 #endif 100 101 #endif 102