xref: /openbsd/sys/dev/pci/drm/radeon/avivod.h (revision 5af055cd)
1 /*	$OpenBSD: avivod.h,v 1.1 2013/08/12 04:11:53 jsg Exp $	*/
2 /*
3  * Copyright 2009 Advanced Micro Devices, Inc.
4  * Copyright 2009 Red Hat Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22  * OTHER DEALINGS IN THE SOFTWARE.
23  *
24  * Authors: Dave Airlie
25  *          Alex Deucher
26  *          Jerome Glisse
27  */
28 #ifndef AVIVOD_H
29 #define AVIVOD_H
30 
31 
32 #define	D1CRTC_CONTROL					0x6080
33 #define		CRTC_EN						(1 << 0)
34 #define	D1CRTC_STATUS					0x609c
35 #define	D1CRTC_UPDATE_LOCK				0x60E8
36 #define	D1GRPH_PRIMARY_SURFACE_ADDRESS			0x6110
37 #define	D1GRPH_SECONDARY_SURFACE_ADDRESS		0x6118
38 
39 #define	D2CRTC_CONTROL					0x6880
40 #define	D2CRTC_STATUS					0x689c
41 #define	D2CRTC_UPDATE_LOCK				0x68E8
42 #define	D2GRPH_PRIMARY_SURFACE_ADDRESS			0x6910
43 #define	D2GRPH_SECONDARY_SURFACE_ADDRESS		0x6918
44 
45 #define	D1VGA_CONTROL					0x0330
46 #define		DVGA_CONTROL_MODE_ENABLE			(1 << 0)
47 #define		DVGA_CONTROL_TIMING_SELECT			(1 << 8)
48 #define		DVGA_CONTROL_SYNC_POLARITY_SELECT		(1 << 9)
49 #define		DVGA_CONTROL_OVERSCAN_TIMING_SELECT		(1 << 10)
50 #define		DVGA_CONTROL_OVERSCAN_COLOR_EN			(1 << 16)
51 #define		DVGA_CONTROL_ROTATE				(1 << 24)
52 #define D2VGA_CONTROL					0x0338
53 
54 #define	VGA_HDP_CONTROL					0x328
55 #define		VGA_MEM_PAGE_SELECT_EN				(1 << 0)
56 #define		VGA_MEMORY_DISABLE				(1 << 4)
57 #define		VGA_RBBM_LOCK_DISABLE				(1 << 8)
58 #define		VGA_SOFT_RESET					(1 << 16)
59 #define	VGA_MEMORY_BASE_ADDRESS				0x0310
60 #define	VGA_RENDER_CONTROL				0x0300
61 #define		VGA_VSTATUS_CNTL_MASK				0x00030000
62 
63 #endif
64