1 /* $OpenBSD: r600_reg.h,v 1.1 2013/08/12 04:11:53 jsg Exp $ */ 2 /* 3 * Copyright 2008 Advanced Micro Devices, Inc. 4 * Copyright 2008 Red Hat Inc. 5 * Copyright 2009 Jerome Glisse. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the "Software"), 9 * to deal in the Software without restriction, including without limitation 10 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 11 * and/or sell copies of the Software, and to permit persons to whom the 12 * Software is furnished to do so, subject to the following conditions: 13 * 14 * The above copyright notice and this permission notice shall be included in 15 * all copies or substantial portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 20 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 21 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 22 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 23 * OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: Dave Airlie 26 * Alex Deucher 27 * Jerome Glisse 28 */ 29 #ifndef __R600_REG_H__ 30 #define __R600_REG_H__ 31 32 #define R600_PCIE_PORT_INDEX 0x0038 33 #define R600_PCIE_PORT_DATA 0x003c 34 35 #define R600_MC_VM_FB_LOCATION 0x2180 36 #define R600_MC_FB_BASE_MASK 0x0000FFFF 37 #define R600_MC_FB_BASE_SHIFT 0 38 #define R600_MC_FB_TOP_MASK 0xFFFF0000 39 #define R600_MC_FB_TOP_SHIFT 16 40 #define R600_MC_VM_AGP_TOP 0x2184 41 #define R600_MC_AGP_TOP_MASK 0x0003FFFF 42 #define R600_MC_AGP_TOP_SHIFT 0 43 #define R600_MC_VM_AGP_BOT 0x2188 44 #define R600_MC_AGP_BOT_MASK 0x0003FFFF 45 #define R600_MC_AGP_BOT_SHIFT 0 46 #define R600_MC_VM_AGP_BASE 0x218c 47 #define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190 48 #define R600_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF 49 #define R600_LOGICAL_PAGE_NUMBER_SHIFT 0 50 #define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 51 #define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 52 53 #define R700_MC_VM_FB_LOCATION 0x2024 54 #define R700_MC_FB_BASE_MASK 0x0000FFFF 55 #define R700_MC_FB_BASE_SHIFT 0 56 #define R700_MC_FB_TOP_MASK 0xFFFF0000 57 #define R700_MC_FB_TOP_SHIFT 16 58 #define R700_MC_VM_AGP_TOP 0x2028 59 #define R700_MC_AGP_TOP_MASK 0x0003FFFF 60 #define R700_MC_AGP_TOP_SHIFT 0 61 #define R700_MC_VM_AGP_BOT 0x202c 62 #define R700_MC_AGP_BOT_MASK 0x0003FFFF 63 #define R700_MC_AGP_BOT_SHIFT 0 64 #define R700_MC_VM_AGP_BASE 0x2030 65 #define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034 66 #define R700_LOGICAL_PAGE_NUMBER_MASK 0x000FFFFF 67 #define R700_LOGICAL_PAGE_NUMBER_SHIFT 0 68 #define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038 69 #define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c 70 71 #define R600_RAMCFG 0x2408 72 # define R600_CHANSIZE (1 << 7) 73 # define R600_CHANSIZE_OVERRIDE (1 << 10) 74 75 76 #define R600_GENERAL_PWRMGT 0x618 77 # define R600_OPEN_DRAIN_PADS (1 << 11) 78 79 #define R600_LOWER_GPIO_ENABLE 0x710 80 #define R600_CTXSW_VID_LOWER_GPIO_CNTL 0x718 81 #define R600_HIGH_VID_LOWER_GPIO_CNTL 0x71c 82 #define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 83 #define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 84 85 #define R600_D1GRPH_SWAP_CONTROL 0x610C 86 # define R600_D1GRPH_SWAP_ENDIAN_NONE (0 << 0) 87 # define R600_D1GRPH_SWAP_ENDIAN_16BIT (1 << 0) 88 # define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0) 89 # define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0) 90 91 #define R600_HDP_NONSURFACE_BASE 0x2c04 92 93 #define R600_BUS_CNTL 0x5420 94 # define R600_BIOS_ROM_DIS (1 << 1) 95 #define R600_CONFIG_CNTL 0x5424 96 #define R600_CONFIG_MEMSIZE 0x5428 97 #define R600_CONFIG_F0_BASE 0x542C 98 #define R600_CONFIG_APER_SIZE 0x5430 99 100 #define R600_BIF_FB_EN 0x5490 101 #define R600_FB_READ_EN (1 << 0) 102 #define R600_FB_WRITE_EN (1 << 1) 103 104 #define R600_CITF_CNTL 0x200c 105 #define R600_BLACKOUT_MASK 0x00000003 106 107 #define R700_MC_CITF_CNTL 0x25c0 108 109 #define R600_ROM_CNTL 0x1600 110 # define R600_SCK_OVERWRITE (1 << 1) 111 # define R600_SCK_PRESCALE_CRYSTAL_CLK_SHIFT 28 112 # define R600_SCK_PRESCALE_CRYSTAL_CLK_MASK (0xf << 28) 113 114 #define R600_CG_SPLL_FUNC_CNTL 0x600 115 # define R600_SPLL_BYPASS_EN (1 << 3) 116 #define R600_CG_SPLL_STATUS 0x60c 117 # define R600_SPLL_CHG_STATUS (1 << 1) 118 119 #define R600_BIOS_0_SCRATCH 0x1724 120 #define R600_BIOS_1_SCRATCH 0x1728 121 #define R600_BIOS_2_SCRATCH 0x172c 122 #define R600_BIOS_3_SCRATCH 0x1730 123 #define R600_BIOS_4_SCRATCH 0x1734 124 #define R600_BIOS_5_SCRATCH 0x1738 125 #define R600_BIOS_6_SCRATCH 0x173c 126 #define R600_BIOS_7_SCRATCH 0x1740 127 128 /* Audio, these regs were reverse enginered, 129 * so the chance is high that the naming is wrong 130 * R6xx+ ??? */ 131 132 /* Audio clocks */ 133 #define R600_AUDIO_PLL1_MUL 0x0514 134 #define R600_AUDIO_PLL1_DIV 0x0518 135 #define R600_AUDIO_PLL2_MUL 0x0524 136 #define R600_AUDIO_PLL2_DIV 0x0528 137 #define R600_AUDIO_CLK_SRCSEL 0x0534 138 139 /* Audio general */ 140 #define R600_AUDIO_ENABLE 0x7300 141 #define R600_AUDIO_TIMING 0x7344 142 143 /* Audio params */ 144 #define R600_AUDIO_VENDOR_ID 0x7380 145 #define R600_AUDIO_REVISION_ID 0x7384 146 #define R600_AUDIO_ROOT_NODE_COUNT 0x7388 147 #define R600_AUDIO_NID1_NODE_COUNT 0x738c 148 #define R600_AUDIO_NID1_TYPE 0x7390 149 #define R600_AUDIO_SUPPORTED_SIZE_RATE 0x7394 150 #define R600_AUDIO_SUPPORTED_CODEC 0x7398 151 #define R600_AUDIO_SUPPORTED_POWER_STATES 0x739c 152 #define R600_AUDIO_NID2_CAPS 0x73a0 153 #define R600_AUDIO_NID3_CAPS 0x73a4 154 #define R600_AUDIO_NID3_PIN_CAPS 0x73a8 155 156 /* Audio conn list */ 157 #define R600_AUDIO_CONN_LIST_LEN 0x73ac 158 #define R600_AUDIO_CONN_LIST 0x73b0 159 160 /* Audio verbs */ 161 #define R600_AUDIO_RATE_BPS_CHANNEL 0x73c0 162 #define R600_AUDIO_PLAYING 0x73c4 163 #define R600_AUDIO_IMPLEMENTATION_ID 0x73c8 164 #define R600_AUDIO_CONFIG_DEFAULT 0x73cc 165 #define R600_AUDIO_PIN_SENSE 0x73d0 166 #define R600_AUDIO_PIN_WIDGET_CNTL 0x73d4 167 #define R600_AUDIO_STATUS_BITS 0x73d8 168 169 #define DCE2_HDMI_OFFSET0 (0x7400 - 0x7400) 170 #define DCE2_HDMI_OFFSET1 (0x7700 - 0x7400) 171 /* DCE3.2 second instance starts at 0x7800 */ 172 #define DCE3_HDMI_OFFSET0 (0x7400 - 0x7400) 173 #define DCE3_HDMI_OFFSET1 (0x7800 - 0x7400) 174 175 #endif 176