1 /** 2 * \file radeon_drv.c 3 * ATI Radeon driver 4 * 5 * \author Gareth Hughes <gareth@valinux.com> 6 */ 7 8 /* 9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 10 * All Rights Reserved. 11 * 12 * Permission is hereby granted, free of charge, to any person obtaining a 13 * copy of this software and associated documentation files (the "Software"), 14 * to deal in the Software without restriction, including without limitation 15 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 16 * and/or sell copies of the Software, and to permit persons to whom the 17 * Software is furnished to do so, subject to the following conditions: 18 * 19 * The above copyright notice and this permission notice (including the next 20 * paragraph) shall be included in all copies or substantial portions of the 21 * Software. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * OTHER DEALINGS IN THE SOFTWARE. 30 */ 31 32 #include <drm/drmP.h> 33 #include <drm/radeon_drm.h> 34 #include "radeon_drv.h" 35 #include "radeon.h" 36 37 #include <drm/drm_pciids.h> 38 #include <linux/console.h> 39 #include <linux/module.h> 40 #include <linux/pm_runtime.h> 41 #include <linux/vga_switcheroo.h> 42 #include <linux/compat.h> 43 #include <drm/drm_gem.h> 44 #include <drm/drm_fb_helper.h> 45 46 #include <drm/drm_crtc_helper.h> 47 #include "radeon_kfd.h" 48 49 /* 50 * KMS wrapper. 51 * - 2.0.0 - initial interface 52 * - 2.1.0 - add square tiling interface 53 * - 2.2.0 - add r6xx/r7xx const buffer support 54 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 55 * - 2.4.0 - add crtc id query 56 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 57 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) 58 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs 59 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query 60 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query 61 * 2.10.0 - fusion 2D tiling 62 * 2.11.0 - backend map, initial compute support for the CS checker 63 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS 64 * 2.13.0 - virtual memory support, streamout 65 * 2.14.0 - add evergreen tiling informations 66 * 2.15.0 - add max_pipes query 67 * 2.16.0 - fix evergreen 2D tiled surface calculation 68 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx 69 * 2.18.0 - r600-eg: allow "invalid" DB formats 70 * 2.19.0 - r600-eg: MSAA textures 71 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query 72 * 2.21.0 - r600-r700: FMASK and CMASK 73 * 2.22.0 - r600 only: RESOLVE_BOX allowed 74 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880 75 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures 76 * 2.25.0 - eg+: new info request for num SE and num SH 77 * 2.26.0 - r600-eg: fix htile size computation 78 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA 79 * 2.28.0 - r600-eg: Add MEM_WRITE packet support 80 * 2.29.0 - R500 FP16 color clear registers 81 * 2.30.0 - fix for FMASK texturing 82 * 2.31.0 - Add fastfb support for rs690 83 * 2.32.0 - new info request for rings working 84 * 2.33.0 - Add SI tiling mode array query 85 * 2.34.0 - Add CIK tiling mode array query 86 * 2.35.0 - Add CIK macrotile mode array query 87 * 2.36.0 - Fix CIK DCE tiling setup 88 * 2.37.0 - allow GS ring setup on r6xx/r7xx 89 * 2.38.0 - RADEON_GEM_OP (GET_INITIAL_DOMAIN, SET_INITIAL_DOMAIN), 90 * CIK: 1D and linear tiling modes contain valid PIPE_CONFIG 91 * 2.39.0 - Add INFO query for number of active CUs 92 * 2.40.0 - Add RADEON_GEM_GTT_WC/UC, flush HDP cache before submitting 93 * CS to GPU on >= r600 94 * 2.41.0 - evergreen/cayman: Add SET_BASE/DRAW_INDIRECT command parsing support 95 * 2.42.0 - Add VCE/VUI (Video Usability Information) support 96 * 2.43.0 - RADEON_INFO_GPU_RESET_COUNTER 97 * 2.44.0 - SET_APPEND_CNT packet3 support 98 * 2.45.0 - Allow setting shader registers using DMA/COPY packet3 on SI 99 * 2.46.0 - Add PFP_SYNC_ME support on evergreen 100 * 2.47.0 - Add UVD_NO_OP register support 101 * 2.48.0 - TA_CS_BC_BASE_ADDR allowed on SI 102 * 2.49.0 - DRM_RADEON_GEM_INFO ioctl returns correct vram_size/visible values 103 * 2.50.0 - Allows unaligned shader loads on CIK. (needed by OpenGL) 104 */ 105 #define KMS_DRIVER_MAJOR 2 106 #define KMS_DRIVER_MINOR 50 107 #define KMS_DRIVER_PATCHLEVEL 0 108 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 109 void radeon_driver_unload_kms(struct drm_device *dev); 110 void radeon_driver_lastclose_kms(struct drm_device *dev); 111 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); 112 void radeon_driver_postclose_kms(struct drm_device *dev, 113 struct drm_file *file_priv); 114 int radeon_suspend_kms(struct drm_device *dev, bool suspend, 115 bool fbcon, bool freeze); 116 int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); 117 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, unsigned int pipe); 118 int radeon_enable_vblank_kms(struct drm_device *dev, unsigned int pipe); 119 void radeon_disable_vblank_kms(struct drm_device *dev, unsigned int pipe); 120 void radeon_driver_irq_preinstall_kms(struct drm_device *dev); 121 int radeon_driver_irq_postinstall_kms(struct drm_device *dev); 122 void radeon_driver_irq_uninstall_kms(struct drm_device *dev); 123 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg); 124 void radeon_gem_object_free(struct drm_gem_object *obj); 125 int radeon_gem_object_open(struct drm_gem_object *obj, 126 struct drm_file *file_priv); 127 void radeon_gem_object_close(struct drm_gem_object *obj, 128 struct drm_file *file_priv); 129 struct dma_buf *radeon_gem_prime_export(struct drm_device *dev, 130 struct drm_gem_object *gobj, 131 int flags); 132 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, unsigned int crtc, 133 unsigned int flags, int *vpos, int *hpos, 134 ktime_t *stime, ktime_t *etime, 135 const struct drm_display_mode *mode); 136 extern bool radeon_is_px(struct drm_device *dev); 137 extern const struct drm_ioctl_desc radeon_ioctls_kms[]; 138 extern int radeon_max_kms_ioctl; 139 extern struct uvm_object *radeon_mmap(struct drm_device *, voff_t, vsize_t); 140 int radeon_mode_dumb_mmap(struct drm_file *filp, 141 struct drm_device *dev, 142 uint32_t handle, uint64_t *offset_p); 143 int radeon_mode_dumb_create(struct drm_file *file_priv, 144 struct drm_device *dev, 145 struct drm_mode_create_dumb *args); 146 #ifdef notyet 147 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj); 148 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev, 149 struct dma_buf_attachment *, 150 struct sg_table *sg); 151 int radeon_gem_prime_pin(struct drm_gem_object *obj); 152 void radeon_gem_prime_unpin(struct drm_gem_object *obj); 153 #endif 154 struct reservation_object *radeon_gem_prime_res_obj(struct drm_gem_object *); 155 #ifdef notyet 156 void *radeon_gem_prime_vmap(struct drm_gem_object *obj); 157 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr); 158 #endif 159 160 /* atpx handler */ 161 #if defined(CONFIG_VGA_SWITCHEROO) 162 void radeon_register_atpx_handler(void); 163 void radeon_unregister_atpx_handler(void); 164 bool radeon_has_atpx_dgpu_power_cntl(void); 165 bool radeon_is_atpx_hybrid(void); 166 #else 167 #ifdef notyet 168 static inline void radeon_register_atpx_handler(void) {} 169 static inline void radeon_unregister_atpx_handler(void) {} 170 static inline bool radeon_has_atpx_dgpu_power_cntl(void) { return false; } 171 static inline bool radeon_is_atpx_hybrid(void) { return false; } 172 #endif 173 #endif 174 175 int radeon_no_wb; 176 int radeon_modeset = -1; 177 int radeon_dynclks = -1; 178 int radeon_r4xx_atom = 0; 179 #ifdef __powerpc__ 180 /* Default to PCI on PowerPC (fdo #95017) */ 181 int radeon_agpmode = -1; 182 #else 183 int radeon_agpmode = 0; 184 #endif 185 int radeon_vram_limit = 0; 186 int radeon_gart_size = -1; /* auto */ 187 int radeon_benchmarking = 0; 188 int radeon_testing = 0; 189 int radeon_connector_table = 0; 190 int radeon_tv = 1; 191 int radeon_audio = -1; 192 int radeon_disp_priority = 0; 193 int radeon_hw_i2c = 0; 194 int radeon_pcie_gen2 = -1; 195 int radeon_msi = -1; 196 int radeon_lockup_timeout = 10000; 197 int radeon_fastfb = 0; 198 int radeon_dpm = -1; 199 int radeon_aspm = -1; 200 int radeon_runtime_pm = -1; 201 int radeon_hard_reset = 0; 202 int radeon_vm_size = 8; 203 int radeon_vm_block_size = -1; 204 int radeon_deep_color = 0; 205 int radeon_use_pflipirq = 2; 206 int radeon_bapm = -1; 207 int radeon_backlight = -1; 208 int radeon_auxch = -1; 209 int radeon_mst = 0; 210 int radeon_uvd = 1; 211 int radeon_vce = 1; 212 213 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers"); 214 module_param_named(no_wb, radeon_no_wb, int, 0444); 215 216 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 217 module_param_named(modeset, radeon_modeset, int, 0400); 218 219 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks"); 220 module_param_named(dynclks, radeon_dynclks, int, 0444); 221 222 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx"); 223 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444); 224 225 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes"); 226 module_param_named(vramlimit, radeon_vram_limit, int, 0600); 227 228 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)"); 229 module_param_named(agpmode, radeon_agpmode, int, 0444); 230 231 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)"); 232 module_param_named(gartsize, radeon_gart_size, int, 0600); 233 234 MODULE_PARM_DESC(benchmark, "Run benchmark"); 235 module_param_named(benchmark, radeon_benchmarking, int, 0444); 236 237 MODULE_PARM_DESC(test, "Run tests"); 238 module_param_named(test, radeon_testing, int, 0444); 239 240 MODULE_PARM_DESC(connector_table, "Force connector table"); 241 module_param_named(connector_table, radeon_connector_table, int, 0444); 242 243 MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); 244 module_param_named(tv, radeon_tv, int, 0444); 245 246 MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)"); 247 module_param_named(audio, radeon_audio, int, 0444); 248 249 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); 250 module_param_named(disp_priority, radeon_disp_priority, int, 0444); 251 252 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)"); 253 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444); 254 255 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)"); 256 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444); 257 258 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)"); 259 module_param_named(msi, radeon_msi, int, 0444); 260 261 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (default 10000 = 10 seconds, 0 = disable)"); 262 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444); 263 264 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)"); 265 module_param_named(fastfb, radeon_fastfb, int, 0444); 266 267 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)"); 268 module_param_named(dpm, radeon_dpm, int, 0444); 269 270 MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)"); 271 module_param_named(aspm, radeon_aspm, int, 0444); 272 273 MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)"); 274 module_param_named(runpm, radeon_runtime_pm, int, 0444); 275 276 MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); 277 module_param_named(hard_reset, radeon_hard_reset, int, 0444); 278 279 MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); 280 module_param_named(vm_size, radeon_vm_size, int, 0444); 281 282 MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)"); 283 module_param_named(vm_block_size, radeon_vm_block_size, int, 0444); 284 285 MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))"); 286 module_param_named(deep_color, radeon_deep_color, int, 0444); 287 288 MODULE_PARM_DESC(use_pflipirq, "Pflip irqs for pageflip completion (0 = disable, 1 = as fallback, 2 = exclusive (default))"); 289 module_param_named(use_pflipirq, radeon_use_pflipirq, int, 0444); 290 291 MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)"); 292 module_param_named(bapm, radeon_bapm, int, 0444); 293 294 MODULE_PARM_DESC(backlight, "backlight support (1 = enable, 0 = disable, -1 = auto)"); 295 module_param_named(backlight, radeon_backlight, int, 0444); 296 297 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)"); 298 module_param_named(auxch, radeon_auxch, int, 0444); 299 300 MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)"); 301 module_param_named(mst, radeon_mst, int, 0444); 302 303 MODULE_PARM_DESC(uvd, "uvd enable/disable uvd support (1 = enable, 0 = disable)"); 304 module_param_named(uvd, radeon_uvd, int, 0444); 305 306 MODULE_PARM_DESC(vce, "vce enable/disable vce support (1 = enable, 0 = disable)"); 307 module_param_named(vce, radeon_vce, int, 0444); 308 309 int radeon_si_support = 1; 310 MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)"); 311 module_param_named(si_support, radeon_si_support, int, 0444); 312 313 int radeon_cik_support = 1; 314 MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)"); 315 module_param_named(cik_support, radeon_cik_support, int, 0444); 316 317 const struct drm_pcidev radeondrm_pciidlist[] = { 318 radeon_PCI_IDS 319 }; 320 321 MODULE_DEVICE_TABLE(pci, pciidlist); 322 323 #ifdef notyet 324 static struct drm_driver kms_driver; 325 #endif 326 327 bool radeon_device_is_virtual(void); 328 329 #ifdef notyet 330 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) 331 { 332 struct apertures_struct *ap; 333 bool primary = false; 334 335 ap = alloc_apertures(1); 336 if (!ap) 337 return -ENOMEM; 338 339 ap->ranges[0].base = pci_resource_start(pdev, 0); 340 ap->ranges[0].size = pci_resource_len(pdev, 0); 341 342 #ifdef CONFIG_X86 343 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; 344 #endif 345 drm_fb_helper_remove_conflicting_framebuffers(ap, "radeondrmfb", primary); 346 kfree(ap); 347 348 return 0; 349 } 350 #endif 351 352 #ifdef __linux__ 353 static int radeon_pci_probe(struct pci_dev *pdev, 354 const struct pci_device_id *ent) 355 { 356 unsigned long flags = 0; 357 int ret; 358 359 if (!ent) 360 return -ENODEV; /* Avoid NULL-ptr deref in drm_get_pci_dev */ 361 362 flags = ent->driver_data; 363 364 if (!radeon_si_support) { 365 switch (flags & RADEON_FAMILY_MASK) { 366 case CHIP_TAHITI: 367 case CHIP_PITCAIRN: 368 case CHIP_VERDE: 369 case CHIP_OLAND: 370 case CHIP_HAINAN: 371 dev_info(&pdev->dev, 372 "SI support disabled by module param\n"); 373 return -ENODEV; 374 } 375 } 376 if (!radeon_cik_support) { 377 switch (flags & RADEON_FAMILY_MASK) { 378 case CHIP_KAVERI: 379 case CHIP_BONAIRE: 380 case CHIP_HAWAII: 381 case CHIP_KABINI: 382 case CHIP_MULLINS: 383 dev_info(&pdev->dev, 384 "CIK support disabled by module param\n"); 385 return -ENODEV; 386 } 387 } 388 389 if (vga_switcheroo_client_probe_defer(pdev)) 390 return -EPROBE_DEFER; 391 392 /* Get rid of things like offb */ 393 ret = radeon_kick_out_firmware_fb(pdev); 394 if (ret) 395 return ret; 396 397 return drm_get_pci_dev(pdev, ent, &kms_driver); 398 } 399 400 static void 401 radeon_pci_remove(struct pci_dev *pdev) 402 { 403 struct drm_device *dev = pci_get_drvdata(pdev); 404 405 drm_put_dev(dev); 406 } 407 408 static void 409 radeon_pci_shutdown(struct pci_dev *pdev) 410 { 411 /* if we are running in a VM, make sure the device 412 * torn down properly on reboot/shutdown 413 */ 414 if (radeon_device_is_virtual()) 415 radeon_pci_remove(pdev); 416 } 417 418 static int radeon_pmops_suspend(struct device *dev) 419 { 420 struct pci_dev *pdev = to_pci_dev(dev); 421 struct drm_device *drm_dev = pci_get_drvdata(pdev); 422 return radeon_suspend_kms(drm_dev, true, true, false); 423 } 424 425 static int radeon_pmops_resume(struct device *dev) 426 { 427 struct pci_dev *pdev = to_pci_dev(dev); 428 struct drm_device *drm_dev = pci_get_drvdata(pdev); 429 430 /* GPU comes up enabled by the bios on resume */ 431 if (radeon_is_px(drm_dev)) { 432 pm_runtime_disable(dev); 433 pm_runtime_set_active(dev); 434 pm_runtime_enable(dev); 435 } 436 437 return radeon_resume_kms(drm_dev, true, true); 438 } 439 440 static int radeon_pmops_freeze(struct device *dev) 441 { 442 struct pci_dev *pdev = to_pci_dev(dev); 443 struct drm_device *drm_dev = pci_get_drvdata(pdev); 444 return radeon_suspend_kms(drm_dev, false, true, true); 445 } 446 447 static int radeon_pmops_thaw(struct device *dev) 448 { 449 struct pci_dev *pdev = to_pci_dev(dev); 450 struct drm_device *drm_dev = pci_get_drvdata(pdev); 451 return radeon_resume_kms(drm_dev, false, true); 452 } 453 454 static int radeon_pmops_runtime_suspend(struct device *dev) 455 { 456 struct pci_dev *pdev = to_pci_dev(dev); 457 struct drm_device *drm_dev = pci_get_drvdata(pdev); 458 int ret; 459 460 if (!radeon_is_px(drm_dev)) { 461 pm_runtime_forbid(dev); 462 return -EBUSY; 463 } 464 465 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 466 drm_kms_helper_poll_disable(drm_dev); 467 468 ret = radeon_suspend_kms(drm_dev, false, false, false); 469 pci_save_state(pdev); 470 pci_disable_device(pdev); 471 pci_ignore_hotplug(pdev); 472 if (radeon_is_atpx_hybrid()) 473 pci_set_power_state(pdev, PCI_D3cold); 474 else if (!radeon_has_atpx_dgpu_power_cntl()) 475 pci_set_power_state(pdev, PCI_D3hot); 476 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; 477 478 return 0; 479 } 480 481 static int radeon_pmops_runtime_resume(struct device *dev) 482 { 483 struct pci_dev *pdev = to_pci_dev(dev); 484 struct drm_device *drm_dev = pci_get_drvdata(pdev); 485 int ret; 486 487 if (!radeon_is_px(drm_dev)) 488 return -EINVAL; 489 490 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; 491 492 if (radeon_is_atpx_hybrid() || 493 !radeon_has_atpx_dgpu_power_cntl()) 494 pci_set_power_state(pdev, PCI_D0); 495 pci_restore_state(pdev); 496 ret = pci_enable_device(pdev); 497 if (ret) 498 return ret; 499 pci_set_master(pdev); 500 501 ret = radeon_resume_kms(drm_dev, false, false); 502 drm_kms_helper_poll_enable(drm_dev); 503 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; 504 return 0; 505 } 506 507 static int radeon_pmops_runtime_idle(struct device *dev) 508 { 509 struct pci_dev *pdev = to_pci_dev(dev); 510 struct drm_device *drm_dev = pci_get_drvdata(pdev); 511 struct drm_crtc *crtc; 512 513 if (!radeon_is_px(drm_dev)) { 514 pm_runtime_forbid(dev); 515 return -EBUSY; 516 } 517 518 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) { 519 if (crtc->enabled) { 520 DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); 521 return -EBUSY; 522 } 523 } 524 525 pm_runtime_mark_last_busy(dev); 526 pm_runtime_autosuspend(dev); 527 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ 528 return 1; 529 } 530 531 long radeon_drm_ioctl(struct file *filp, 532 unsigned int cmd, unsigned long arg) 533 { 534 struct drm_file *file_priv = filp->private_data; 535 struct drm_device *dev; 536 long ret; 537 dev = file_priv->minor->dev; 538 ret = pm_runtime_get_sync(dev->dev); 539 if (ret < 0) 540 return ret; 541 542 ret = drm_ioctl(filp, cmd, arg); 543 544 pm_runtime_mark_last_busy(dev->dev); 545 pm_runtime_put_autosuspend(dev->dev); 546 return ret; 547 } 548 549 #ifdef CONFIG_COMPAT 550 static long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) 551 { 552 unsigned int nr = DRM_IOCTL_NR(cmd); 553 int ret; 554 555 if (nr < DRM_COMMAND_BASE) 556 return drm_compat_ioctl(filp, cmd, arg); 557 558 ret = radeon_drm_ioctl(filp, cmd, arg); 559 560 return ret; 561 } 562 #endif 563 564 static const struct dev_pm_ops radeon_pm_ops = { 565 .suspend = radeon_pmops_suspend, 566 .resume = radeon_pmops_resume, 567 .freeze = radeon_pmops_freeze, 568 .thaw = radeon_pmops_thaw, 569 .poweroff = radeon_pmops_freeze, 570 .restore = radeon_pmops_resume, 571 .runtime_suspend = radeon_pmops_runtime_suspend, 572 .runtime_resume = radeon_pmops_runtime_resume, 573 .runtime_idle = radeon_pmops_runtime_idle, 574 }; 575 576 static const struct file_operations radeon_driver_kms_fops = { 577 .owner = THIS_MODULE, 578 .open = drm_open, 579 .release = drm_release, 580 .unlocked_ioctl = radeon_drm_ioctl, 581 .mmap = radeon_mmap, 582 .poll = drm_poll, 583 .read = drm_read, 584 #ifdef CONFIG_COMPAT 585 .compat_ioctl = radeon_kms_compat_ioctl, 586 #endif 587 }; 588 #endif /* __linux__ */ 589 590 static bool 591 radeon_get_crtc_scanout_position(struct drm_device *dev, unsigned int pipe, 592 bool in_vblank_irq, int *vpos, int *hpos, 593 ktime_t *stime, ktime_t *etime, 594 const struct drm_display_mode *mode) 595 { 596 return radeon_get_crtc_scanoutpos(dev, pipe, 0, vpos, hpos, 597 stime, etime, mode); 598 } 599 600 struct drm_driver kms_driver = { 601 .driver_features = 602 DRIVER_USE_AGP | 603 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | 604 DRIVER_PRIME | DRIVER_RENDER, 605 #ifdef notyet 606 .load = radeon_driver_load_kms, 607 #endif 608 .open = radeon_driver_open_kms, 609 .mmap = radeon_mmap, 610 .postclose = radeon_driver_postclose_kms, 611 .lastclose = radeon_driver_lastclose_kms, 612 #ifdef notyet 613 .unload = radeon_driver_unload_kms, 614 #endif 615 .get_vblank_counter = radeon_get_vblank_counter_kms, 616 .enable_vblank = radeon_enable_vblank_kms, 617 .disable_vblank = radeon_disable_vblank_kms, 618 .get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos, 619 .get_scanout_position = radeon_get_crtc_scanout_position, 620 .irq_preinstall = radeon_driver_irq_preinstall_kms, 621 .irq_postinstall = radeon_driver_irq_postinstall_kms, 622 .irq_uninstall = radeon_driver_irq_uninstall_kms, 623 .irq_handler = radeon_driver_irq_handler_kms, 624 .ioctls = radeon_ioctls_kms, 625 .gem_free_object_unlocked = radeon_gem_object_free, 626 .gem_open_object = radeon_gem_object_open, 627 .gem_close_object = radeon_gem_object_close, 628 .gem_size = sizeof(struct radeon_bo), 629 .dumb_create = radeon_mode_dumb_create, 630 .dumb_map_offset = radeon_mode_dumb_mmap, 631 #ifdef __linux__ 632 .fops = &radeon_driver_kms_fops, 633 #endif 634 635 .prime_handle_to_fd = drm_gem_prime_handle_to_fd, 636 .prime_fd_to_handle = drm_gem_prime_fd_to_handle, 637 .gem_prime_export = radeon_gem_prime_export, 638 .gem_prime_import = drm_gem_prime_import, 639 #ifdef notyet 640 .gem_prime_pin = radeon_gem_prime_pin, 641 .gem_prime_unpin = radeon_gem_prime_unpin, 642 #endif 643 .gem_prime_res_obj = radeon_gem_prime_res_obj, 644 #ifdef notyet 645 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table, 646 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table, 647 .gem_prime_vmap = radeon_gem_prime_vmap, 648 .gem_prime_vunmap = radeon_gem_prime_vunmap, 649 #endif 650 651 .name = DRIVER_NAME, 652 .desc = DRIVER_DESC, 653 .date = DRIVER_DATE, 654 .major = KMS_DRIVER_MAJOR, 655 .minor = KMS_DRIVER_MINOR, 656 .patchlevel = KMS_DRIVER_PATCHLEVEL, 657 }; 658 659 #ifdef notyet 660 static struct drm_driver *driver; 661 #endif 662 #ifdef __linux__ 663 static struct pci_driver *pdriver; 664 665 static struct pci_driver radeon_kms_pci_driver = { 666 .name = DRIVER_NAME, 667 .id_table = pciidlist, 668 .probe = radeon_pci_probe, 669 .remove = radeon_pci_remove, 670 .shutdown = radeon_pci_shutdown, 671 .driver.pm = &radeon_pm_ops, 672 }; 673 #endif /* __linux__ */ 674 675 #ifdef notyet 676 static int __init radeon_init(void) 677 { 678 if (vgacon_text_force() && radeon_modeset == -1) { 679 DRM_INFO("VGACON disable radeon kernel modesetting.\n"); 680 radeon_modeset = 0; 681 } 682 /* set to modesetting by default if not nomodeset */ 683 if (radeon_modeset == -1) 684 radeon_modeset = 1; 685 686 if (radeon_modeset == 1) { 687 DRM_INFO("radeon kernel modesetting enabled.\n"); 688 driver = &kms_driver; 689 #ifdef __linux__ 690 pdriver = &radeon_kms_pci_driver; 691 #endif 692 driver->driver_features |= DRIVER_MODESET; 693 driver->num_ioctls = radeon_max_kms_ioctl; 694 radeon_register_atpx_handler(); 695 696 } else { 697 DRM_ERROR("No UMS support in radeon module!\n"); 698 return -EINVAL; 699 } 700 701 #ifdef notyet 702 return pci_register_driver(pdriver); 703 #else 704 STUB(); 705 return -ENOSYS; 706 #endif 707 } 708 709 static void __exit radeon_exit(void) 710 { 711 STUB(); 712 #ifdef notyet 713 pci_unregister_driver(pdriver); 714 #endif 715 radeon_unregister_atpx_handler(); 716 } 717 #endif 718 719 module_init(radeon_init); 720 module_exit(radeon_exit); 721 722 MODULE_AUTHOR(DRIVER_AUTHOR); 723 MODULE_DESCRIPTION(DRIVER_DESC); 724 MODULE_LICENSE("GPL and additional rights"); 725