xref: /openbsd/sys/dev/pci/drm/radeon/radeon_test.c (revision f3eef2b6)
1 /*	$OpenBSD: radeon_test.c,v 1.6 2018/04/20 16:09:37 deraadt Exp $	*/
2 /*
3  * Copyright 2009 VMware, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice shall be included in
13  * all copies or substantial portions of the Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21  * OTHER DEALINGS IN THE SOFTWARE.
22  *
23  * Authors: Michel Dänzer
24  */
25 #include <dev/pci/drm/drmP.h>
26 #include <dev/pci/drm/radeon_drm.h>
27 #include "radeon_reg.h"
28 #include "radeon.h"
29 
30 #define RADEON_TEST_COPY_BLIT 1
31 #define RADEON_TEST_COPY_DMA  0
32 
33 
34 /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
35 static void radeon_do_test_moves(struct radeon_device *rdev, int flag)
36 {
37 	struct radeon_bo *vram_obj = NULL;
38 	struct radeon_bo **gtt_obj = NULL;
39 	struct radeon_fence *fence = NULL;
40 	uint64_t gtt_addr, vram_addr;
41 	unsigned n, size;
42 	int i, r, ring;
43 
44 	switch (flag) {
45 	case RADEON_TEST_COPY_DMA:
46 		ring = radeon_copy_dma_ring_index(rdev);
47 		break;
48 	case RADEON_TEST_COPY_BLIT:
49 		ring = radeon_copy_blit_ring_index(rdev);
50 		break;
51 	default:
52 		DRM_ERROR("Unknown copy method\n");
53 		return;
54 	}
55 
56 	size = 1024 * 1024;
57 
58 	/* Number of tests =
59 	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
60 	 */
61 	n = rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024;
62 	for (i = 0; i < RADEON_NUM_RINGS; ++i)
63 		n -= rdev->ring[i].ring_size;
64 	if (rdev->wb.wb_obj)
65 		n -= RADEON_GPU_PAGE_SIZE;
66 	if (rdev->ih.ring_obj)
67 		n -= rdev->ih.ring_size;
68 	n /= size;
69 
70 	gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
71 	if (!gtt_obj) {
72 		DRM_ERROR("Failed to allocate %d pointers\n", n);
73 		r = 1;
74 		goto out_cleanup;
75 	}
76 
77 	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
78 			     NULL, &vram_obj);
79 	if (r) {
80 		DRM_ERROR("Failed to create VRAM object\n");
81 		goto out_cleanup;
82 	}
83 	r = radeon_bo_reserve(vram_obj, false);
84 	if (unlikely(r != 0))
85 		goto out_cleanup;
86 	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
87 	if (r) {
88 		DRM_ERROR("Failed to pin VRAM object\n");
89 		goto out_cleanup;
90 	}
91 	for (i = 0; i < n; i++) {
92 		void *gtt_map, *vram_map;
93 		void **gtt_start, **gtt_end;
94 		void **vram_start, **vram_end;
95 
96 		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
97 				     RADEON_GEM_DOMAIN_GTT, NULL, gtt_obj + i);
98 		if (r) {
99 			DRM_ERROR("Failed to create GTT object %d\n", i);
100 			goto out_cleanup;
101 		}
102 
103 		r = radeon_bo_reserve(gtt_obj[i], false);
104 		if (unlikely(r != 0))
105 			goto out_cleanup;
106 		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
107 		if (r) {
108 			DRM_ERROR("Failed to pin GTT object %d\n", i);
109 			goto out_cleanup;
110 		}
111 
112 		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
113 		if (r) {
114 			DRM_ERROR("Failed to map GTT object %d\n", i);
115 			goto out_cleanup;
116 		}
117 
118 		for (gtt_start = gtt_map, gtt_end = gtt_map + size;
119 		     gtt_start < gtt_end;
120 		     gtt_start++)
121 			*gtt_start = gtt_start;
122 
123 		radeon_bo_kunmap(gtt_obj[i]);
124 
125 		if (ring == R600_RING_TYPE_DMA_INDEX)
126 			r = radeon_copy_dma(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
127 		else
128 			r = radeon_copy_blit(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
129 		if (r) {
130 			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
131 			goto out_cleanup;
132 		}
133 
134 		r = radeon_fence_wait(fence, false);
135 		if (r) {
136 			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
137 			goto out_cleanup;
138 		}
139 
140 		radeon_fence_unref(&fence);
141 
142 		r = radeon_bo_kmap(vram_obj, &vram_map);
143 		if (r) {
144 			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
145 			goto out_cleanup;
146 		}
147 
148 		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
149 		     vram_start = vram_map, vram_end = vram_map + size;
150 		     vram_start < vram_end;
151 		     gtt_start++, vram_start++) {
152 			if (*vram_start != gtt_start) {
153 				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
154 					  "expected 0x%p (GTT/VRAM offset "
155 					  "0x%16llx/0x%16llx)\n",
156 					  i, *vram_start, gtt_start,
157 					  (unsigned long long)
158 					  (gtt_addr - rdev->mc.gtt_start +
159 					   (void*)gtt_start - gtt_map),
160 					  (unsigned long long)
161 					  (vram_addr - rdev->mc.vram_start +
162 					   (void*)gtt_start - gtt_map));
163 				radeon_bo_kunmap(vram_obj);
164 				goto out_cleanup;
165 			}
166 			*vram_start = vram_start;
167 		}
168 
169 		radeon_bo_kunmap(vram_obj);
170 
171 		if (ring == R600_RING_TYPE_DMA_INDEX)
172 			r = radeon_copy_dma(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
173 		else
174 			r = radeon_copy_blit(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, &fence);
175 		if (r) {
176 			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
177 			goto out_cleanup;
178 		}
179 
180 		r = radeon_fence_wait(fence, false);
181 		if (r) {
182 			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
183 			goto out_cleanup;
184 		}
185 
186 		radeon_fence_unref(&fence);
187 
188 		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
189 		if (r) {
190 			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
191 			goto out_cleanup;
192 		}
193 
194 		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
195 		     vram_start = vram_map, vram_end = vram_map + size;
196 		     gtt_start < gtt_end;
197 		     gtt_start++, vram_start++) {
198 			if (*gtt_start != vram_start) {
199 				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
200 					  "expected 0x%p (VRAM/GTT offset "
201 					  "0x%16llx/0x%16llx)\n",
202 					  i, *gtt_start, vram_start,
203 					  (unsigned long long)
204 					  (vram_addr - rdev->mc.vram_start +
205 					   (void*)vram_start - vram_map),
206 					  (unsigned long long)
207 					  (gtt_addr - rdev->mc.gtt_start +
208 					   (void*)vram_start - vram_map));
209 				radeon_bo_kunmap(gtt_obj[i]);
210 				goto out_cleanup;
211 			}
212 		}
213 
214 		radeon_bo_kunmap(gtt_obj[i]);
215 
216 		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
217 			 gtt_addr - rdev->mc.gtt_start);
218 	}
219 
220 out_cleanup:
221 	if (vram_obj) {
222 		if (radeon_bo_is_reserved(vram_obj)) {
223 			radeon_bo_unpin(vram_obj);
224 			radeon_bo_unreserve(vram_obj);
225 		}
226 		radeon_bo_unref(&vram_obj);
227 	}
228 	if (gtt_obj) {
229 		for (i = 0; i < n; i++) {
230 			if (gtt_obj[i]) {
231 				if (radeon_bo_is_reserved(gtt_obj[i])) {
232 					radeon_bo_unpin(gtt_obj[i]);
233 					radeon_bo_unreserve(gtt_obj[i]);
234 				}
235 				radeon_bo_unref(&gtt_obj[i]);
236 			}
237 		}
238 		kfree(gtt_obj);
239 	}
240 	if (fence) {
241 		radeon_fence_unref(&fence);
242 	}
243 	if (r) {
244 		printk(KERN_WARNING "Error while testing BO move.\n");
245 	}
246 }
247 
248 void radeon_test_moves(struct radeon_device *rdev)
249 {
250 	if (rdev->asic->copy.dma)
251 		radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
252 	if (rdev->asic->copy.blit)
253 		radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
254 }
255 
256 void radeon_test_ring_sync(struct radeon_device *rdev,
257 			   struct radeon_ring *ringA,
258 			   struct radeon_ring *ringB)
259 {
260 	struct radeon_fence *fence1 = NULL, *fence2 = NULL;
261 	struct radeon_semaphore *semaphore = NULL;
262 	int r;
263 
264 	r = radeon_semaphore_create(rdev, &semaphore);
265 	if (r) {
266 		DRM_ERROR("Failed to create semaphore\n");
267 		goto out_cleanup;
268 	}
269 
270 	r = radeon_ring_lock(rdev, ringA, 64);
271 	if (r) {
272 		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
273 		goto out_cleanup;
274 	}
275 	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
276 	r = radeon_fence_emit(rdev, &fence1, ringA->idx);
277 	if (r) {
278 		DRM_ERROR("Failed to emit fence 1\n");
279 		radeon_ring_unlock_undo(rdev, ringA);
280 		goto out_cleanup;
281 	}
282 	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
283 	r = radeon_fence_emit(rdev, &fence2, ringA->idx);
284 	if (r) {
285 		DRM_ERROR("Failed to emit fence 2\n");
286 		radeon_ring_unlock_undo(rdev, ringA);
287 		goto out_cleanup;
288 	}
289 	radeon_ring_unlock_commit(rdev, ringA);
290 
291 	mdelay(1000);
292 
293 	if (radeon_fence_signaled(fence1)) {
294 		DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
295 		goto out_cleanup;
296 	}
297 
298 	r = radeon_ring_lock(rdev, ringB, 64);
299 	if (r) {
300 		DRM_ERROR("Failed to lock ring B %p\n", ringB);
301 		goto out_cleanup;
302 	}
303 	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
304 	radeon_ring_unlock_commit(rdev, ringB);
305 
306 	r = radeon_fence_wait(fence1, false);
307 	if (r) {
308 		DRM_ERROR("Failed to wait for sync fence 1\n");
309 		goto out_cleanup;
310 	}
311 
312 	mdelay(1000);
313 
314 	if (radeon_fence_signaled(fence2)) {
315 		DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
316 		goto out_cleanup;
317 	}
318 
319 	r = radeon_ring_lock(rdev, ringB, 64);
320 	if (r) {
321 		DRM_ERROR("Failed to lock ring B %p\n", ringB);
322 		goto out_cleanup;
323 	}
324 	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
325 	radeon_ring_unlock_commit(rdev, ringB);
326 
327 	r = radeon_fence_wait(fence2, false);
328 	if (r) {
329 		DRM_ERROR("Failed to wait for sync fence 1\n");
330 		goto out_cleanup;
331 	}
332 
333 out_cleanup:
334 	radeon_semaphore_free(rdev, &semaphore, NULL);
335 
336 	if (fence1)
337 		radeon_fence_unref(&fence1);
338 
339 	if (fence2)
340 		radeon_fence_unref(&fence2);
341 
342 	if (r)
343 		printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
344 }
345 
346 static void radeon_test_ring_sync2(struct radeon_device *rdev,
347 			    struct radeon_ring *ringA,
348 			    struct radeon_ring *ringB,
349 			    struct radeon_ring *ringC)
350 {
351 	struct radeon_fence *fenceA = NULL, *fenceB = NULL;
352 	struct radeon_semaphore *semaphore = NULL;
353 	bool sigA, sigB;
354 	int i, r;
355 
356 	r = radeon_semaphore_create(rdev, &semaphore);
357 	if (r) {
358 		DRM_ERROR("Failed to create semaphore\n");
359 		goto out_cleanup;
360 	}
361 
362 	r = radeon_ring_lock(rdev, ringA, 64);
363 	if (r) {
364 		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
365 		goto out_cleanup;
366 	}
367 	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
368 	r = radeon_fence_emit(rdev, &fenceA, ringA->idx);
369 	if (r) {
370 		DRM_ERROR("Failed to emit sync fence 1\n");
371 		radeon_ring_unlock_undo(rdev, ringA);
372 		goto out_cleanup;
373 	}
374 	radeon_ring_unlock_commit(rdev, ringA);
375 
376 	r = radeon_ring_lock(rdev, ringB, 64);
377 	if (r) {
378 		DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
379 		goto out_cleanup;
380 	}
381 	radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
382 	r = radeon_fence_emit(rdev, &fenceB, ringB->idx);
383 	if (r) {
384 		DRM_ERROR("Failed to create sync fence 2\n");
385 		radeon_ring_unlock_undo(rdev, ringB);
386 		goto out_cleanup;
387 	}
388 	radeon_ring_unlock_commit(rdev, ringB);
389 
390 	mdelay(1000);
391 
392 	if (radeon_fence_signaled(fenceA)) {
393 		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
394 		goto out_cleanup;
395 	}
396 	if (radeon_fence_signaled(fenceB)) {
397 		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
398 		goto out_cleanup;
399 	}
400 
401 	r = radeon_ring_lock(rdev, ringC, 64);
402 	if (r) {
403 		DRM_ERROR("Failed to lock ring B %p\n", ringC);
404 		goto out_cleanup;
405 	}
406 	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
407 	radeon_ring_unlock_commit(rdev, ringC);
408 
409 	for (i = 0; i < 30; ++i) {
410 		mdelay(100);
411 		sigA = radeon_fence_signaled(fenceA);
412 		sigB = radeon_fence_signaled(fenceB);
413 		if (sigA || sigB)
414 			break;
415 	}
416 
417 	if (!sigA && !sigB) {
418 		DRM_ERROR("Neither fence A nor B has been signaled\n");
419 		goto out_cleanup;
420 	} else if (sigA && sigB) {
421 		DRM_ERROR("Both fence A and B has been signaled\n");
422 		goto out_cleanup;
423 	}
424 
425 	DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
426 
427 	r = radeon_ring_lock(rdev, ringC, 64);
428 	if (r) {
429 		DRM_ERROR("Failed to lock ring B %p\n", ringC);
430 		goto out_cleanup;
431 	}
432 	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
433 	radeon_ring_unlock_commit(rdev, ringC);
434 
435 	mdelay(1000);
436 
437 	r = radeon_fence_wait(fenceA, false);
438 	if (r) {
439 		DRM_ERROR("Failed to wait for sync fence A\n");
440 		goto out_cleanup;
441 	}
442 	r = radeon_fence_wait(fenceB, false);
443 	if (r) {
444 		DRM_ERROR("Failed to wait for sync fence B\n");
445 		goto out_cleanup;
446 	}
447 
448 out_cleanup:
449 	radeon_semaphore_free(rdev, &semaphore, NULL);
450 
451 	if (fenceA)
452 		radeon_fence_unref(&fenceA);
453 
454 	if (fenceB)
455 		radeon_fence_unref(&fenceB);
456 
457 	if (r)
458 		printk(KERN_WARNING "Error while testing ring sync (%d).\n", r);
459 }
460 
461 void radeon_test_syncing(struct radeon_device *rdev)
462 {
463 	int i, j, k;
464 
465 	for (i = 1; i < RADEON_NUM_RINGS; ++i) {
466 		struct radeon_ring *ringA = &rdev->ring[i];
467 		if (!ringA->ready)
468 			continue;
469 
470 		for (j = 0; j < i; ++j) {
471 			struct radeon_ring *ringB = &rdev->ring[j];
472 			if (!ringB->ready)
473 				continue;
474 
475 			DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
476 			radeon_test_ring_sync(rdev, ringA, ringB);
477 
478 			DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
479 			radeon_test_ring_sync(rdev, ringB, ringA);
480 
481 			for (k = 0; k < j; ++k) {
482 				struct radeon_ring *ringC = &rdev->ring[k];
483 				if (!ringC->ready)
484 					continue;
485 
486 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
487 				radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
488 
489 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
490 				radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
491 
492 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
493 				radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
494 
495 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
496 				radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
497 
498 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
499 				radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
500 
501 				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
502 				radeon_test_ring_sync2(rdev, ringC, ringB, ringA);
503 			}
504 		}
505 	}
506 }
507