1 /* $OpenBSD: if_iwxvar.h,v 1.16 2021/05/06 09:19:28 stsp Exp $ */ 2 3 /* 4 * Copyright (c) 2014 genua mbh <info@genua.de> 5 * Copyright (c) 2014 Fixup Software Ltd. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Based on BSD-licensed source modules in the Linux iwlwifi driver, 22 * which were used as the reference documentation for this implementation. 23 * 24 ****************************************************************************** 25 * 26 * This file is provided under a dual BSD/GPLv2 license. When using or 27 * redistributing this file, you may do so under either license. 28 * 29 * GPL LICENSE SUMMARY 30 * 31 * Copyright(c) 2017 Intel Deutschland GmbH 32 * Copyright(c) 2018 - 2019 Intel Corporation 33 * 34 * This program is free software; you can redistribute it and/or modify 35 * it under the terms of version 2 of the GNU General Public License as 36 * published by the Free Software Foundation. 37 * 38 * This program is distributed in the hope that it will be useful, but 39 * WITHOUT ANY WARRANTY; without even the implied warranty of 40 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 41 * General Public License for more details. 42 * 43 * BSD LICENSE 44 * 45 * Copyright(c) 2017 Intel Deutschland GmbH 46 * Copyright(c) 2018 - 2019 Intel Corporation 47 * All rights reserved. 48 * 49 * Redistribution and use in source and binary forms, with or without 50 * modification, are permitted provided that the following conditions 51 * are met: 52 * 53 * * Redistributions of source code must retain the above copyright 54 * notice, this list of conditions and the following disclaimer. 55 * * Redistributions in binary form must reproduce the above copyright 56 * notice, this list of conditions and the following disclaimer in 57 * the documentation and/or other materials provided with the 58 * distribution. 59 * * Neither the name Intel Corporation nor the names of its 60 * contributors may be used to endorse or promote products derived 61 * from this software without specific prior written permission. 62 * 63 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 64 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 65 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 66 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 67 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 68 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 69 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 70 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 71 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 72 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 73 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 74 * 75 ***************************************************************************** 76 */ 77 78 /*- 79 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr> 80 * 81 * Permission to use, copy, modify, and distribute this software for any 82 * purpose with or without fee is hereby granted, provided that the above 83 * copyright notice and this permission notice appear in all copies. 84 * 85 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 86 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 87 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 88 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 89 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 90 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 91 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 92 */ 93 94 struct iwx_rx_radiotap_header { 95 struct ieee80211_radiotap_header wr_ihdr; 96 uint64_t wr_tsft; 97 uint8_t wr_flags; 98 uint8_t wr_rate; 99 uint16_t wr_chan_freq; 100 uint16_t wr_chan_flags; 101 int8_t wr_dbm_antsignal; 102 int8_t wr_dbm_antnoise; 103 } __packed; 104 105 #define IWX_RX_RADIOTAP_PRESENT \ 106 ((1 << IEEE80211_RADIOTAP_TSFT) | \ 107 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 108 (1 << IEEE80211_RADIOTAP_RATE) | \ 109 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 110 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \ 111 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE)) 112 113 struct iwx_tx_radiotap_header { 114 struct ieee80211_radiotap_header wt_ihdr; 115 uint8_t wt_flags; 116 uint8_t wt_rate; 117 uint16_t wt_chan_freq; 118 uint16_t wt_chan_flags; 119 } __packed; 120 121 #define IWX_TX_RADIOTAP_PRESENT \ 122 ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 123 (1 << IEEE80211_RADIOTAP_RATE) | \ 124 (1 << IEEE80211_RADIOTAP_CHANNEL)) 125 126 #define IWX_UCODE_SECT_MAX 42 127 #define IWX_FWDMASEGSZ (192*1024) 128 #define IWX_FWDMASEGSZ_8000 (320*1024) 129 /* sanity check value */ 130 #define IWX_FWMAXSIZE (2*1024*1024) 131 132 /* 133 * fw_status is used to determine if we've already parsed the firmware file 134 * 135 * In addition to the following, status < 0 ==> -error 136 */ 137 #define IWX_FW_STATUS_NONE 0 138 #define IWX_FW_STATUS_INPROGRESS 1 139 #define IWX_FW_STATUS_DONE 2 140 141 enum iwx_ucode_type { 142 IWX_UCODE_TYPE_REGULAR, 143 IWX_UCODE_TYPE_INIT, 144 IWX_UCODE_TYPE_WOW, 145 IWX_UCODE_TYPE_REGULAR_USNIFFER, 146 IWX_UCODE_TYPE_MAX 147 }; 148 149 struct iwx_fw_info { 150 void *fw_rawdata; 151 size_t fw_rawsize; 152 int fw_status; 153 154 struct iwx_fw_sects { 155 struct iwx_fw_onesect { 156 void *fws_data; 157 uint32_t fws_len; 158 uint32_t fws_devoff; 159 } fw_sect[IWX_UCODE_SECT_MAX]; 160 size_t fw_totlen; 161 int fw_count; 162 } fw_sects[IWX_UCODE_TYPE_MAX]; 163 164 /* FW debug data parsed for driver usage */ 165 int dbg_dest_tlv_init; 166 uint8_t *dbg_dest_ver; 167 uint8_t n_dest_reg; 168 struct iwx_fw_dbg_dest_tlv_v1 *dbg_dest_tlv_v1; 169 170 struct iwx_fw_dbg_conf_tlv *dbg_conf_tlv[IWX_FW_DBG_CONF_MAX]; 171 size_t dbg_conf_tlv_len[IWX_FW_DBG_CONF_MAX]; 172 struct iwx_fw_dbg_trigger_tlv *dbg_trigger_tlv[IWX_FW_DBG_TRIGGER_MAX]; 173 size_t dbg_trigger_tlv_len[IWX_FW_DBG_TRIGGER_MAX]; 174 struct iwx_fw_dbg_mem_seg_tlv *dbg_mem_tlv; 175 size_t n_mem_tlv; 176 }; 177 178 struct iwx_nvm_data { 179 int n_hw_addrs; 180 uint8_t hw_addr[ETHER_ADDR_LEN]; 181 182 int sku_cap_band_24GHz_enable; 183 int sku_cap_band_52GHz_enable; 184 int sku_cap_11n_enable; 185 int sku_cap_11ac_enable; 186 int sku_cap_11ax_enable; 187 int sku_cap_amt_enable; 188 int sku_cap_ipan_enable; 189 int sku_cap_mimo_disable; 190 int lar_enabled; 191 192 uint8_t valid_tx_ant, valid_rx_ant; 193 194 uint16_t nvm_version; 195 }; 196 197 /* max bufs per tfd the driver will use */ 198 #define IWX_MAX_CMD_TBS_PER_TFD 2 199 200 struct iwx_host_cmd { 201 const void *data[IWX_MAX_CMD_TBS_PER_TFD]; 202 struct iwx_rx_packet *resp_pkt; 203 size_t resp_pkt_len; 204 unsigned long _rx_page_addr; 205 uint32_t _rx_page_order; 206 int handler_status; 207 208 uint32_t flags; 209 uint16_t len[IWX_MAX_CMD_TBS_PER_TFD]; 210 uint8_t dataflags[IWX_MAX_CMD_TBS_PER_TFD]; 211 uint32_t id; 212 }; 213 214 /* 215 * DMA glue is from iwn 216 */ 217 218 struct iwx_dma_info { 219 bus_dma_tag_t tag; 220 bus_dmamap_t map; 221 bus_dma_segment_t seg; 222 bus_addr_t paddr; 223 void *vaddr; 224 bus_size_t size; 225 }; 226 227 #define IWX_TX_RING_COUNT IWX_DEFAULT_QUEUE_SIZE 228 #define IWX_TX_RING_LOMARK 192 229 #define IWX_TX_RING_HIMARK 224 230 231 struct iwx_tx_data { 232 bus_dmamap_t map; 233 bus_addr_t cmd_paddr; 234 struct mbuf *m; 235 struct iwx_node *in; 236 }; 237 238 struct iwx_tx_ring { 239 struct iwx_dma_info desc_dma; 240 struct iwx_dma_info cmd_dma; 241 struct iwx_dma_info bc_tbl; 242 struct iwx_tfh_tfd *desc; 243 struct iwx_device_cmd *cmd; 244 struct iwx_tx_data data[IWX_TX_RING_COUNT]; 245 int qid; 246 int queued; 247 int cur; 248 int tail; 249 }; 250 251 #define IWX_RX_MQ_RING_COUNT 512 252 /* Linux driver optionally uses 8k buffer */ 253 #define IWX_RBUF_SIZE 4096 254 255 struct iwx_rx_data { 256 struct mbuf *m; 257 bus_dmamap_t map; 258 }; 259 260 struct iwx_rx_ring { 261 struct iwx_dma_info free_desc_dma; 262 struct iwx_dma_info stat_dma; 263 struct iwx_dma_info used_desc_dma; 264 struct iwx_dma_info buf_dma; 265 void *desc; 266 struct iwx_rb_status *stat; 267 struct iwx_rx_data data[IWX_RX_MQ_RING_COUNT]; 268 int cur; 269 }; 270 271 #define IWX_FLAG_USE_ICT 0x01 /* using Interrupt Cause Table */ 272 #define IWX_FLAG_RFKILL 0x02 /* radio kill switch is set */ 273 #define IWX_FLAG_SCANNING 0x04 /* scan in progress */ 274 #define IWX_FLAG_MAC_ACTIVE 0x08 /* MAC context added to firmware */ 275 #define IWX_FLAG_BINDING_ACTIVE 0x10 /* MAC->PHY binding added to firmware */ 276 #define IWX_FLAG_STA_ACTIVE 0x20 /* AP added to firmware station table */ 277 #define IWX_FLAG_TE_ACTIVE 0x40 /* time event is scheduled */ 278 #define IWX_FLAG_HW_ERR 0x80 /* hardware error occurred */ 279 #define IWX_FLAG_SHUTDOWN 0x100 /* shutting down; new tasks forbidden */ 280 #define IWX_FLAG_BGSCAN 0x200 /* background scan in progress */ 281 282 struct iwx_ucode_status { 283 uint32_t uc_lmac_error_event_table[2]; 284 uint32_t uc_umac_error_event_table; 285 uint32_t uc_log_event_table; 286 unsigned int error_event_table_tlv_status; 287 288 int uc_ok; 289 int uc_intr; 290 }; 291 292 #define IWX_ERROR_EVENT_TABLE_LMAC1 (1 << 0) 293 #define IWX_ERROR_EVENT_TABLE_LMAC2 (1 << 1) 294 #define IWX_ERROR_EVENT_TABLE_UMAC (1 << 2) 295 296 #define IWX_CMD_RESP_MAX PAGE_SIZE 297 298 /* lower blocks contain EEPROM image and calibration data */ 299 #define IWX_OTP_LOW_IMAGE_SIZE_FAMILY_7000 16384 300 #define IWX_OTP_LOW_IMAGE_SIZE_FAMILY_8000 32768 301 302 #define IWX_TE_SESSION_PROTECTION_MAX_TIME_MS 1000 303 #define IWX_TE_SESSION_PROTECTION_MIN_TIME_MS 400 304 305 enum IWX_CMD_MODE { 306 IWX_CMD_ASYNC = (1 << 0), 307 IWX_CMD_WANT_RESP = (1 << 1), 308 IWX_CMD_SEND_IN_RFKILL = (1 << 2), 309 }; 310 enum iwx_hcmd_dataflag { 311 IWX_HCMD_DFL_NOCOPY = (1 << 0), 312 IWX_HCMD_DFL_DUP = (1 << 1), 313 }; 314 315 #define IWX_NUM_PAPD_CH_GROUPS 9 316 #define IWX_NUM_TXP_CH_GROUPS 9 317 318 struct iwx_phy_ctxt { 319 uint16_t id; 320 uint16_t color; 321 uint32_t ref; 322 struct ieee80211_channel *channel; 323 }; 324 325 struct iwx_bf_data { 326 int bf_enabled; /* filtering */ 327 int ba_enabled; /* abort */ 328 int ave_beacon_signal; 329 int last_cqm_event; 330 }; 331 332 /** 333 * struct iwx_self_init_dram - dram data used by self init process 334 * @fw: lmac and umac dram data 335 * @lmac_cnt: number of lmac sections in fw image 336 * @umac_cnt: number of umac sections in fw image 337 * @paging: paging dram data 338 * @paging_cnt: number of paging sections needed by fw image 339 */ 340 struct iwx_self_init_dram { 341 struct iwx_dma_info *fw; 342 int lmac_cnt; 343 int umac_cnt; 344 struct iwx_dma_info *paging; 345 int paging_cnt; 346 }; 347 348 /** 349 * struct iwx_reorder_buffer - per ra/tid/queue reorder buffer 350 * @head_sn: reorder window head sn 351 * @num_stored: number of mpdus stored in the buffer 352 * @buf_size: the reorder buffer size as set by the last addba request 353 * @queue: queue of this reorder buffer 354 * @last_amsdu: track last ASMDU SN for duplication detection 355 * @last_sub_index: track ASMDU sub frame index for duplication detection 356 * @reorder_timer: timer for frames are in the reorder buffer. For AMSDU 357 * it is the time of last received sub-frame 358 * @removed: prevent timer re-arming 359 * @valid: reordering is valid for this queue 360 * @consec_oldsn_drops: consecutive drops due to old SN 361 * @consec_oldsn_ampdu_gp2: A-MPDU GP2 timestamp to track 362 * when to apply old SN consecutive drop workaround 363 * @consec_oldsn_prev_drop: track whether or not an MPDU 364 * that was single/part of the previous A-MPDU was 365 * dropped due to old SN 366 */ 367 struct iwx_reorder_buffer { 368 uint16_t head_sn; 369 uint16_t num_stored; 370 uint16_t buf_size; 371 uint16_t last_amsdu; 372 uint8_t last_sub_index; 373 struct timeout reorder_timer; 374 int removed; 375 int valid; 376 unsigned int consec_oldsn_drops; 377 uint32_t consec_oldsn_ampdu_gp2; 378 unsigned int consec_oldsn_prev_drop; 379 #define IWX_AMPDU_CONSEC_DROPS_DELBA 10 380 }; 381 382 /** 383 * struct iwx_reorder_buf_entry - reorder buffer entry per frame sequence number 384 * @frames: list of mbufs stored (A-MSDU subframes share a sequence number) 385 * @reorder_time: time the packet was stored in the reorder buffer 386 */ 387 struct iwx_reorder_buf_entry { 388 struct mbuf_list frames; 389 struct timeval reorder_time; 390 uint32_t rx_pkt_status; 391 int chanidx; 392 int is_shortpre; 393 uint32_t rate_n_flags; 394 uint32_t device_timestamp; 395 struct ieee80211_rxinfo rxi; 396 }; 397 398 /** 399 * struct iwx_rxba_data - BA session data 400 * @sta_id: station id 401 * @tid: tid of the session 402 * @baid: baid of the session 403 * @timeout: the timeout set in the addba request 404 * @entries_per_queue: # of buffers per queue 405 * @last_rx: last rx timestamp, updated only if timeout passed from last update 406 * @session_timer: timer to check if BA session expired, runs at 2 * timeout 407 * @sc: softc pointer, needed for timer context 408 * @reorder_buf: reorder buffer 409 * @reorder_buf_data: buffered frames, one entry per sequence number 410 */ 411 struct iwx_rxba_data { 412 uint8_t sta_id; 413 uint8_t tid; 414 uint8_t baid; 415 uint16_t timeout; 416 uint16_t entries_per_queue; 417 struct timeval last_rx; 418 struct timeout session_timer; 419 struct iwx_softc *sc; 420 struct iwx_reorder_buffer reorder_buf; 421 struct iwx_reorder_buf_entry entries[IEEE80211_BA_MAX_WINSZ]; 422 }; 423 424 static inline struct iwx_rxba_data * 425 iwx_rxba_data_from_reorder_buf(struct iwx_reorder_buffer *buf) 426 { 427 return (void *)((uint8_t *)buf - 428 offsetof(struct iwx_rxba_data, reorder_buf)); 429 } 430 431 /** 432 * struct iwx_rxq_dup_data - per station per rx queue data 433 * @last_seq: last sequence per tid for duplicate packet detection 434 * @last_sub_frame: last subframe packet 435 */ 436 struct iwx_rxq_dup_data { 437 uint16_t last_seq[IWX_MAX_TID_COUNT + 1]; 438 uint8_t last_sub_frame[IWX_MAX_TID_COUNT + 1]; 439 }; 440 441 struct iwx_setkey_task_arg { 442 int sta_id; 443 struct ieee80211_node *ni; 444 struct ieee80211_key *k; 445 }; 446 447 struct iwx_softc { 448 struct device sc_dev; 449 struct ieee80211com sc_ic; 450 int (*sc_newstate)(struct ieee80211com *, enum ieee80211_state, int); 451 int sc_newstate_pending; 452 453 struct task init_task; /* NB: not reference-counted */ 454 struct refcnt task_refs; 455 struct task newstate_task; 456 enum ieee80211_state ns_nstate; 457 int ns_arg; 458 459 /* Task for firmware BlockAck setup/teardown and its arguments. */ 460 struct task ba_task; 461 uint32_t ba_start_tidmask; 462 uint32_t ba_stop_tidmask; 463 uint16_t ba_ssn[IWX_MAX_TID_COUNT]; 464 uint16_t ba_winsize[IWX_MAX_TID_COUNT]; 465 int ba_timeout_val[IWX_MAX_TID_COUNT]; 466 467 /* Task for setting encryption keys and its arguments. */ 468 struct task setkey_task; 469 /* 470 * At present we need to process at most two keys at once: 471 * Our pairwise key and a group key. 472 * When hostap mode is implemented this array needs to grow or 473 * it might become a bottleneck for associations that occur at 474 * roughly the same time. 475 */ 476 struct iwx_setkey_task_arg setkey_arg[2]; 477 int setkey_cur; 478 int setkey_tail; 479 int setkey_nkeys; 480 481 /* Task for ERP/HT prot/slot-time/EDCA updates. */ 482 struct task mac_ctxt_task; 483 484 bus_space_tag_t sc_st; 485 bus_space_handle_t sc_sh; 486 bus_size_t sc_sz; 487 bus_dma_tag_t sc_dmat; 488 pci_chipset_tag_t sc_pct; 489 pcitag_t sc_pcitag; 490 const void *sc_ih; 491 int sc_msix; 492 493 /* TX scheduler rings. */ 494 struct iwx_dma_info sched_dma; 495 uint32_t sched_base; 496 497 /* TX/RX rings. */ 498 struct iwx_tx_ring txq[IWX_MAX_QUEUES]; 499 struct iwx_rx_ring rxq; 500 int qfullmsk; 501 502 int sc_sf_state; 503 504 /* ICT table. */ 505 struct iwx_dma_info ict_dma; 506 int ict_cur; 507 508 int sc_hw_rev; 509 #define IWX_SILICON_A_STEP 0 510 #define IWX_SILICON_B_STEP 1 511 #define IWX_SILICON_C_STEP 2 512 #define IWX_SILICON_D_STEP 3 513 int sc_hw_id; 514 int sc_device_family; 515 #define IWX_DEVICE_FAMILY_22000 1 516 #define IWX_DEVICE_FAMILY_22560 2 517 518 struct iwx_dma_info fw_dma; 519 520 struct iwx_dma_info ctxt_info_dma; 521 struct iwx_self_init_dram init_dram; 522 523 int sc_fw_chunk_done; 524 int sc_init_complete; 525 #define IWX_INIT_COMPLETE 0x01 526 #define IWX_CALIB_COMPLETE 0x02 527 528 struct iwx_ucode_status sc_uc; 529 char sc_fwver[32]; 530 531 int sc_capaflags; 532 int sc_capa_max_probe_len; 533 int sc_capa_n_scan_channels; 534 uint8_t sc_ucode_api[howmany(IWX_NUM_UCODE_TLV_API, NBBY)]; 535 uint8_t sc_enabled_capa[howmany(IWX_NUM_UCODE_TLV_CAPA, NBBY)]; 536 #define IWX_MAX_FW_CMD_VERSIONS 64 537 struct iwx_fw_cmd_version cmd_versions[IWX_MAX_FW_CMD_VERSIONS]; 538 int n_cmd_versions; 539 540 int sc_intmask; 541 int sc_flags; 542 543 uint32_t sc_fh_init_mask; 544 uint32_t sc_hw_init_mask; 545 uint32_t sc_fh_mask; 546 uint32_t sc_hw_mask; 547 548 int sc_generation; 549 550 struct rwlock ioctl_rwl; 551 552 int sc_cap_off; /* PCIe caps */ 553 554 const char *sc_fwname; 555 bus_size_t sc_fwdmasegsz; 556 struct iwx_fw_info sc_fw; 557 struct iwx_dma_info fw_mon; 558 int sc_fw_phy_config; 559 struct iwx_tlv_calib_ctrl sc_default_calib[IWX_UCODE_TYPE_MAX]; 560 561 struct iwx_nvm_data sc_nvm; 562 struct iwx_bf_data sc_bf; 563 564 int sc_tx_timer; 565 int sc_rx_ba_sessions; 566 567 int sc_scan_last_antenna; 568 569 int sc_fixed_ridx; 570 571 int sc_staid; 572 int sc_nodecolor; 573 574 uint8_t *sc_cmd_resp_pkt[IWX_TX_RING_COUNT]; 575 size_t sc_cmd_resp_len[IWX_TX_RING_COUNT]; 576 int sc_nic_locks; 577 578 struct taskq *sc_nswq; 579 580 struct iwx_rx_phy_info sc_last_phy_info; 581 int sc_ampdu_ref; 582 #define IWX_MAX_BAID 32 583 struct iwx_rxba_data sc_rxba_data[IWX_MAX_BAID]; 584 585 uint32_t sc_time_event_uid; 586 587 /* phy contexts. we only use the first one */ 588 struct iwx_phy_ctxt sc_phyctxt[IWX_NUM_PHY_CTX]; 589 590 struct iwx_notif_statistics sc_stats; 591 int sc_noise; 592 593 int sc_pm_support; 594 int sc_ltr_enabled; 595 596 int sc_integrated; 597 int sc_tx_with_siso_diversity; 598 int sc_max_tfd_queue_size; 599 int sc_ltr_delay; 600 int sc_xtal_latency; 601 int sc_low_latency_xtal; 602 int sc_uhb_supported; 603 604 #if NBPFILTER > 0 605 caddr_t sc_drvbpf; 606 607 union { 608 struct iwx_rx_radiotap_header th; 609 uint8_t pad[IEEE80211_RADIOTAP_HDRLEN]; 610 } sc_rxtapu; 611 #define sc_rxtap sc_rxtapu.th 612 int sc_rxtap_len; 613 614 union { 615 struct iwx_tx_radiotap_header th; 616 uint8_t pad[IEEE80211_RADIOTAP_HDRLEN]; 617 } sc_txtapu; 618 #define sc_txtap sc_txtapu.th 619 int sc_txtap_len; 620 #endif 621 }; 622 623 struct iwx_node { 624 struct ieee80211_node in_ni; 625 struct iwx_phy_ctxt *in_phyctxt; 626 627 uint16_t in_id; 628 uint16_t in_color; 629 630 struct iwx_rxq_dup_data dup_data; 631 632 int in_flags; 633 #define IWX_NODE_FLAG_HAVE_PAIRWISE_KEY 0x01 634 #define IWX_NODE_FLAG_HAVE_GROUP_KEY 0x02 635 }; 636 #define IWX_STATION_ID 0 637 #define IWX_AUX_STA_ID 1 638 #define IWX_MONITOR_STA_ID 2 639 640 #define IWX_ICT_SIZE 4096 641 #define IWX_ICT_COUNT (IWX_ICT_SIZE / sizeof (uint32_t)) 642 #define IWX_ICT_PADDR_SHIFT 12 643