1 /* $OpenBSD: if_ix.h,v 1.27 2014/11/12 16:06:47 mikeb Exp $ */ 2 3 /****************************************************************************** 4 5 Copyright (c) 2001-2012, Intel Corporation 6 All rights reserved. 7 8 Redistribution and use in source and binary forms, with or without 9 modification, are permitted provided that the following conditions are met: 10 11 1. Redistributions of source code must retain the above copyright notice, 12 this list of conditions and the following disclaimer. 13 14 2. Redistributions in binary form must reproduce the above copyright 15 notice, this list of conditions and the following disclaimer in the 16 documentation and/or other materials provided with the distribution. 17 18 3. Neither the name of the Intel Corporation nor the names of its 19 contributors may be used to endorse or promote products derived from 20 this software without specific prior written permission. 21 22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 23 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 26 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 POSSIBILITY OF SUCH DAMAGE. 33 34 ******************************************************************************/ 35 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe.h,v 1.38 2012/12/20 22:29:29 svnexp Exp $*/ 36 37 #ifndef _IX_H_ 38 #define _IX_H_ 39 40 #include <dev/pci/ixgbe.h> 41 42 /* Tunables */ 43 44 /* 45 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 46 * number of transmit descriptors allocated by the driver. Increasing this 47 * value allows the driver to queue more transmits. Each descriptor is 16 48 * bytes. Performance tests have show the 2K value to be optimal for top 49 * performance. 50 */ 51 #define DEFAULT_TXD 256 52 #define PERFORM_TXD 2048 53 #define MAX_TXD 4096 54 #define MIN_TXD 64 55 56 /* 57 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 58 * number of receive descriptors allocated for each RX queue. Increasing this 59 * value allows the driver to buffer more incoming packets. Each descriptor 60 * is 16 bytes. A receive buffer is also allocated for each descriptor. 61 * 62 * Note: with 8 rings and a dual port card, it is possible to bump up 63 * against the system mbuf pool limit, you can tune nmbclusters 64 * to adjust for this. 65 */ 66 #define DEFAULT_RXD 256 67 #define PERFORM_RXD 2048 68 #define MAX_RXD 4096 69 #define MIN_RXD 64 70 71 /* Alignment for rings */ 72 #define DBA_ALIGN 128 73 74 /* 75 * This parameter controls the duration of transmit watchdog timer. 76 */ 77 #define IXGBE_TX_TIMEOUT 5 /* set to 5 seconds */ 78 79 /* 80 * This parameters control when the driver calls the routine to reclaim 81 * transmit descriptors. 82 */ 83 #define IXGBE_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 16) 84 #define IXGBE_TX_OP_THRESHOLD (sc->num_tx_desc / 32) 85 86 #define IXGBE_MAX_FRAME_SIZE 9216 87 88 /* Flow control constants */ 89 #define IXGBE_FC_PAUSE 0xFFFF 90 #define IXGBE_FC_HI 0x20000 91 #define IXGBE_FC_LO 0x10000 92 93 /* Defines for printing debug information */ 94 #define DEBUG_INIT 0 95 #define DEBUG_IOCTL 0 96 #define DEBUG_HW 0 97 98 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 99 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 100 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 101 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 102 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 103 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 104 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 105 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 106 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 107 108 #define MAX_NUM_MULTICAST_ADDRESSES 128 109 #define IXGBE_82598_SCATTER 100 110 #define IXGBE_82599_SCATTER 32 111 #define MSIX_82598_BAR 3 112 #define MSIX_82599_BAR 4 113 #define IXGBE_TSO_SIZE 262140 114 #define IXGBE_TX_BUFFER_SIZE ((uint32_t) 1514) 115 #define IXGBE_RX_HDR 128 116 #define IXGBE_VFTA_SIZE 128 117 #define IXGBE_BR_SIZE 4096 118 #define IXGBE_QUEUE_MIN_FREE 32 119 120 /* 121 * Interrupt Moderation parameters 122 */ 123 #define IXGBE_INTS_PER_SEC 8000 124 125 struct ixgbe_tx_buf { 126 uint32_t eop_index; 127 struct mbuf *m_head; 128 bus_dmamap_t map; 129 }; 130 131 struct ixgbe_rx_buf { 132 struct mbuf *buf; 133 struct mbuf *fmp; 134 bus_dmamap_t map; 135 }; 136 137 /* 138 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 139 */ 140 struct ixgbe_dma_alloc { 141 caddr_t dma_vaddr; 142 bus_dma_tag_t dma_tag; 143 bus_dmamap_t dma_map; 144 bus_dma_segment_t dma_seg; 145 bus_size_t dma_size; 146 int dma_nseg; 147 }; 148 149 /* 150 * Driver queue struct: this is the interrupt container 151 * for the associated tx and rx ring. 152 */ 153 struct ix_queue { 154 struct ix_softc *sc; 155 uint32_t msix; /* This queue's MSIX vector */ 156 uint32_t eims; /* This queue's EIMS bit */ 157 uint32_t eitr_setting; 158 void *tag; 159 struct tx_ring *txr; 160 struct rx_ring *rxr; 161 }; 162 163 /* 164 * The transmit ring, one per tx queue 165 */ 166 struct tx_ring { 167 struct ix_softc *sc; 168 uint32_t me; 169 uint32_t watchdog_timer; 170 union ixgbe_adv_tx_desc *tx_base; 171 struct ixgbe_tx_buf *tx_buffers; 172 struct ixgbe_dma_alloc txdma; 173 volatile uint16_t tx_avail; 174 uint32_t next_avail_desc; 175 uint32_t next_to_clean; 176 enum { 177 IXGBE_QUEUE_IDLE, 178 IXGBE_QUEUE_WORKING, 179 IXGBE_QUEUE_HUNG, 180 } queue_status; 181 uint32_t txd_cmd; 182 bus_dma_tag_t txtag; 183 uint32_t bytes; /* Used for AIM calc */ 184 uint32_t packets; 185 /* Soft Stats */ 186 uint64_t tx_packets; 187 }; 188 189 190 /* 191 * The Receive ring, one per rx queue 192 */ 193 struct rx_ring { 194 struct ix_softc *sc; 195 uint32_t me; 196 union ixgbe_adv_rx_desc *rx_base; 197 struct ixgbe_dma_alloc rxdma; 198 #if 0 199 struct lro_ctrl lro; 200 #endif 201 bool lro_enabled; 202 bool hw_rsc; 203 bool discard; 204 uint next_to_refresh; 205 uint next_to_check; 206 uint last_desc_filled; 207 struct if_rxring rx_ring; 208 struct ixgbe_rx_buf *rx_buffers; 209 210 uint32_t bytes; /* Used for AIM calc */ 211 uint32_t packets; 212 213 /* Soft stats */ 214 uint64_t rx_irq; 215 uint64_t rx_packets; 216 uint64_t rx_bytes; 217 uint64_t rx_discarded; 218 uint64_t rsc_num; 219 }; 220 221 /* Our adapter structure */ 222 struct ix_softc { 223 struct device dev; 224 struct arpcom arpcom; 225 226 struct ixgbe_hw hw; 227 struct ixgbe_osdep osdep; 228 229 void *tag; 230 231 struct ifmedia media; 232 struct timeout timer; 233 struct timeout rx_refill; 234 int msix; 235 int if_flags; 236 237 uint16_t num_vlans; 238 uint16_t num_queues; 239 240 /* 241 * Shadow VFTA table, this is needed because 242 * the real vlan filter table gets cleared during 243 * a soft reset and the driver needs to be able 244 * to repopulate it. 245 */ 246 uint32_t shadow_vfta[IXGBE_VFTA_SIZE]; 247 248 /* Info about the interface */ 249 uint optics; 250 uint32_t fc; /* local flow ctrl setting */ 251 int advertise; /* link speeds */ 252 uint16_t max_frame_size; 253 uint16_t num_segs; 254 uint32_t link_speed; 255 bool link_up; 256 uint32_t linkvec; 257 258 /* Mbuf cluster size */ 259 uint32_t rx_mbuf_sz; 260 261 /* 262 * Queues: 263 * This is the irq holder, it has 264 * and RX/TX pair or rings associated 265 * with it. 266 */ 267 struct ix_queue *queues; 268 269 /* 270 * Transmit rings: 271 * Allocated at run time, an array of rings. 272 */ 273 struct tx_ring *tx_rings; 274 int num_tx_desc; 275 276 /* 277 * Receive rings: 278 * Allocated at run time, an array of rings. 279 */ 280 struct rx_ring *rx_rings; 281 uint64_t que_mask; 282 int num_rx_desc; 283 284 /* Multicast array memory */ 285 uint8_t *mta; 286 287 /* Misc stats maintained by the driver */ 288 unsigned long dropped_pkts; 289 unsigned long no_tx_map_avail; 290 unsigned long no_tx_dma_setup; 291 unsigned long watchdog_events; 292 unsigned long tso_tx; 293 unsigned long link_irq; 294 295 struct ixgbe_hw_stats stats; 296 }; 297 298 #endif /* _IX_H_ */ 299