1 /************************************************************************** 2 3 Copyright (c) 2001-2005, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ***************************************************************************/ 33 34 /* $OpenBSD: if_ixgb.h,v 1.3 2006/02/26 01:27:16 brad Exp $ */ 35 36 #ifndef _IXGB_H_DEFINED_ 37 #define _IXGB_H_DEFINED_ 38 39 #include "bpfilter.h" 40 #include "vlan.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/sockio.h> 45 #include <sys/mbuf.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 #include <sys/socket.h> 50 51 #include <net/if.h> 52 #include <net/if_dl.h> 53 #include <net/if_media.h> 54 55 #ifdef INET 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 #include <netinet/if_ether.h> 61 #include <netinet/tcp.h> 62 #include <netinet/udp.h> 63 #endif 64 65 #if NVLAN > 0 66 #include <net/if_types.h> 67 #include <net/if_vlan_var.h> 68 #endif 69 70 #if NBPFILTER > 0 71 #include <net/bpf.h> 72 #endif 73 74 #include <uvm/uvm_extern.h> 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcidevs.h> 79 80 #include <dev/pci/ixgb_hw.h> 81 #include <dev/pci/ixgb_ee.h> 82 #include <dev/pci/ixgb_ids.h> 83 84 /* Tunables */ 85 86 /* 87 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 88 * number of transmit descriptors allocated by the driver. Increasing this 89 * value allows the driver to queue more transmits. Each descriptor is 16 90 * bytes. 91 */ 92 #define IXGB_MAX_TXD 1024 93 94 /* 95 * RxDescriptors Valid Range: 64-512 Default Value: 512 This value is the 96 * number of receive descriptors allocated by the driver. Increasing this 97 * value allows the driver to buffer more incoming packets. Each descriptor 98 * is 16 bytes. A receive buffer is also allocated for each descriptor. The 99 * maximum MTU size is 16110. 100 * Note: Maximum number of receive descriptors is limited to 512 to avoid a 101 * hardware descriptor cache issue under heavy receive traffic. 102 */ 103 #define IXGB_MAX_RXD 512 104 105 /* 106 * TxIntDelay Valid Range: 0-65535 (0=off) Default Value: 32 This value 107 * delays the generation of transmit interrupts in units of 1.024 108 * microseconds. Transmit interrupt reduction can improve CPU efficiency if 109 * properly tuned for specific network traffic. If the system is reporting 110 * dropped transmits, this value may be set too high causing the driver to 111 * run out of available transmit descriptors. 112 */ 113 #define TIDV 32 114 115 /* 116 * RxIntDelay Valid Range: 0-65535 (0=off) Default Value: 72 This value 117 * delays the generation of receive interrupts in units of 1.024 118 * microseconds. Receive interrupt reduction can improve CPU efficiency if 119 * properly tuned for specific network traffic. Increasing this value adds 120 * extra latency to frame reception and can end up decreasing the throughput 121 * of TCP traffic. If the system is reporting dropped receives, this value 122 * may be set too high, causing the driver to run out of available receive 123 * descriptors. 124 * 125 */ 126 #define RDTR 72 127 128 /* 129 * This parameter controls the duration of transmit watchdog timer. 130 */ 131 #define IXGB_TX_TIMEOUT 5 /* set to 5 seconds */ 132 133 /* 134 * This parameter controls when the driver calls the routine to reclaim 135 * transmit descriptors. 136 */ 137 #define IXGB_TX_CLEANUP_THRESHOLD IXGB_MAX_TXD / 8 138 139 /* 140 * Flow Control Types. 141 * 1. ixgb_fc_none - Flow Control Disabled 142 * 2. ixgb_fc_rx_pause - Flow Control Receive Only 143 * 3. ixgb_fc_tx_pause - Flow Control Transmit Only 144 * 4. ixgb_fc_full - Flow Control Enabled 145 */ 146 #define FLOW_CONTROL_NONE ixgb_fc_none 147 #define FLOW_CONTROL_RX_PAUSE ixgb_fc_rx_pause 148 #define FLOW_CONTROL_TX_PAUSE ixgb_fc_tx_pause 149 #define FLOW_CONTROL_FULL ixgb_fc_full 150 151 /* 152 * Set the flow control type. Assign one of the above flow control types to be enabled. 153 * Default Value: FLOW_CONTROL_FULL 154 */ 155 #define FLOW_CONTROL FLOW_CONTROL_FULL 156 157 /* 158 * Receive Flow control low threshold (when we send a resume frame) (FCRTL) 159 * Valid Range: 64 - 262,136 (0x40 - 0x3FFF8, 8 byte granularity) must be 160 * less than high threshold by at least 8 bytes Default Value: 163,840 161 * (0x28000) 162 */ 163 #define FCRTL 0x28000 164 165 /* 166 * Receive Flow control high threshold (when we send a pause frame) (FCRTH) 167 * Valid Range: 1,536 - 262,136 (0x600 - 0x3FFF8, 8 byte granularity) Default 168 * Value: 196,608 (0x30000) 169 */ 170 #define FCRTH 0x30000 171 172 /* 173 * Flow control request timeout (how long to pause the link partner's tx) 174 * (PAP 15:0) Valid Range: 1 - 65535 Default Value: 256 (0x100) 175 */ 176 #define FCPAUSE 0x100 177 178 /* Tunables -- End */ 179 180 181 #define IXGB_VENDOR_ID 0x8086 182 #define IXGB_MMBA 0x0010 /* Mem base address */ 183 #define IXGB_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1)) 184 185 #define IOCTL_CMD_TYPE u_long 186 #define MAX_NUM_MULTICAST_ADDRESSES 128 187 #define PCI_ANY_ID (~0U) 188 189 /* Defines for printing debug information */ 190 #define DEBUG_INIT 0 191 #define DEBUG_IOCTL 0 192 #define DEBUG_HW 0 193 194 #define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 195 #define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 196 #define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 197 #define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 198 #define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 199 #define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 200 #define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 201 #define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 202 #define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 203 204 205 /* Supported RX Buffer Sizes */ 206 #define IXGB_RXBUFFER_2048 2048 207 #define IXGB_RXBUFFER_4096 4096 208 #define IXGB_RXBUFFER_8192 8192 209 #define IXGB_RXBUFFER_16384 16384 210 211 #define IXGB_MAX_SCATTER 100 212 213 struct ixgb_buffer { 214 struct mbuf *m_head; 215 bus_dmamap_t map; /* bus_dma map for packet */ 216 }; 217 218 struct ixgb_q { 219 bus_dmamap_t map; /* bus_dma map for packet */ 220 }; 221 222 /* 223 * Bus dma allocation structure used by ixgb_dma_malloc and ixgb_dma_free. 224 */ 225 struct ixgb_dma_alloc { 226 bus_addr_t dma_paddr; 227 caddr_t dma_vaddr; 228 bus_dma_tag_t dma_tag; 229 bus_dmamap_t dma_map; 230 bus_dma_segment_t dma_seg; 231 bus_size_t dma_size; 232 int dma_nseg; 233 }; 234 235 typedef enum _XSUM_CONTEXT_T { 236 OFFLOAD_NONE, 237 OFFLOAD_TCP_IP, 238 OFFLOAD_UDP_IP 239 } XSUM_CONTEXT_T; 240 241 /* Our adapter structure */ 242 struct ixgb_softc { 243 struct device sc_dv; 244 struct arpcom interface_data; 245 struct ixgb_hw hw; 246 247 /* OpenBSD operating-system-specific structures */ 248 struct ixgb_osdep osdep; 249 struct ifmedia media; 250 int io_rid; 251 252 void *sc_intrhand; 253 struct timeout ixgb_intr_enable; 254 struct timeout timer_handle; 255 void *sc_powerhook; 256 void *sc_shutdownhook; 257 258 /* Info about the board itself */ 259 u_int32_t part_num; 260 u_int8_t link_active; 261 u_int16_t link_speed; 262 u_int16_t link_duplex; 263 u_int32_t tx_int_delay; 264 u_int32_t tx_abs_int_delay; 265 u_int32_t rx_int_delay; 266 u_int32_t rx_abs_int_delay; 267 268 int raidc; 269 270 XSUM_CONTEXT_T active_checksum_context; 271 272 /* 273 * Transmit definitions 274 * 275 * We have an array of num_tx_desc descriptors (handled by the 276 * controller) paired with an array of tx_buffers (at 277 * tx_buffer_area). The index of the next available descriptor is 278 * next_avail_tx_desc. The number of remaining tx_desc is 279 * num_tx_desc_avail. 280 */ 281 struct ixgb_dma_alloc txdma; /* bus_dma glue for tx desc */ 282 struct ixgb_tx_desc *tx_desc_base; 283 u_int32_t next_avail_tx_desc; 284 u_int32_t oldest_used_tx_desc; 285 volatile u_int16_t num_tx_desc_avail; 286 u_int16_t num_tx_desc; 287 u_int32_t txd_cmd; 288 struct ixgb_buffer *tx_buffer_area; 289 bus_dma_tag_t txtag; /* dma tag for tx */ 290 291 /* 292 * Receive definitions 293 * 294 * we have an array of num_rx_desc rx_desc (handled by the controller), 295 * and paired with an array of rx_buffers (at rx_buffer_area). The 296 * next pair to check on receive is at offset next_rx_desc_to_check 297 */ 298 struct ixgb_dma_alloc rxdma; /* bus_dma glue for rx desc */ 299 struct ixgb_rx_desc *rx_desc_base; 300 u_int32_t next_rx_desc_to_check; 301 u_int16_t num_rx_desc; 302 u_int32_t rx_buffer_len; 303 struct ixgb_buffer *rx_buffer_area; 304 bus_dma_tag_t rxtag; /* dma tag for Rx */ 305 u_int32_t next_rx_desc_to_use; 306 307 /* Jumbo frame */ 308 struct mbuf *fmp; 309 struct mbuf *lmp; 310 311 /* Misc stats maintained by the driver */ 312 unsigned long dropped_pkts; 313 unsigned long mbuf_alloc_failed; 314 unsigned long mbuf_cluster_failed; 315 unsigned long no_tx_desc_avail1; 316 unsigned long no_tx_desc_avail2; 317 unsigned long no_tx_map_avail; 318 unsigned long no_tx_dma_setup; 319 unsigned long watchdog_events; 320 321 struct ixgb_hw_stats stats; 322 }; 323 324 #endif /* _IXGB_H_DEFINED_ */ 325