1*e7da7166Sdlg /* $OpenBSD: if_nfevar.h,v 1.17 2014/08/20 01:02:50 dlg Exp $ */ 2c0967baeSdamien 3c0967baeSdamien /*- 4fbc14a03Sjsg * Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org> 5fbc14a03Sjsg * 6fbc14a03Sjsg * Permission to use, copy, modify, and distribute this software for any 7fbc14a03Sjsg * purpose with or without fee is hereby granted, provided that the above 8fbc14a03Sjsg * copyright notice and this permission notice appear in all copies. 9fbc14a03Sjsg * 10fbc14a03Sjsg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11fbc14a03Sjsg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12fbc14a03Sjsg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13fbc14a03Sjsg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14fbc14a03Sjsg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15fbc14a03Sjsg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16fbc14a03Sjsg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17fbc14a03Sjsg */ 18fbc14a03Sjsg 19fbc14a03Sjsg #define NFE_IFQ_MAXLEN 64 20fbc14a03Sjsg 21fbc14a03Sjsg struct nfe_tx_data { 22fbc14a03Sjsg bus_dmamap_t map; 23ae0a03e3Sdamien bus_dmamap_t active; 24fbc14a03Sjsg struct mbuf *m; 25fbc14a03Sjsg }; 26fbc14a03Sjsg 27fbc14a03Sjsg struct nfe_tx_ring { 28fbc14a03Sjsg bus_dmamap_t map; 29fbc14a03Sjsg bus_dma_segment_t seg; 30fbc14a03Sjsg bus_addr_t physaddr; 31ae0a03e3Sdamien struct nfe_desc32 *desc32; 32ae0a03e3Sdamien struct nfe_desc64 *desc64; 33519bb2aaSjsg struct nfe_tx_data data[NFE_TX_RING_COUNT]; 34fbc14a03Sjsg int queued; 35fbc14a03Sjsg int cur; 36fbc14a03Sjsg int next; 37fbc14a03Sjsg }; 38fbc14a03Sjsg 39fbc14a03Sjsg struct nfe_rx_data { 40fbc14a03Sjsg bus_dmamap_t map; 41fbc14a03Sjsg struct mbuf *m; 42fbc14a03Sjsg }; 43fbc14a03Sjsg 44fbc14a03Sjsg struct nfe_rx_ring { 45fbc14a03Sjsg bus_dmamap_t map; 46fbc14a03Sjsg bus_dma_segment_t seg; 47fbc14a03Sjsg bus_addr_t physaddr; 48ae0a03e3Sdamien struct nfe_desc32 *desc32; 49ae0a03e3Sdamien struct nfe_desc64 *desc64; 50519bb2aaSjsg struct nfe_rx_data data[NFE_RX_RING_COUNT]; 5111651fceSdamien int bufsz; 52fbc14a03Sjsg int cur; 53fbc14a03Sjsg int next; 54fbc14a03Sjsg }; 55fbc14a03Sjsg 56fbc14a03Sjsg struct nfe_softc { 57fbc14a03Sjsg struct device sc_dev; 58fbc14a03Sjsg struct arpcom sc_arpcom; 59ae0a03e3Sdamien bus_space_handle_t sc_memh; 60ae0a03e3Sdamien bus_space_tag_t sc_memt; 61fbc14a03Sjsg void *sc_ih; 62fbc14a03Sjsg bus_dma_tag_t sc_dmat; 63fbc14a03Sjsg struct mii_data sc_mii; 64c0967baeSdamien struct timeout sc_tick_ch; 65fbc14a03Sjsg 66fbc14a03Sjsg u_int sc_flags; 67fbc14a03Sjsg #define NFE_JUMBO_SUP 0x01 68fbc14a03Sjsg #define NFE_40BIT_ADDR 0x02 69ae0a03e3Sdamien #define NFE_HW_CSUM 0x04 70ac038e8bSdamien #define NFE_HW_VLAN 0x08 714d53c5b0Sckuethe #define NFE_CORRECT_MACADDR 0x20 72768a9842Sjsg #define NFE_PWR_MGMT 0x40 731b942177Sstsp #define NFE_WOL 0x80 74fbc14a03Sjsg 7580436713Sdamien uint32_t rxtxctl; 76213b4a9aSdamien uint8_t mii_phyaddr; 77fbc14a03Sjsg 78fbc14a03Sjsg struct nfe_tx_ring txq; 79fbc14a03Sjsg struct nfe_rx_ring rxq; 80fbc14a03Sjsg }; 81