1*fbc14a03Sjsg /* $OpenBSD: if_nfevar.h,v 1.1 2005/12/14 21:54:58 jsg Exp $ */ 2*fbc14a03Sjsg /* 3*fbc14a03Sjsg * Copyright (c) 2005 Jonathan Gray <jsg@openbsd.org> 4*fbc14a03Sjsg * 5*fbc14a03Sjsg * Permission to use, copy, modify, and distribute this software for any 6*fbc14a03Sjsg * purpose with or without fee is hereby granted, provided that the above 7*fbc14a03Sjsg * copyright notice and this permission notice appear in all copies. 8*fbc14a03Sjsg * 9*fbc14a03Sjsg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10*fbc14a03Sjsg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11*fbc14a03Sjsg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12*fbc14a03Sjsg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13*fbc14a03Sjsg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14*fbc14a03Sjsg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15*fbc14a03Sjsg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16*fbc14a03Sjsg */ 17*fbc14a03Sjsg 18*fbc14a03Sjsg #define NFE_IFQ_MAXLEN 64 19*fbc14a03Sjsg 20*fbc14a03Sjsg struct nfe_tx_data { 21*fbc14a03Sjsg bus_dmamap_t map; 22*fbc14a03Sjsg struct mbuf *m; 23*fbc14a03Sjsg }; 24*fbc14a03Sjsg 25*fbc14a03Sjsg struct nfe_tx_ring { 26*fbc14a03Sjsg bus_dmamap_t map; 27*fbc14a03Sjsg bus_dma_segment_t seg; 28*fbc14a03Sjsg bus_addr_t physaddr; 29*fbc14a03Sjsg struct nfe_desc *desc_v1; 30*fbc14a03Sjsg struct nfe_desc_v3 *desc_v3; 31*fbc14a03Sjsg struct nfe_tx_data *data; 32*fbc14a03Sjsg int count; 33*fbc14a03Sjsg int queued; 34*fbc14a03Sjsg int cur; 35*fbc14a03Sjsg int next; 36*fbc14a03Sjsg int cur_encrypt; 37*fbc14a03Sjsg int next_encrypt; 38*fbc14a03Sjsg }; 39*fbc14a03Sjsg 40*fbc14a03Sjsg struct nfe_rx_data { 41*fbc14a03Sjsg bus_dmamap_t map; 42*fbc14a03Sjsg struct mbuf *m; 43*fbc14a03Sjsg int drop; 44*fbc14a03Sjsg }; 45*fbc14a03Sjsg 46*fbc14a03Sjsg struct nfe_rx_ring { 47*fbc14a03Sjsg bus_dmamap_t map; 48*fbc14a03Sjsg bus_dma_segment_t seg; 49*fbc14a03Sjsg bus_addr_t physaddr; 50*fbc14a03Sjsg struct nfe_desc *desc_v1; 51*fbc14a03Sjsg struct nfe_desc_v3 *desc_v3; 52*fbc14a03Sjsg struct nfe_rx_data *data; 53*fbc14a03Sjsg int count; 54*fbc14a03Sjsg int cur; 55*fbc14a03Sjsg int next; 56*fbc14a03Sjsg int cur_decrypt; 57*fbc14a03Sjsg }; 58*fbc14a03Sjsg 59*fbc14a03Sjsg struct nfe_softc { 60*fbc14a03Sjsg struct device sc_dev; 61*fbc14a03Sjsg struct arpcom sc_arpcom; 62*fbc14a03Sjsg bus_space_handle_t sc_ioh; 63*fbc14a03Sjsg bus_space_tag_t sc_iot; 64*fbc14a03Sjsg void *sc_ih; 65*fbc14a03Sjsg bus_dma_tag_t sc_dmat; 66*fbc14a03Sjsg struct mii_data sc_mii; 67*fbc14a03Sjsg struct timeout sc_timeout; 68*fbc14a03Sjsg 69*fbc14a03Sjsg u_int sc_flags; 70*fbc14a03Sjsg #define NFE_JUMBO_SUP 0x01 71*fbc14a03Sjsg #define NFE_40BIT_ADDR 0x02 72*fbc14a03Sjsg 73*fbc14a03Sjsg u_char phyaddr; 74*fbc14a03Sjsg 75*fbc14a03Sjsg struct nfe_tx_ring txq; 76*fbc14a03Sjsg struct nfe_rx_ring rxq; 77*fbc14a03Sjsg }; 78