1 /* $OpenBSD: if_rtw_pci.c,v 1.13 2009/06/26 20:40:12 deraadt Exp $ */ 2 /* $NetBSD: if_rtw_pci.c,v 1.1 2004/09/26 02:33:36 dyoung Exp $ */ 3 4 /*- 5 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center; Charles M. Hannum; and David Young. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * PCI bus front-end for the Realtek RTL8180L 802.11 MAC/BBP chip. 36 * 37 * Derived from the ADMtek ADM8211 PCI bus front-end. 38 * 39 * Derived from the ``Tulip'' PCI bus front-end. 40 */ 41 42 #include <sys/cdefs.h> 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/mbuf.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/device.h> 52 53 #include <machine/endian.h> 54 55 #include <net/if.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 #ifdef INET 59 #include <netinet/in.h> 60 #include <netinet/if_ether.h> 61 #endif 62 63 #include <net80211/ieee80211_radiotap.h> 64 #include <net80211/ieee80211_var.h> 65 66 #include <machine/bus.h> 67 #include <machine/intr.h> 68 69 #include <dev/ic/rtwreg.h> 70 #include <dev/ic/sa2400reg.h> 71 #include <dev/ic/rtwvar.h> 72 73 #include <dev/pci/pcivar.h> 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcidevs.h> 76 77 int rtw_pci_enable(struct rtw_softc *); 78 void rtw_pci_disable(struct rtw_softc *); 79 int rtw_pci_detach(struct device *, int); 80 81 /* 82 * PCI configuration space registers used by the RTL8180L. 83 */ 84 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 86 87 struct rtw_pci_softc { 88 struct rtw_softc psc_rtw; /* real RTL8180L softc */ 89 90 pci_intr_handle_t psc_ih; /* interrupt handle */ 91 void *psc_intrcookie; 92 93 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 94 pcitag_t psc_pcitag; /* our PCI tag */ 95 bus_size_t psc_mapsize; 96 }; 97 98 int rtw_pci_match(struct device *, void *, void *); 99 void rtw_pci_attach(struct device *, struct device *, void *); 100 101 struct cfattach rtw_pci_ca = { 102 sizeof (struct rtw_pci_softc), rtw_pci_match, rtw_pci_attach, 103 rtw_pci_detach 104 }; 105 106 const struct pci_matchid rtw_pci_products[] = { 107 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180 }, 108 #ifdef RTW_DEBUG 109 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8185 }, 110 { PCI_VENDOR_BELKIN2, PCI_PRODUCT_BELKIN2_F5D7010 }, 111 #endif 112 { PCI_VENDOR_BELKIN2, PCI_PRODUCT_BELKIN2_F5D6001 }, 113 { PCI_VENDOR_BELKIN2, PCI_PRODUCT_BELKIN2_F5D6020V3 }, 114 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610 }, 115 }; 116 117 int 118 rtw_pci_match(struct device *parent, void *match, void *aux) 119 { 120 return (pci_matchbyid((struct pci_attach_args *)aux, rtw_pci_products, 121 sizeof(rtw_pci_products)/sizeof(rtw_pci_products[0]))); 122 } 123 124 int 125 rtw_pci_enable(struct rtw_softc *sc) 126 { 127 struct rtw_pci_softc *psc = (void *)sc; 128 129 /* Establish the interrupt. */ 130 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 131 IPL_NET, rtw_intr, sc, sc->sc_dev.dv_xname); 132 if (psc->psc_intrcookie == NULL) { 133 printf("%s: unable to establish interrupt\n", 134 sc->sc_dev.dv_xname); 135 return (1); 136 } 137 138 return (0); 139 } 140 141 void 142 rtw_pci_disable(struct rtw_softc *sc) 143 { 144 struct rtw_pci_softc *psc = (void *)sc; 145 146 /* Unhook the interrupt handler. */ 147 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 148 psc->psc_intrcookie = NULL; 149 } 150 151 void 152 rtw_pci_attach(struct device *parent, struct device *self, void *aux) 153 { 154 struct rtw_pci_softc *psc = (void *) self; 155 struct rtw_softc *sc = &psc->psc_rtw; 156 struct rtw_regs *regs = &sc->sc_regs; 157 struct pci_attach_args *pa = aux; 158 pci_chipset_tag_t pc = pa->pa_pc; 159 const char *intrstr = NULL; 160 bus_space_tag_t iot, memt; 161 bus_space_handle_t ioh, memh; 162 bus_size_t iosize, memsize; 163 int ioh_valid, memh_valid; 164 int state; 165 166 psc->psc_pc = pa->pa_pc; 167 psc->psc_pcitag = pa->pa_tag; 168 169 /* 170 * No power management hooks. 171 * XXX Maybe we should add some! 172 */ 173 sc->sc_flags |= RTW_F_ENABLED; 174 175 /* 176 * Get revision info, and set some chip-specific variables. 177 */ 178 sc->sc_rev = PCI_REVISION(pa->pa_class); 179 180 /* 181 * Check to see if the device is in power-save mode, and 182 * being it out if necessary. 183 * 184 * XXX This code comes almost verbatim from if_tlp_pci.c. I do 185 * not understand it. Tulip clears the "sleep mode" bit in the 186 * CFDA register, first. There is an equivalent (?) register at the 187 * same place in the ADM8211, but the docs do not assign its bits 188 * any meanings. -dcy 189 */ 190 state = pci_set_powerstate(pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 191 if (state == PCI_PMCSR_STATE_D3) { 192 /* 193 * The card has lost all configuration data in 194 * this state, so punt. 195 */ 196 printf(": unable to wake up from power state D3, " 197 "reboot required.\n"); 198 return; 199 } 200 201 /* 202 * Map the device. 203 */ 204 ioh_valid = (pci_mapreg_map(pa, RTW_PCI_IOBA, 205 PCI_MAPREG_TYPE_IO, 0, 206 &iot, &ioh, NULL, &iosize, 0) == 0); 207 memh_valid = (pci_mapreg_map(pa, RTW_PCI_MMBA, 208 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 209 &memt, &memh, NULL, &memsize, 0) == 0); 210 211 if (memh_valid) { 212 regs->r_bt = memt; 213 regs->r_bh = memh; 214 psc->psc_mapsize = memsize; 215 } else if (ioh_valid) { 216 regs->r_bt = iot; 217 regs->r_bh = ioh; 218 psc->psc_mapsize = iosize; 219 } else { 220 printf(": unable to map device registers\n"); 221 return; 222 } 223 224 sc->sc_dmat = pa->pa_dmat; 225 226 /* 227 * Map and establish our interrupt. 228 */ 229 if (pci_intr_map(pa, &psc->psc_ih)) { 230 printf(": unable to map interrupt\n"); 231 return; 232 } 233 intrstr = pci_intr_string(pc, psc->psc_ih); 234 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 235 rtw_intr, sc, sc->sc_dev.dv_xname); 236 if (psc->psc_intrcookie == NULL) { 237 printf(": unable to establish interrupt"); 238 if (intrstr != NULL) 239 printf(" at %s", intrstr); 240 printf("\n"); 241 return; 242 } 243 244 printf(": %s\n", intrstr); 245 246 sc->sc_enable = rtw_pci_enable; 247 sc->sc_disable = rtw_pci_disable; 248 249 /* 250 * Finish off the attach. 251 */ 252 rtw_attach(sc); 253 } 254 255 int 256 rtw_pci_detach(struct device *self, int flags) 257 { 258 struct rtw_pci_softc *psc = (void *)self; 259 struct rtw_softc *sc = &psc->psc_rtw; 260 struct rtw_regs *regs = &sc->sc_regs; 261 int rv; 262 263 rv = rtw_detach(sc); 264 if (rv) 265 return (rv); 266 if (psc->psc_intrcookie != NULL) 267 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 268 bus_space_unmap(regs->r_bt, regs->r_bh, psc->psc_mapsize); 269 270 return (0); 271 } 272