1 /* $OpenBSD: if_wi_pci.c,v 1.48 2010/09/07 16:21:45 deraadt Exp $ */ 2 3 /* 4 * Copyright (c) 2001-2003 Todd C. Miller <Todd.Miller@courtesan.com> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * 18 * Sponsored in part by the Defense Advanced Research Projects 19 * Agency (DARPA) and Air Force Research Laboratory, Air Force 20 * Materiel Command, USAF, under agreement number F39502-99-1-0512. 21 */ 22 23 /* 24 * PCI attachment for the Wavelan driver. There are two basic types 25 * of PCI card supported: 26 * 27 * 1) Cards based on the Prism2.5 Mini-PCI chipset 28 * 2) Cards that use a dumb PCMCIA->PCI bridge 29 * 30 * Only the first type are "true" PCI cards. 31 * 32 * The latter are simply PCMCIA cards (or the guts of same) with some 33 * type of dumb PCMCIA->PCI bridge. They are "dumb" in that they 34 * are not true PCMCIA bridges and really just serve to deal with 35 * the different interrupt types and timings of the ISA vs. PCI bus. 36 * 37 * The following bridge types are supported: 38 * o PLX 9052 (the most common) 39 * o TMD 7160 (found in some NDC/Sohoware NCP130 cards) 40 * o ACEX EP1K30 (really a PLD, found in Symbol cards and their OEMs) 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/timeout.h> 47 #include <sys/socket.h> 48 #include <sys/tree.h> 49 #include <sys/workq.h> 50 51 #include <net/if.h> 52 #include <net/if_dl.h> 53 #include <net/if_media.h> 54 55 #ifdef INET 56 #include <netinet/in.h> 57 #include <netinet/if_ether.h> 58 #endif 59 60 #include <net80211/ieee80211_var.h> 61 #include <net80211/ieee80211_ioctl.h> 62 63 #include <machine/bus.h> 64 65 #include <dev/pci/pcireg.h> 66 #include <dev/pci/pcivar.h> 67 #include <dev/pci/pcidevs.h> 68 69 #include <dev/ic/if_wireg.h> 70 #include <dev/ic/if_wi_ieee.h> 71 #include <dev/ic/if_wivar.h> 72 73 /* For printing CIS of the actual PCMCIA card */ 74 #define CIS_MFG_NAME_OFFSET 0x16 75 #define CIS_INFO_SIZE 256 76 77 const struct wi_pci_product *wi_pci_lookup(struct pci_attach_args *pa); 78 int wi_pci_match(struct device *, void *, void *); 79 void wi_pci_attach(struct device *, struct device *, void *); 80 int wi_pci_activate(struct device *, int); 81 void wi_pci_resume(void *arg1, void *arg2); 82 int wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc); 83 int wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc); 84 int wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc); 85 int wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc); 86 int wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc); 87 void wi_pci_plx_print_cis(struct wi_softc *); 88 89 struct wi_pci_softc { 90 struct wi_softc sc_wi; /* real softc */ 91 struct workq_task sc_resume_wqt; 92 }; 93 94 struct cfattach wi_pci_ca = { 95 sizeof (struct wi_pci_softc), wi_pci_match, wi_pci_attach, NULL, 96 wi_pci_activate 97 }; 98 99 static const struct wi_pci_product { 100 pci_vendor_id_t pp_vendor; 101 pci_product_id_t pp_product; 102 int (*pp_attach)(struct pci_attach_args *pa, struct wi_softc *sc); 103 } wi_pci_products[] = { 104 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P, wi_pci_plx_attach }, 105 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02, wi_pci_plx_attach }, 106 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P03, wi_pci_plx_attach }, 107 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_8031, wi_pci_plx_attach }, 108 { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P, wi_pci_plx_attach }, 109 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_WL11000P, wi_pci_plx_attach }, 110 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A, wi_pci_plx_attach }, 111 { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301, wi_pci_plx_attach }, 112 { PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_SS1023, wi_pci_plx_attach }, 113 { PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_AWA100, wi_pci_plx_attach }, 114 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6000, wi_pci_plx_attach }, 115 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130, wi_pci_plx_attach }, 116 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2, wi_pci_tmd_attach }, 117 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN, wi_pci_native_attach }, 118 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_ISL3872, wi_pci_native_attach }, 119 { PCI_VENDOR_SAMSUNG, PCI_PRODUCT_SAMSUNG_SWL2210P, wi_pci_native_attach }, 120 { PCI_VENDOR_NORTEL, PCI_PRODUCT_NORTEL_211818A, wi_pci_acex_attach }, 121 { PCI_VENDOR_SYMBOL, PCI_PRODUCT_SYMBOL_LA41X3, wi_pci_acex_attach }, 122 { 0, 0, 0 } 123 }; 124 125 const struct wi_pci_product * 126 wi_pci_lookup(struct pci_attach_args *pa) 127 { 128 const struct wi_pci_product *pp; 129 130 for (pp = wi_pci_products; pp->pp_product != 0; pp++) { 131 if (PCI_VENDOR(pa->pa_id) == pp->pp_vendor && 132 PCI_PRODUCT(pa->pa_id) == pp->pp_product) 133 return (pp); 134 } 135 136 return (NULL); 137 } 138 139 int 140 wi_pci_match(struct device *parent, void *match, void *aux) 141 { 142 return (wi_pci_lookup(aux) != NULL); 143 } 144 145 void 146 wi_pci_attach(struct device *parent, struct device *self, void *aux) 147 { 148 struct wi_softc *sc = (struct wi_softc *)self; 149 struct pci_attach_args *pa = aux; 150 const struct wi_pci_product *pp; 151 152 pp = wi_pci_lookup(pa); 153 if (pp->pp_attach(pa, sc) != 0) 154 return; 155 printf("\n"); 156 wi_attach(sc, &wi_func_io); 157 } 158 159 int 160 wi_pci_activate(struct device *self, int act) 161 { 162 struct wi_pci_softc *psc = (struct wi_pci_softc *)self; 163 struct wi_softc *sc = (struct wi_softc *)self; 164 struct ifnet *ifp = &sc->sc_ic.ic_if; 165 166 switch (act) { 167 case DVACT_SUSPEND: 168 if (ifp->if_flags & IFF_RUNNING) 169 wi_stop(sc); 170 break; 171 case DVACT_RESUME: 172 if (ifp->if_flags & IFF_UP) 173 workq_queue_task(NULL, &psc->sc_resume_wqt, 0, 174 wi_pci_resume, sc, NULL); 175 break; 176 } 177 return (0); 178 } 179 180 void 181 wi_pci_resume(void *arg1, void *arg2) 182 { 183 struct wi_softc *sc = (struct wi_softc *)arg1; 184 185 int s; 186 187 s = splnet(); 188 while (sc->wi_flags & WI_FLAGS_BUSY) 189 tsleep(&sc->wi_flags, 0, "wipwr", 0); 190 sc->wi_flags |= WI_FLAGS_BUSY; 191 192 wi_init(sc); 193 194 sc->wi_flags &= ~WI_FLAGS_BUSY; 195 wakeup(&sc->wi_flags); 196 splx(s); 197 } 198 199 /* 200 * ACEX EP1K30-based PCMCIA->PCI bridge attachment. 201 * 202 * The ACEX EP1K30 is a programmable logic device (PLD) used as a 203 * PCMCIA->PCI bridge on the Symbol LA4123 and its OEM equivalents 204 * (such as the Nortel E-mobility 211818-A). There are 3 I/O ports: 205 * BAR0 at 0x10 appears to be a command port. 206 * BAR1 at 0x14 contains COR at offset 0xe0. 207 * BAR2 at 0x18 maps the actual PCMCIA card. 208 * 209 * The datasheet for the ACEX EP1K30 is available from Altera but that 210 * doesn't really help much since we don't know how it is programmed. 211 * Details for this attachment were gleaned from a version of the 212 * Linux orinoco driver modified by Tobias Hoffmann based on 213 * what he discoverd from the Windows driver. 214 */ 215 int 216 wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc) 217 { 218 bus_space_handle_t commandh, localh, ioh; 219 bus_space_tag_t commandt, localt; 220 bus_space_tag_t iot = pa->pa_iot; 221 bus_size_t commandsize, localsize, iosize; 222 int i; 223 224 if (pci_mapreg_map(pa, WI_ACEX_CMDRES, PCI_MAPREG_TYPE_IO, 225 0, &commandt, &commandh, NULL, &commandsize, 0) != 0) { 226 printf(": can't map command i/o space\n"); 227 return (ENXIO); 228 } 229 230 if (pci_mapreg_map(pa, WI_ACEX_LOCALRES, PCI_MAPREG_TYPE_IO, 231 0, &localt, &localh, NULL, &localsize, 0) != 0) { 232 printf(": can't map local i/o space\n"); 233 bus_space_unmap(commandt, commandh, commandsize); 234 return (ENXIO); 235 } 236 sc->wi_ltag = localt; 237 sc->wi_lhandle = localh; 238 239 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 240 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 241 printf(": can't map i/o space\n"); 242 bus_space_unmap(localt, localh, localsize); 243 bus_space_unmap(commandt, commandh, commandsize); 244 return (ENXIO); 245 } 246 sc->wi_btag = iot; 247 sc->wi_bhandle = ioh; 248 249 /* 250 * Setup bridge chip. 251 */ 252 if (bus_space_read_4(commandt, commandh, 0) & 1) { 253 printf(": bridge not ready\n"); 254 bus_space_unmap(iot, ioh, iosize); 255 bus_space_unmap(localt, localh, localsize); 256 bus_space_unmap(commandt, commandh, commandsize); 257 return (ENXIO); 258 } 259 bus_space_write_4(commandt, commandh, 2, 0x118); 260 bus_space_write_4(commandt, commandh, 2, 0x108); 261 DELAY(30 * 1000); 262 bus_space_write_4(commandt, commandh, 2, 0x8); 263 for (i = 0; i < 30; i++) { 264 DELAY(30 * 1000); 265 if (bus_space_read_4(commandt, commandh, 0) & 0x10) 266 break; 267 } 268 if (i == 30) { 269 printf(": bridge timeout\n"); 270 bus_space_unmap(iot, ioh, iosize); 271 bus_space_unmap(localt, localh, localsize); 272 bus_space_unmap(commandt, commandh, commandsize); 273 return (ENXIO); 274 } 275 if ((bus_space_read_4(localt, localh, 0xe0) & 1) || 276 (bus_space_read_4(localt, localh, 0xe2) & 1) || 277 (bus_space_read_4(localt, localh, 0xe4) & 1)) { 278 printf(": failed bridge setup\n"); 279 bus_space_unmap(iot, ioh, iosize); 280 bus_space_unmap(localt, localh, localsize); 281 bus_space_unmap(commandt, commandh, commandsize); 282 return (ENXIO); 283 } 284 285 if (wi_pci_common_attach(pa, sc) != 0) { 286 bus_space_unmap(iot, ioh, iosize); 287 bus_space_unmap(localt, localh, localsize); 288 bus_space_unmap(commandt, commandh, commandsize); 289 return (ENXIO); 290 } 291 292 /* 293 * Enable I/O mode and level interrupts on the embedded PCMCIA 294 * card. 295 */ 296 bus_space_write_1(localt, localh, WI_ACEX_COR_OFFSET, WI_COR_IOMODE); 297 sc->wi_cor_offset = WI_ACEX_COR_OFFSET; 298 299 /* Unmap registers we no longer need access to. */ 300 bus_space_unmap(commandt, commandh, commandsize); 301 302 return (0); 303 } 304 305 /* 306 * PLX 9052-based PCMCIA->PCI bridge attachment. 307 * 308 * These are often sold as "PCI wireless card adapters" and are 309 * sold by several vendors. Most are simply rebadged versions of the 310 * Eumitcom WL11000P or Global Sun Technology GL24110P02. 311 * These cards use the PLX 9052 dumb bridge chip to connect a PCMCIA 312 * wireless card to the PCI bus. Because it is a dumb bridge and 313 * not a true PCMCIA bridge, the PCMCIA subsystem is not involved 314 * (or even required). The PLX 9052 provides multiple PCI address 315 * space mappings. The primary mappings at PCI registers 0x10 (mem) 316 * and 0x14 (I/O) are for the PLX chip itself, *NOT* the PCMCIA card. 317 * The mem and I/O spaces for the PCMCIA card are mapped to 0x18 and 318 * 0x1C respectively. 319 * The PLX 9050/9052 datasheet may be downloaded from PLX at 320 * http://www.plxtech.com/products/toolbox/9050.htm 321 */ 322 int 323 wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc) 324 { 325 bus_space_handle_t localh, ioh, memh; 326 bus_space_tag_t localt; 327 bus_space_tag_t iot = pa->pa_iot; 328 bus_space_tag_t memt = pa->pa_memt; 329 bus_size_t localsize, memsize, iosize; 330 u_int32_t intcsr; 331 332 if (pci_mapreg_map(pa, WI_PLX_MEMRES, PCI_MAPREG_TYPE_MEM, 0, 333 &memt, &memh, NULL, &memsize, 0) != 0) { 334 printf(": can't map mem space\n"); 335 return (ENXIO); 336 } 337 sc->wi_ltag = memt; 338 sc->wi_lhandle = memh; 339 340 if (pci_mapreg_map(pa, WI_PLX_IORES, 341 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 342 printf(": can't map i/o space\n"); 343 bus_space_unmap(memt, memh, memsize); 344 return (ENXIO); 345 } 346 sc->wi_btag = iot; 347 sc->wi_bhandle = ioh; 348 349 /* 350 * Some cards, such as the PLX version of the NDC NCP130, 351 * don't have the PLX local registers mapped. In general 352 * this is OK since on those cards the serial EEPROM has 353 * already set things up for us. 354 * As such, we don't consider an error here to be fatal. 355 */ 356 localsize = 0; 357 if (pci_mapreg_type(pa->pa_pc, pa->pa_tag, WI_PLX_LOCALRES) 358 == PCI_MAPREG_TYPE_IO) { 359 if (pci_mapreg_map(pa, WI_PLX_LOCALRES, PCI_MAPREG_TYPE_IO, 360 0, &localt, &localh, NULL, &localsize, 0) != 0) 361 printf(": can't map PLX I/O space\n"); 362 } 363 364 if (wi_pci_common_attach(pa, sc) != 0) { 365 if (localsize) 366 bus_space_unmap(localt, localh, localsize); 367 bus_space_unmap(iot, ioh, iosize); 368 bus_space_unmap(memt, memh, memsize); 369 return (ENXIO); 370 } 371 372 if (localsize != 0) { 373 intcsr = bus_space_read_4(localt, localh, 374 WI_PLX_INTCSR); 375 376 /* 377 * The Netgear MA301 has local interrupt 1 active 378 * when there is no card in the adapter. We bail 379 * early in this case since our attempt to check 380 * for the presence of a card later will hang the 381 * MA301. 382 */ 383 if (intcsr & WI_PLX_LINT1STAT) { 384 printf("\n%s: no PCMCIA card detected in bridge card\n", 385 WI_PRT_ARG(sc)); 386 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 387 if (localsize) 388 bus_space_unmap(localt, localh, localsize); 389 bus_space_unmap(iot, ioh, iosize); 390 bus_space_unmap(memt, memh, memsize); 391 return (ENXIO); 392 } 393 394 /* 395 * Enable PCI interrupts on the PLX chip if they are 396 * not already enabled. On most adapters the serial 397 * EEPROM has done this for us but some (such as 398 * the Netgear MA301) do not. 399 */ 400 if (!(intcsr & WI_PLX_INTEN)) { 401 intcsr |= WI_PLX_INTEN; 402 bus_space_write_4(localt, localh, WI_PLX_INTCSR, 403 intcsr); 404 } 405 } 406 407 /* 408 * Enable I/O mode and level interrupts on the PCMCIA card. 409 * The PCMCIA card's COR is the first byte after the CIS. 410 */ 411 bus_space_write_1(memt, memh, WI_PLX_COR_OFFSET, WI_COR_IOMODE); 412 sc->wi_cor_offset = WI_PLX_COR_OFFSET; 413 414 if (localsize != 0) { 415 /* 416 * Test the presence of a wi(4) card by writing 417 * a magic number to the first software support 418 * register and then reading it back. 419 */ 420 CSR_WRITE_2(sc, WI_SW0, WI_DRVR_MAGIC); 421 DELAY(1000); 422 if (CSR_READ_2(sc, WI_SW0) != WI_DRVR_MAGIC) { 423 printf("\n%s: no PCMCIA card detected in bridge card\n", 424 WI_PRT_ARG(sc)); 425 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 426 if (localsize) 427 bus_space_unmap(localt, localh, localsize); 428 bus_space_unmap(iot, ioh, iosize); 429 bus_space_unmap(memt, memh, memsize); 430 return (ENXIO); 431 } 432 433 /* Unmap registers we no longer need access to. */ 434 bus_space_unmap(localt, localh, localsize); 435 436 /* Print PCMCIA card's CIS strings. */ 437 wi_pci_plx_print_cis(sc); 438 } 439 440 return (0); 441 } 442 443 /* 444 * TMD 7160-based PCMCIA->PCI bridge attachment. 445 * 446 * The TMD7160 dumb bridge chip is used on some versions of the 447 * NDC/Sohoware NCP130. The TMD7160 provides two PCI I/O registers. 448 * The first, at 0x14, maps to the Prism2 COR. 449 * The second, at 0x18, is for the Prism2 chip itself. 450 * 451 * The datasheet for the TMD7160 does not seem to be publicly available. 452 * Details for this attachment were gleaned from a version of the 453 * Linux WLAN driver modified by NDC. 454 */ 455 int 456 wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc) 457 { 458 bus_space_handle_t localh, ioh; 459 bus_space_tag_t localt; 460 bus_space_tag_t iot = pa->pa_iot; 461 bus_size_t localsize, iosize; 462 463 if (pci_mapreg_map(pa, WI_TMD_LOCALRES, PCI_MAPREG_TYPE_IO, 464 0, &localt, &localh, NULL, &localsize, 0) != 0) { 465 printf(": can't map TMD I/O space\n"); 466 return (ENXIO); 467 } 468 sc->wi_ltag = localt; 469 sc->wi_lhandle = localh; 470 471 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 472 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 473 printf(": can't map i/o space\n"); 474 bus_space_unmap(localt, localh, localsize); 475 return (ENXIO); 476 } 477 sc->wi_btag = iot; 478 sc->wi_bhandle = ioh; 479 480 if (wi_pci_common_attach(pa, sc) != 0) { 481 bus_space_unmap(iot, ioh, iosize); 482 bus_space_unmap(localt, localh, localsize); 483 return (ENXIO); 484 } 485 486 /* 487 * Enable I/O mode and level interrupts on the embedded PCMCIA 488 * card. The PCMCIA card's COR is the first byte of BAR 0. 489 */ 490 bus_space_write_1(localt, localh, 0, WI_COR_IOMODE); 491 sc->wi_cor_offset = 0; 492 493 return (0); 494 } 495 496 int 497 wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc) 498 { 499 bus_space_handle_t ioh; 500 bus_space_tag_t iot = pa->pa_iot; 501 bus_size_t iosize; 502 503 if (pci_mapreg_map(pa, WI_PCI_CBMA, PCI_MAPREG_TYPE_MEM, 504 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 505 printf(": can't map mem space\n"); 506 return (ENXIO); 507 } 508 sc->wi_ltag = iot; 509 sc->wi_lhandle = ioh; 510 sc->wi_btag = iot; 511 sc->wi_bhandle = ioh; 512 sc->sc_pci = 1; 513 514 if (wi_pci_common_attach(pa, sc) != 0) { 515 bus_space_unmap(iot, ioh, iosize); 516 return (ENXIO); 517 } 518 519 /* Do a soft reset of the HFA3842 MAC core */ 520 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_SOFT_RESET); 521 DELAY(100*1000); /* 100 m sec */ 522 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_CLEAR); 523 DELAY(100*1000); /* 100 m sec */ 524 sc->wi_cor_offset = WI_PCI_COR_OFFSET; 525 526 return (0); 527 } 528 529 int 530 wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc) 531 { 532 pci_intr_handle_t ih; 533 pci_chipset_tag_t pc = pa->pa_pc; 534 const char *intrstr; 535 536 /* Make sure interrupts are disabled. */ 537 CSR_WRITE_2(sc, WI_INT_EN, 0); 538 CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF); 539 540 /* Map and establish the interrupt. */ 541 if (pci_intr_map(pa, &ih)) { 542 printf(": couldn't map interrupt\n"); 543 return (ENXIO); 544 } 545 intrstr = pci_intr_string(pc, ih); 546 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc, 547 sc->sc_dev.dv_xname); 548 if (sc->sc_ih == NULL) { 549 printf(": couldn't establish interrupt"); 550 if (intrstr != NULL) 551 printf(" at %s", intrstr); 552 printf("\n"); 553 return (ENXIO); 554 } 555 printf(": %s", intrstr); 556 557 return (0); 558 } 559 560 void 561 wi_pci_plx_print_cis(struct wi_softc *sc) 562 { 563 int i, stringno; 564 char cisbuf[CIS_INFO_SIZE]; 565 char *cis_strings[3]; 566 u_int8_t value; 567 const u_int8_t cis_magic[] = { 568 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 569 }; 570 571 /* Make sure the CIS data is valid. */ 572 for (i = 0; i < 8; i++) { 573 value = bus_space_read_1(sc->wi_ltag, sc->wi_lhandle, i * 2); 574 if (value != cis_magic[i]) 575 return; 576 } 577 578 cis_strings[0] = cisbuf; 579 stringno = 0; 580 for (i = 0; i < CIS_INFO_SIZE && stringno < 3; i++) { 581 cisbuf[i] = bus_space_read_1(sc->wi_ltag, 582 sc->wi_lhandle, (CIS_MFG_NAME_OFFSET + i) * 2); 583 if (cisbuf[i] == '\0' && ++stringno < 3) 584 cis_strings[stringno] = &cisbuf[i + 1]; 585 } 586 cisbuf[CIS_INFO_SIZE - 1] = '\0'; 587 printf("\n%s: \"%s, %s, %s\"", WI_PRT_ARG(sc), 588 cis_strings[0], cis_strings[1], cis_strings[2]); 589 } 590