1 /* $OpenBSD: if_wi_pci.c,v 1.54 2019/12/31 10:05:32 mpi Exp $ */ 2 3 /* 4 * Copyright (c) 2001-2003 Todd C. Miller <millert@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * 18 * Sponsored in part by the Defense Advanced Research Projects 19 * Agency (DARPA) and Air Force Research Laboratory, Air Force 20 * Materiel Command, USAF, under agreement number F39502-99-1-0512. 21 */ 22 23 /* 24 * PCI attachment for the Wavelan driver. There are two basic types 25 * of PCI card supported: 26 * 27 * 1) Cards based on the Prism2.5 Mini-PCI chipset 28 * 2) Cards that use a dumb PCMCIA->PCI bridge 29 * 30 * Only the first type are "true" PCI cards. 31 * 32 * The latter are simply PCMCIA cards (or the guts of same) with some 33 * type of dumb PCMCIA->PCI bridge. They are "dumb" in that they 34 * are not true PCMCIA bridges and really just serve to deal with 35 * the different interrupt types and timings of the ISA vs. PCI bus. 36 * 37 * The following bridge types are supported: 38 * o PLX 9052 (the most common) 39 * o TMD 7160 (found in some NDC/Sohoware NCP130 cards) 40 * o ACEX EP1K30 (really a PLD, found in Symbol cards and their OEMs) 41 */ 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/device.h> 46 #include <sys/timeout.h> 47 #include <sys/socket.h> 48 #include <sys/tree.h> 49 50 #include <net/if.h> 51 #include <net/if_media.h> 52 53 #include <netinet/in.h> 54 #include <netinet/if_ether.h> 55 56 #include <net80211/ieee80211_var.h> 57 #include <net80211/ieee80211_ioctl.h> 58 59 #include <machine/bus.h> 60 61 #include <dev/pci/pcireg.h> 62 #include <dev/pci/pcivar.h> 63 #include <dev/pci/pcidevs.h> 64 65 #include <dev/ic/if_wireg.h> 66 #include <dev/ic/if_wi_ieee.h> 67 #include <dev/ic/if_wivar.h> 68 69 /* For printing CIS of the actual PCMCIA card */ 70 #define CIS_MFG_NAME_OFFSET 0x16 71 #define CIS_INFO_SIZE 256 72 73 const struct wi_pci_product *wi_pci_lookup(struct pci_attach_args *pa); 74 int wi_pci_match(struct device *, void *, void *); 75 void wi_pci_attach(struct device *, struct device *, void *); 76 int wi_pci_activate(struct device *, int); 77 void wi_pci_wakeup(struct wi_softc *); 78 int wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc); 79 int wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc); 80 int wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc); 81 int wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc); 82 int wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc); 83 void wi_pci_plx_print_cis(struct wi_softc *); 84 85 struct wi_pci_softc { 86 struct wi_softc sc_wi; /* real softc */ 87 }; 88 89 struct cfattach wi_pci_ca = { 90 sizeof (struct wi_pci_softc), wi_pci_match, wi_pci_attach, NULL, 91 wi_pci_activate 92 }; 93 94 static const struct wi_pci_product { 95 pci_vendor_id_t pp_vendor; 96 pci_product_id_t pp_product; 97 int (*pp_attach)(struct pci_attach_args *pa, struct wi_softc *sc); 98 } wi_pci_products[] = { 99 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P, wi_pci_plx_attach }, 100 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02, wi_pci_plx_attach }, 101 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P03, wi_pci_plx_attach }, 102 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_8031, wi_pci_plx_attach }, 103 { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P, wi_pci_plx_attach }, 104 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_WL11000P, wi_pci_plx_attach }, 105 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A, wi_pci_plx_attach }, 106 { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301, wi_pci_plx_attach }, 107 { PCI_VENDOR_EFFICIENTNETS, PCI_PRODUCT_EFFICIENTNETS_SS1023, wi_pci_plx_attach }, 108 { PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_AWA100, wi_pci_plx_attach }, 109 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6000, wi_pci_plx_attach }, 110 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130, wi_pci_plx_attach }, 111 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130A2, wi_pci_tmd_attach }, 112 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN, wi_pci_native_attach }, 113 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_ISL3872, wi_pci_native_attach }, 114 { PCI_VENDOR_SAMSUNG, PCI_PRODUCT_SAMSUNG_SWL2210P, wi_pci_native_attach }, 115 { PCI_VENDOR_NORTEL, PCI_PRODUCT_NORTEL_211818A, wi_pci_acex_attach }, 116 { PCI_VENDOR_SYMBOL, PCI_PRODUCT_SYMBOL_LA41X3, wi_pci_acex_attach }, 117 { 0, 0, 0 } 118 }; 119 120 const struct wi_pci_product * 121 wi_pci_lookup(struct pci_attach_args *pa) 122 { 123 const struct wi_pci_product *pp; 124 125 for (pp = wi_pci_products; pp->pp_product != 0; pp++) { 126 if (PCI_VENDOR(pa->pa_id) == pp->pp_vendor && 127 PCI_PRODUCT(pa->pa_id) == pp->pp_product) 128 return (pp); 129 } 130 131 return (NULL); 132 } 133 134 int 135 wi_pci_match(struct device *parent, void *match, void *aux) 136 { 137 return (wi_pci_lookup(aux) != NULL); 138 } 139 140 void 141 wi_pci_attach(struct device *parent, struct device *self, void *aux) 142 { 143 struct wi_softc *sc = (struct wi_softc *)self; 144 struct pci_attach_args *pa = aux; 145 const struct wi_pci_product *pp; 146 147 pp = wi_pci_lookup(pa); 148 if (pp->pp_attach(pa, sc) != 0) 149 return; 150 printf("\n"); 151 wi_attach(sc, &wi_func_io); 152 } 153 154 int 155 wi_pci_activate(struct device *self, int act) 156 { 157 struct wi_softc *sc = (struct wi_softc *)self; 158 struct ifnet *ifp = &sc->sc_ic.ic_if; 159 160 switch (act) { 161 case DVACT_SUSPEND: 162 if (ifp->if_flags & IFF_RUNNING) 163 wi_stop(sc); 164 break; 165 case DVACT_WAKEUP: 166 if (ifp->if_flags & IFF_UP) 167 wi_pci_wakeup(sc); 168 break; 169 } 170 return (0); 171 } 172 173 void 174 wi_pci_wakeup(struct wi_softc *sc) 175 { 176 int s; 177 178 s = splnet(); 179 while (sc->wi_flags & WI_FLAGS_BUSY) 180 tsleep_nsec(&sc->wi_flags, 0, "wipwr", INFSLP); 181 sc->wi_flags |= WI_FLAGS_BUSY; 182 183 wi_init(sc); 184 185 sc->wi_flags &= ~WI_FLAGS_BUSY; 186 wakeup(&sc->wi_flags); 187 splx(s); 188 } 189 190 /* 191 * ACEX EP1K30-based PCMCIA->PCI bridge attachment. 192 * 193 * The ACEX EP1K30 is a programmable logic device (PLD) used as a 194 * PCMCIA->PCI bridge on the Symbol LA4123 and its OEM equivalents 195 * (such as the Nortel E-mobility 211818-A). There are 3 I/O ports: 196 * BAR0 at 0x10 appears to be a command port. 197 * BAR1 at 0x14 contains COR at offset 0xe0. 198 * BAR2 at 0x18 maps the actual PCMCIA card. 199 * 200 * The datasheet for the ACEX EP1K30 is available from Altera but that 201 * doesn't really help much since we don't know how it is programmed. 202 * Details for this attachment were gleaned from a version of the 203 * Linux orinoco driver modified by Tobias Hoffmann based on 204 * what he discoverd from the Windows driver. 205 */ 206 int 207 wi_pci_acex_attach(struct pci_attach_args *pa, struct wi_softc *sc) 208 { 209 bus_space_handle_t commandh, localh, ioh; 210 bus_space_tag_t commandt, localt; 211 bus_space_tag_t iot = pa->pa_iot; 212 bus_size_t commandsize, localsize, iosize; 213 int i; 214 215 if (pci_mapreg_map(pa, WI_ACEX_CMDRES, PCI_MAPREG_TYPE_IO, 216 0, &commandt, &commandh, NULL, &commandsize, 0) != 0) { 217 printf(": can't map command i/o space\n"); 218 return (ENXIO); 219 } 220 221 if (pci_mapreg_map(pa, WI_ACEX_LOCALRES, PCI_MAPREG_TYPE_IO, 222 0, &localt, &localh, NULL, &localsize, 0) != 0) { 223 printf(": can't map local i/o space\n"); 224 bus_space_unmap(commandt, commandh, commandsize); 225 return (ENXIO); 226 } 227 sc->wi_ltag = localt; 228 sc->wi_lhandle = localh; 229 230 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 231 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 232 printf(": can't map i/o space\n"); 233 bus_space_unmap(localt, localh, localsize); 234 bus_space_unmap(commandt, commandh, commandsize); 235 return (ENXIO); 236 } 237 sc->wi_btag = iot; 238 sc->wi_bhandle = ioh; 239 240 /* 241 * Setup bridge chip. 242 */ 243 if (bus_space_read_4(commandt, commandh, 0) & 1) { 244 printf(": bridge not ready\n"); 245 bus_space_unmap(iot, ioh, iosize); 246 bus_space_unmap(localt, localh, localsize); 247 bus_space_unmap(commandt, commandh, commandsize); 248 return (ENXIO); 249 } 250 bus_space_write_4(commandt, commandh, 2, 0x118); 251 bus_space_write_4(commandt, commandh, 2, 0x108); 252 DELAY(30 * 1000); 253 bus_space_write_4(commandt, commandh, 2, 0x8); 254 for (i = 0; i < 30; i++) { 255 DELAY(30 * 1000); 256 if (bus_space_read_4(commandt, commandh, 0) & 0x10) 257 break; 258 } 259 if (i == 30) { 260 printf(": bridge timeout\n"); 261 bus_space_unmap(iot, ioh, iosize); 262 bus_space_unmap(localt, localh, localsize); 263 bus_space_unmap(commandt, commandh, commandsize); 264 return (ENXIO); 265 } 266 if ((bus_space_read_4(localt, localh, 0xe0) & 1) || 267 (bus_space_read_4(localt, localh, 0xe2) & 1) || 268 (bus_space_read_4(localt, localh, 0xe4) & 1)) { 269 printf(": failed bridge setup\n"); 270 bus_space_unmap(iot, ioh, iosize); 271 bus_space_unmap(localt, localh, localsize); 272 bus_space_unmap(commandt, commandh, commandsize); 273 return (ENXIO); 274 } 275 276 if (wi_pci_common_attach(pa, sc) != 0) { 277 bus_space_unmap(iot, ioh, iosize); 278 bus_space_unmap(localt, localh, localsize); 279 bus_space_unmap(commandt, commandh, commandsize); 280 return (ENXIO); 281 } 282 283 /* 284 * Enable I/O mode and level interrupts on the embedded PCMCIA 285 * card. 286 */ 287 bus_space_write_1(localt, localh, WI_ACEX_COR_OFFSET, WI_COR_IOMODE); 288 sc->wi_cor_offset = WI_ACEX_COR_OFFSET; 289 290 /* Unmap registers we no longer need access to. */ 291 bus_space_unmap(commandt, commandh, commandsize); 292 293 return (0); 294 } 295 296 /* 297 * PLX 9052-based PCMCIA->PCI bridge attachment. 298 * 299 * These are often sold as "PCI wireless card adapters" and are 300 * sold by several vendors. Most are simply rebadged versions of the 301 * Eumitcom WL11000P or Global Sun Technology GL24110P02. 302 * These cards use the PLX 9052 dumb bridge chip to connect a PCMCIA 303 * wireless card to the PCI bus. Because it is a dumb bridge and 304 * not a true PCMCIA bridge, the PCMCIA subsystem is not involved 305 * (or even required). The PLX 9052 provides multiple PCI address 306 * space mappings. The primary mappings at PCI registers 0x10 (mem) 307 * and 0x14 (I/O) are for the PLX chip itself, *NOT* the PCMCIA card. 308 * The mem and I/O spaces for the PCMCIA card are mapped to 0x18 and 309 * 0x1C respectively. 310 * The PLX 9050/9052 datasheet may be downloaded from PLX at 311 * http://www.plxtech.com/products/toolbox/9050.htm 312 */ 313 int 314 wi_pci_plx_attach(struct pci_attach_args *pa, struct wi_softc *sc) 315 { 316 bus_space_handle_t localh, ioh, memh; 317 bus_space_tag_t localt; 318 bus_space_tag_t iot = pa->pa_iot; 319 bus_space_tag_t memt = pa->pa_memt; 320 bus_size_t localsize, memsize, iosize; 321 u_int32_t intcsr; 322 323 if (pci_mapreg_map(pa, WI_PLX_MEMRES, PCI_MAPREG_TYPE_MEM, 0, 324 &memt, &memh, NULL, &memsize, 0) != 0) { 325 printf(": can't map mem space\n"); 326 return (ENXIO); 327 } 328 sc->wi_ltag = memt; 329 sc->wi_lhandle = memh; 330 331 if (pci_mapreg_map(pa, WI_PLX_IORES, 332 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 333 printf(": can't map i/o space\n"); 334 bus_space_unmap(memt, memh, memsize); 335 return (ENXIO); 336 } 337 sc->wi_btag = iot; 338 sc->wi_bhandle = ioh; 339 340 /* 341 * Some cards, such as the PLX version of the NDC NCP130, 342 * don't have the PLX local registers mapped. In general 343 * this is OK since on those cards the serial EEPROM has 344 * already set things up for us. 345 * As such, we don't consider an error here to be fatal. 346 */ 347 localsize = 0; 348 if (pci_mapreg_type(pa->pa_pc, pa->pa_tag, WI_PLX_LOCALRES) 349 == PCI_MAPREG_TYPE_IO) { 350 if (pci_mapreg_map(pa, WI_PLX_LOCALRES, PCI_MAPREG_TYPE_IO, 351 0, &localt, &localh, NULL, &localsize, 0) != 0) 352 printf(": can't map PLX I/O space\n"); 353 } 354 355 if (wi_pci_common_attach(pa, sc) != 0) { 356 if (localsize) 357 bus_space_unmap(localt, localh, localsize); 358 bus_space_unmap(iot, ioh, iosize); 359 bus_space_unmap(memt, memh, memsize); 360 return (ENXIO); 361 } 362 363 if (localsize != 0) { 364 intcsr = bus_space_read_4(localt, localh, 365 WI_PLX_INTCSR); 366 367 /* 368 * The Netgear MA301 has local interrupt 1 active 369 * when there is no card in the adapter. We bail 370 * early in this case since our attempt to check 371 * for the presence of a card later will hang the 372 * MA301. 373 */ 374 if (intcsr & WI_PLX_LINT1STAT) { 375 printf("\n%s: no PCMCIA card detected in bridge card\n", 376 WI_PRT_ARG(sc)); 377 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 378 if (localsize) 379 bus_space_unmap(localt, localh, localsize); 380 bus_space_unmap(iot, ioh, iosize); 381 bus_space_unmap(memt, memh, memsize); 382 return (ENXIO); 383 } 384 385 /* 386 * Enable PCI interrupts on the PLX chip if they are 387 * not already enabled. On most adapters the serial 388 * EEPROM has done this for us but some (such as 389 * the Netgear MA301) do not. 390 */ 391 if (!(intcsr & WI_PLX_INTEN)) { 392 intcsr |= WI_PLX_INTEN; 393 bus_space_write_4(localt, localh, WI_PLX_INTCSR, 394 intcsr); 395 } 396 } 397 398 /* 399 * Enable I/O mode and level interrupts on the PCMCIA card. 400 * The PCMCIA card's COR is the first byte after the CIS. 401 */ 402 bus_space_write_1(memt, memh, WI_PLX_COR_OFFSET, WI_COR_IOMODE); 403 sc->wi_cor_offset = WI_PLX_COR_OFFSET; 404 405 if (localsize != 0) { 406 /* 407 * Test the presence of a wi(4) card by writing 408 * a magic number to the first software support 409 * register and then reading it back. 410 */ 411 CSR_WRITE_2(sc, WI_SW0, WI_DRVR_MAGIC); 412 DELAY(1000); 413 if (CSR_READ_2(sc, WI_SW0) != WI_DRVR_MAGIC) { 414 printf("\n%s: no PCMCIA card detected in bridge card\n", 415 WI_PRT_ARG(sc)); 416 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 417 if (localsize) 418 bus_space_unmap(localt, localh, localsize); 419 bus_space_unmap(iot, ioh, iosize); 420 bus_space_unmap(memt, memh, memsize); 421 return (ENXIO); 422 } 423 424 /* Unmap registers we no longer need access to. */ 425 bus_space_unmap(localt, localh, localsize); 426 427 /* Print PCMCIA card's CIS strings. */ 428 wi_pci_plx_print_cis(sc); 429 } 430 431 return (0); 432 } 433 434 /* 435 * TMD 7160-based PCMCIA->PCI bridge attachment. 436 * 437 * The TMD7160 dumb bridge chip is used on some versions of the 438 * NDC/Sohoware NCP130. The TMD7160 provides two PCI I/O registers. 439 * The first, at 0x14, maps to the Prism2 COR. 440 * The second, at 0x18, is for the Prism2 chip itself. 441 * 442 * The datasheet for the TMD7160 does not seem to be publicly available. 443 * Details for this attachment were gleaned from a version of the 444 * Linux WLAN driver modified by NDC. 445 */ 446 int 447 wi_pci_tmd_attach(struct pci_attach_args *pa, struct wi_softc *sc) 448 { 449 bus_space_handle_t localh, ioh; 450 bus_space_tag_t localt; 451 bus_space_tag_t iot = pa->pa_iot; 452 bus_size_t localsize, iosize; 453 454 if (pci_mapreg_map(pa, WI_TMD_LOCALRES, PCI_MAPREG_TYPE_IO, 455 0, &localt, &localh, NULL, &localsize, 0) != 0) { 456 printf(": can't map TMD I/O space\n"); 457 return (ENXIO); 458 } 459 sc->wi_ltag = localt; 460 sc->wi_lhandle = localh; 461 462 if (pci_mapreg_map(pa, WI_TMD_IORES, PCI_MAPREG_TYPE_IO, 463 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 464 printf(": can't map i/o space\n"); 465 bus_space_unmap(localt, localh, localsize); 466 return (ENXIO); 467 } 468 sc->wi_btag = iot; 469 sc->wi_bhandle = ioh; 470 471 if (wi_pci_common_attach(pa, sc) != 0) { 472 bus_space_unmap(iot, ioh, iosize); 473 bus_space_unmap(localt, localh, localsize); 474 return (ENXIO); 475 } 476 477 /* 478 * Enable I/O mode and level interrupts on the embedded PCMCIA 479 * card. The PCMCIA card's COR is the first byte of BAR 0. 480 */ 481 bus_space_write_1(localt, localh, 0, WI_COR_IOMODE); 482 sc->wi_cor_offset = 0; 483 484 return (0); 485 } 486 487 int 488 wi_pci_native_attach(struct pci_attach_args *pa, struct wi_softc *sc) 489 { 490 bus_space_handle_t ioh; 491 bus_space_tag_t iot = pa->pa_iot; 492 bus_size_t iosize; 493 494 if (pci_mapreg_map(pa, WI_PCI_CBMA, PCI_MAPREG_TYPE_MEM, 495 0, &iot, &ioh, NULL, &iosize, 0) != 0) { 496 printf(": can't map mem space\n"); 497 return (ENXIO); 498 } 499 sc->wi_ltag = iot; 500 sc->wi_lhandle = ioh; 501 sc->wi_btag = iot; 502 sc->wi_bhandle = ioh; 503 sc->sc_pci = 1; 504 505 if (wi_pci_common_attach(pa, sc) != 0) { 506 bus_space_unmap(iot, ioh, iosize); 507 return (ENXIO); 508 } 509 510 /* Do a soft reset of the HFA3842 MAC core */ 511 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_SOFT_RESET); 512 DELAY(100*1000); /* 100 m sec */ 513 bus_space_write_2(iot, ioh, WI_PCI_COR_OFFSET, WI_COR_CLEAR); 514 DELAY(100*1000); /* 100 m sec */ 515 sc->wi_cor_offset = WI_PCI_COR_OFFSET; 516 517 return (0); 518 } 519 520 int 521 wi_pci_common_attach(struct pci_attach_args *pa, struct wi_softc *sc) 522 { 523 pci_intr_handle_t ih; 524 pci_chipset_tag_t pc = pa->pa_pc; 525 const char *intrstr; 526 527 /* Make sure interrupts are disabled. */ 528 CSR_WRITE_2(sc, WI_INT_EN, 0); 529 CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF); 530 531 /* Map and establish the interrupt. */ 532 if (pci_intr_map(pa, &ih)) { 533 printf(": couldn't map interrupt\n"); 534 return (ENXIO); 535 } 536 intrstr = pci_intr_string(pc, ih); 537 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc, 538 sc->sc_dev.dv_xname); 539 if (sc->sc_ih == NULL) { 540 printf(": couldn't establish interrupt"); 541 if (intrstr != NULL) 542 printf(" at %s", intrstr); 543 printf("\n"); 544 return (ENXIO); 545 } 546 printf(": %s", intrstr); 547 548 return (0); 549 } 550 551 void 552 wi_pci_plx_print_cis(struct wi_softc *sc) 553 { 554 int i, stringno; 555 char cisbuf[CIS_INFO_SIZE]; 556 char *cis_strings[3]; 557 u_int8_t value; 558 const u_int8_t cis_magic[] = { 559 0x01, 0x03, 0x00, 0x00, 0xff, 0x17, 0x04, 0x67 560 }; 561 562 /* Make sure the CIS data is valid. */ 563 for (i = 0; i < 8; i++) { 564 value = bus_space_read_1(sc->wi_ltag, sc->wi_lhandle, i * 2); 565 if (value != cis_magic[i]) 566 return; 567 } 568 569 cis_strings[0] = cisbuf; 570 stringno = 0; 571 for (i = 0; i < CIS_INFO_SIZE && stringno < 3; i++) { 572 cisbuf[i] = bus_space_read_1(sc->wi_ltag, 573 sc->wi_lhandle, (CIS_MFG_NAME_OFFSET + i) * 2); 574 if (cisbuf[i] == '\0' && ++stringno < 3) 575 cis_strings[stringno] = &cisbuf[i + 1]; 576 } 577 cisbuf[CIS_INFO_SIZE - 1] = '\0'; 578 printf("\n%s: \"%s, %s, %s\"", WI_PRT_ARG(sc), 579 cis_strings[0], cis_strings[1], cis_strings[2]); 580 } 581