1 /* $OpenBSD: if_xl_pci.c,v 1.42 2014/07/22 13:12:11 mpi Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 5 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD: if_xl.c,v 1.72 2000/01/09 21:12:59 wpaul Exp $ 35 */ 36 37 #include "bpfilter.h" 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/mbuf.h> 42 #include <sys/protosw.h> 43 #include <sys/socket.h> 44 #include <sys/ioctl.h> 45 #include <sys/errno.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/device.h> 49 50 #include <net/if.h> 51 #include <net/if_dl.h> 52 #include <net/if_types.h> 53 #include <net/if_media.h> 54 55 #ifdef INET 56 #include <netinet/in.h> 57 #include <netinet/if_ether.h> 58 #endif 59 60 #include <dev/mii/mii.h> 61 #include <dev/mii/miivar.h> 62 #include <dev/pci/pcireg.h> 63 #include <dev/pci/pcivar.h> 64 #include <dev/pci/pcidevs.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 /* 71 * The following #define causes the code to use PIO to access the 72 * chip's registers instead of memory mapped mode. The reason PIO mode 73 * is on by default is that the Etherlink XL manual seems to indicate 74 * that only the newer revision chips (3c905B) support both PIO and 75 * memory mapped access. Since we want to be compatible with the older 76 * bus master chips, we use PIO here. If you comment this out, the 77 * driver will use memory mapped I/O, which may be faster but which 78 * might not work on some devices. 79 */ 80 #define XL_USEIOSPACE 81 82 #define XL_PCI_FUNCMEM 0x0018 83 #define XL_PCI_INTR 0x0004 84 #define XL_PCI_INTRACK 0x8000 85 86 #include <dev/ic/xlreg.h> 87 88 int xl_pci_match(struct device *, void *, void *); 89 void xl_pci_attach(struct device *, struct device *, void *); 90 int xl_pci_detach(struct device *, int); 91 void xl_pci_intr_ack(struct xl_softc *); 92 #ifndef SMALL_KERNEL 93 void xl_pci_wol_power(void *); 94 #endif 95 96 struct xl_pci_softc { 97 struct xl_softc psc_softc; 98 pci_chipset_tag_t psc_pc; 99 pcitag_t psc_tag; 100 bus_size_t psc_iosize; 101 bus_size_t psc_funsize; 102 }; 103 104 struct cfattach xl_pci_ca = { 105 sizeof(struct xl_pci_softc), xl_pci_match, xl_pci_attach, 106 xl_pci_detach, xl_activate 107 }; 108 109 const struct pci_matchid xl_pci_devices[] = { 110 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CSOHO100TX }, 111 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900TPO }, 112 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900COMBO }, 113 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900B }, 114 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BCOMBO }, 115 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BTPC }, 116 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C900BFL }, 117 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905TX }, 118 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905T4 }, 119 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BTX }, 120 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BT4 }, 121 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BCOMBO }, 122 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905BFX }, 123 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980TX }, 124 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C980CTX }, 125 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C905CTX }, 126 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C450 }, 127 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C555 }, 128 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556 }, 129 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C556B }, 130 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C9201 }, 131 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C920BEMBW }, 132 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C575 }, 133 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575BT }, 134 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFE575CT }, 135 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656 }, 136 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656B }, 137 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CCFEM656C }, 138 }; 139 140 int 141 xl_pci_match(struct device *parent, void *match, void *aux) 142 { 143 return (pci_matchbyid((struct pci_attach_args *)aux, xl_pci_devices, 144 nitems(xl_pci_devices))); 145 } 146 147 void 148 xl_pci_attach(struct device *parent, struct device *self, void *aux) 149 { 150 struct xl_pci_softc *psc = (void *)self; 151 struct xl_softc *sc = &psc->psc_softc; 152 struct pci_attach_args *pa = aux; 153 pci_chipset_tag_t pc = pa->pa_pc; 154 pci_intr_handle_t ih; 155 const char *intrstr = NULL; 156 bus_size_t iosize, funsize; 157 #ifndef SMALL_KERNEL 158 u_int32_t command; 159 #endif 160 161 psc->psc_pc = pc; 162 psc->psc_tag = pa->pa_tag; 163 sc->sc_dmat = pa->pa_dmat; 164 165 sc->xl_flags = 0; 166 sc->wol_power = sc->wol_power_arg = NULL; 167 168 /* set required flags */ 169 switch (PCI_PRODUCT(pa->pa_id)) { 170 case TC_DEVICEID_HURRICANE_555: 171 sc->xl_flags |= XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_8BITROM; 172 break; 173 case TC_DEVICEID_HURRICANE_556: 174 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 175 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 176 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 177 sc->xl_flags |= XL_FLAG_8BITROM; 178 break; 179 case TC_DEVICEID_HURRICANE_556B: 180 sc->xl_flags |= XL_FLAG_FUNCREG | XL_FLAG_PHYOK | 181 XL_FLAG_EEPROM_OFFSET_30 | XL_FLAG_WEIRDRESET; 182 sc->xl_flags |= XL_FLAG_INVERT_LED_PWR|XL_FLAG_INVERT_MII_PWR; 183 break; 184 case PCI_PRODUCT_3COM_3C9201: 185 case PCI_PRODUCT_3COM_3C920BEMBW: 186 sc->xl_flags |= XL_FLAG_PHYOK; 187 break; 188 case TC_DEVICEID_BOOMERANG_10_100BT: 189 sc->xl_flags |= XL_FLAG_NO_MMIO; 190 break; 191 case PCI_PRODUCT_3COM_3C575: 192 sc->xl_flags |= XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 193 XL_FLAG_8BITROM; 194 break; 195 case PCI_PRODUCT_3COM_3CCFE575BT: 196 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 197 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR; 198 sc->xl_flags |= XL_FLAG_FUNCREG; 199 break; 200 case PCI_PRODUCT_3COM_3CCFE575CT: 201 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 202 XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR; 203 sc->xl_flags |= XL_FLAG_FUNCREG; 204 break; 205 case PCI_PRODUCT_3COM_3CCFEM656: 206 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 207 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR | 208 XL_FLAG_INVERT_MII_PWR; 209 sc->xl_flags |= XL_FLAG_FUNCREG; 210 break; 211 case PCI_PRODUCT_3COM_3CCFEM656B: 212 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 213 XL_FLAG_8BITROM | XL_FLAG_INVERT_LED_PWR | 214 XL_FLAG_INVERT_MII_PWR; 215 sc->xl_flags |= XL_FLAG_FUNCREG; 216 break; 217 case PCI_PRODUCT_3COM_3CCFEM656C: 218 sc->xl_flags = XL_FLAG_PHYOK | XL_FLAG_EEPROM_OFFSET_30 | 219 XL_FLAG_8BITROM | XL_FLAG_INVERT_MII_PWR; 220 sc->xl_flags |= XL_FLAG_FUNCREG; 221 break; 222 default: 223 break; 224 } 225 226 pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0); 227 228 #ifndef SMALL_KERNEL 229 /* 230 * The card is WOL-capable if it supports PME# assertion 231 * from D3hot power state. Install a callback to configure 232 * PCI power state for WOL. It will be invoked when the 233 * interface stops and WOL was enabled. 234 */ 235 command = pci_conf_read(pc, pa->pa_tag, XL_PCI_CAPID); 236 if ((command >> 16) & XL_PME_CAP_D3_HOT) { 237 sc->wol_power = xl_pci_wol_power; 238 sc->wol_power_arg = psc; 239 } 240 #endif 241 242 /* 243 * Map control/status registers. 244 */ 245 #ifdef XL_USEIOSPACE 246 if (pci_mapreg_map(pa, XL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 247 &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) { 248 printf(": can't map i/o space\n"); 249 return; 250 } 251 #else 252 if (pci_mapreg_map(pa, XL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 253 &sc->xl_btag, &sc->xl_bhandle, NULL, &iosize, 0)) { 254 printf(": can't map i/o space\n"); 255 return; 256 } 257 #endif 258 psc->psc_iosize = iosize; 259 260 if (sc->xl_flags & XL_FLAG_FUNCREG) { 261 if (pci_mapreg_map(pa, XL_PCI_FUNCMEM, PCI_MAPREG_TYPE_MEM, 0, 262 &sc->xl_funct, &sc->xl_funch, NULL, &funsize, 0)) { 263 printf(": can't map i/o space\n"); 264 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 265 return; 266 } 267 psc->psc_funsize = funsize; 268 sc->intr_ack = xl_pci_intr_ack; 269 } 270 271 /* 272 * Allocate our interrupt. 273 */ 274 if (pci_intr_map(pa, &ih)) { 275 printf(": couldn't map interrupt\n"); 276 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 277 if (sc->xl_flags & XL_FLAG_FUNCREG) 278 bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize); 279 return; 280 } 281 282 intrstr = pci_intr_string(pc, ih); 283 sc->xl_intrhand = pci_intr_establish(pc, ih, IPL_NET, xl_intr, sc, 284 self->dv_xname); 285 if (sc->xl_intrhand == NULL) { 286 printf(": couldn't establish interrupt"); 287 if (intrstr != NULL) 288 printf(" at %s", intrstr); 289 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, iosize); 290 if (sc->xl_flags & XL_FLAG_FUNCREG) 291 bus_space_unmap(sc->xl_funct, sc->xl_funch, funsize); 292 return; 293 } 294 printf(": %s", intrstr); 295 296 xl_attach(sc); 297 } 298 299 int 300 xl_pci_detach(struct device *self, int flags) 301 { 302 struct xl_pci_softc *psc = (void *)self; 303 struct xl_softc *sc = &psc->psc_softc; 304 305 if (sc->xl_intrhand != NULL) { 306 pci_intr_disestablish(psc->psc_pc, sc->xl_intrhand); 307 xl_detach(sc); 308 } 309 if (psc->psc_iosize > 0) 310 bus_space_unmap(sc->xl_btag, sc->xl_bhandle, psc->psc_iosize); 311 if (psc->psc_funsize > 0) 312 bus_space_unmap(sc->xl_funct, sc->xl_funch, psc->psc_funsize); 313 return (0); 314 } 315 316 void 317 xl_pci_intr_ack(struct xl_softc *sc) 318 { 319 bus_space_write_4(sc->xl_funct, sc->xl_funch, XL_PCI_INTR, 320 XL_PCI_INTRACK); 321 } 322 323 #ifndef SMALL_KERNEL 324 void 325 xl_pci_wol_power(void *ppsc) 326 { 327 struct xl_pci_softc *psc = (struct xl_pci_softc*)ppsc; 328 u_int32_t command; 329 330 /* Make sure wake-up generation is enabled. */ 331 command = pci_conf_read(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL); 332 command |= XL_PME_EN; 333 pci_conf_write(psc->psc_pc, psc->psc_tag, XL_PCI_PWRMGMTCTRL, command); 334 } 335 #endif 336