1 /******************************************************************************* 2 3 Copyright (c) 2001-2005, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 *******************************************************************************/ 33 34 /* $OpenBSD: ixgb_ee.c,v 1.6 2015/03/14 03:38:48 jsg Exp $ */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/sockio.h> 39 #include <sys/mbuf.h> 40 #include <sys/malloc.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 #include <sys/socket.h> 44 45 #include <net/if.h> 46 #include <net/if_dl.h> 47 #include <net/if_media.h> 48 49 #include <netinet/in.h> 50 #include <netinet/if_ether.h> 51 52 #include <uvm/uvm_extern.h> 53 54 #include <dev/pci/pcireg.h> 55 #include <dev/pci/pcivar.h> 56 57 #include <dev/pci/ixgb_hw.h> 58 #include <dev/pci/ixgb_ee.h> 59 60 /* Local prototypes */ 61 static uint16_t ixgb_shift_in_bits(struct ixgb_hw *hw); 62 63 static void ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, 64 uint16_t count); 65 static void ixgb_standby_eeprom(struct ixgb_hw *hw); 66 67 static boolean_t ixgb_wait_eeprom_command(struct ixgb_hw *hw); 68 69 static void ixgb_cleanup_eeprom(struct ixgb_hw *hw); 70 71 /****************************************************************************** 72 * Raises the EEPROM's clock input. 73 * 74 * hw - Struct containing variables accessed by shared code 75 * eecd_reg - EECD's current value 76 *****************************************************************************/ 77 static void 78 ixgb_raise_clock(struct ixgb_hw *hw, uint32_t *eecd_reg) 79 { 80 /* Raise the clock input to the EEPROM (by setting the SK bit), and 81 * then wait 50 microseconds. */ 82 *eecd_reg = *eecd_reg | IXGB_EECD_SK; 83 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 84 usec_delay(50); 85 return; 86 } 87 88 /****************************************************************************** 89 * Lowers the EEPROM's clock input. 90 * 91 * hw - Struct containing variables accessed by shared code 92 * eecd_reg - EECD's current value 93 *****************************************************************************/ 94 static void 95 ixgb_lower_clock(struct ixgb_hw *hw, uint32_t *eecd_reg) 96 { 97 /* Lower the clock input to the EEPROM (by clearing the SK bit), and 98 * then wait 50 microseconds. */ 99 *eecd_reg = *eecd_reg & ~IXGB_EECD_SK; 100 IXGB_WRITE_REG(hw, EECD, *eecd_reg); 101 usec_delay(50); 102 return; 103 } 104 105 /****************************************************************************** 106 * Shift data bits out to the EEPROM. 107 * 108 * hw - Struct containing variables accessed by shared code 109 * data - data to send to the EEPROM 110 * count - number of bits to shift out 111 *****************************************************************************/ 112 static void 113 ixgb_shift_out_bits(struct ixgb_hw *hw, uint16_t data, uint16_t count) 114 { 115 uint32_t eecd_reg; 116 uint32_t mask; 117 118 /* We need to shift "count" bits out to the EEPROM. So, value in the 119 * "data" parameter will be shifted out to the EEPROM one bit at a 120 * time. In order to do this, "data" must be broken down into bits. */ 121 mask = 0x01 << (count - 1); 122 eecd_reg = IXGB_READ_REG(hw, EECD); 123 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 124 do { 125 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a 126 * "1", and then raising and then lowering the clock (the SK 127 * bit controls the clock input to the EEPROM). A "0" is 128 * shifted out to the EEPROM by setting "DI" to "0" and then 129 * raising and then lowering the clock. */ 130 eecd_reg &= ~IXGB_EECD_DI; 131 132 if(data & mask) 133 eecd_reg |= IXGB_EECD_DI; 134 135 IXGB_WRITE_REG(hw, EECD, eecd_reg); 136 137 usec_delay(50); 138 139 ixgb_raise_clock(hw, &eecd_reg); 140 ixgb_lower_clock(hw, &eecd_reg); 141 142 mask = mask >> 1; 143 144 } while(mask); 145 146 /* We leave the "DI" bit set to "0" when we leave this routine. */ 147 eecd_reg &= ~IXGB_EECD_DI; 148 IXGB_WRITE_REG(hw, EECD, eecd_reg); 149 return; 150 } 151 152 /****************************************************************************** 153 * Shift data bits in from the EEPROM 154 * 155 * hw - Struct containing variables accessed by shared code 156 *****************************************************************************/ 157 static uint16_t 158 ixgb_shift_in_bits(struct ixgb_hw *hw) 159 { 160 uint32_t eecd_reg; 161 uint32_t i; 162 uint16_t data; 163 164 /* In order to read a register from the EEPROM, we need to shift 16 165 * bits in from the EEPROM. Bits are "shifted in" by raising the clock 166 * input to the EEPROM (setting the SK bit), and then reading the value 167 * of the "DO" bit. During this "shifting in" process the "DI" bit 168 * should always be clear.. */ 169 170 eecd_reg = IXGB_READ_REG(hw, EECD); 171 172 eecd_reg &= ~(IXGB_EECD_DO | IXGB_EECD_DI); 173 data = 0; 174 175 for(i = 0; i < 16; i++) { 176 data = data << 1; 177 ixgb_raise_clock(hw, &eecd_reg); 178 179 eecd_reg = IXGB_READ_REG(hw, EECD); 180 181 eecd_reg &= ~(IXGB_EECD_DI); 182 if(eecd_reg & IXGB_EECD_DO) 183 data |= 1; 184 185 ixgb_lower_clock(hw, &eecd_reg); 186 } 187 188 return data; 189 } 190 191 /****************************************************************************** 192 * Prepares EEPROM for access 193 * 194 * hw - Struct containing variables accessed by shared code 195 * 196 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This 197 * function should be called before issuing a command to the EEPROM. 198 *****************************************************************************/ 199 static void 200 ixgb_setup_eeprom(struct ixgb_hw *hw) 201 { 202 uint32_t eecd_reg; 203 204 eecd_reg = IXGB_READ_REG(hw, EECD); 205 206 /* Clear SK and DI */ 207 eecd_reg &= ~(IXGB_EECD_SK | IXGB_EECD_DI); 208 IXGB_WRITE_REG(hw, EECD, eecd_reg); 209 210 /* Set CS */ 211 eecd_reg |= IXGB_EECD_CS; 212 IXGB_WRITE_REG(hw, EECD, eecd_reg); 213 return; 214 } 215 216 /****************************************************************************** 217 * Returns EEPROM to a "standby" state 218 * 219 * hw - Struct containing variables accessed by shared code 220 *****************************************************************************/ 221 static void 222 ixgb_standby_eeprom(struct ixgb_hw *hw) 223 { 224 uint32_t eecd_reg; 225 226 eecd_reg = IXGB_READ_REG(hw, EECD); 227 228 /* Deselct EEPROM */ 229 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_SK); 230 IXGB_WRITE_REG(hw, EECD, eecd_reg); 231 usec_delay(50); 232 233 /* Clock high */ 234 eecd_reg |= IXGB_EECD_SK; 235 IXGB_WRITE_REG(hw, EECD, eecd_reg); 236 usec_delay(50); 237 238 /* Select EEPROM */ 239 eecd_reg |= IXGB_EECD_CS; 240 IXGB_WRITE_REG(hw, EECD, eecd_reg); 241 usec_delay(50); 242 243 /* Clock low */ 244 eecd_reg &= ~IXGB_EECD_SK; 245 IXGB_WRITE_REG(hw, EECD, eecd_reg); 246 usec_delay(50); 247 return; 248 } 249 250 /****************************************************************************** 251 * Raises then lowers the EEPROM's clock pin 252 * 253 * hw - Struct containing variables accessed by shared code 254 *****************************************************************************/ 255 static void 256 ixgb_clock_eeprom(struct ixgb_hw *hw) 257 { 258 uint32_t eecd_reg; 259 260 eecd_reg = IXGB_READ_REG(hw, EECD); 261 262 /* Rising edge of clock */ 263 eecd_reg |= IXGB_EECD_SK; 264 IXGB_WRITE_REG(hw, EECD, eecd_reg); 265 usec_delay(50); 266 267 /* Falling edge of clock */ 268 eecd_reg &= ~IXGB_EECD_SK; 269 IXGB_WRITE_REG(hw, EECD, eecd_reg); 270 usec_delay(50); 271 return; 272 } 273 274 /****************************************************************************** 275 * Terminates a command by lowering the EEPROM's chip select pin 276 * 277 * hw - Struct containing variables accessed by shared code 278 *****************************************************************************/ 279 static void 280 ixgb_cleanup_eeprom(struct ixgb_hw *hw) 281 { 282 uint32_t eecd_reg; 283 284 eecd_reg = IXGB_READ_REG(hw, EECD); 285 286 eecd_reg &= ~(IXGB_EECD_CS | IXGB_EECD_DI); 287 288 IXGB_WRITE_REG(hw, EECD, eecd_reg); 289 290 ixgb_clock_eeprom(hw); 291 return; 292 } 293 294 /****************************************************************************** 295 * Waits for the EEPROM to finish the current command. 296 * 297 * hw - Struct containing variables accessed by shared code 298 * 299 * The command is done when the EEPROM's data out pin goes high. 300 * 301 * Returns: 302 * TRUE: EEPROM data pin is high before timeout. 303 * FALSE: Time expired. 304 *****************************************************************************/ 305 static boolean_t 306 ixgb_wait_eeprom_command(struct ixgb_hw *hw) 307 { 308 uint32_t eecd_reg; 309 uint32_t i; 310 311 /* Toggle the CS line. This in effect tells to EEPROM to actually 312 * execute the command in question. */ 313 ixgb_standby_eeprom(hw); 314 315 /* Now read DO repeatedly until is high (equal to '1'). The EEEPROM 316 * will signal that the command has been completed by raising the DO 317 * signal. If DO does not go high in 10 milliseconds, then error out. */ 318 for(i = 0; i < 200; i++) { 319 eecd_reg = IXGB_READ_REG(hw, EECD); 320 321 if(eecd_reg & IXGB_EECD_DO) 322 return (TRUE); 323 324 usec_delay(50); 325 } 326 ASSERT(0); 327 return (FALSE); 328 } 329 330 /****************************************************************************** 331 * Verifies that the EEPROM has a valid checksum 332 * 333 * hw - Struct containing variables accessed by shared code 334 * 335 * Reads the first 64 16 bit words of the EEPROM and sums the values read. 336 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is 337 * valid. 338 * 339 * Returns: 340 * TRUE: Checksum is valid 341 * FALSE: Checksum is not valid. 342 *****************************************************************************/ 343 boolean_t 344 ixgb_validate_eeprom_checksum(struct ixgb_hw *hw) 345 { 346 uint16_t checksum = 0; 347 uint16_t i; 348 349 for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) 350 checksum += ixgb_read_eeprom(hw, i); 351 352 if(checksum == (uint16_t)EEPROM_SUM) 353 return (TRUE); 354 else 355 return (FALSE); 356 } 357 358 /****************************************************************************** 359 * Calculates the EEPROM checksum and writes it to the EEPROM 360 * 361 * hw - Struct containing variables accessed by shared code 362 * 363 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA. 364 * Writes the difference to word offset 63 of the EEPROM. 365 *****************************************************************************/ 366 void 367 ixgb_update_eeprom_checksum(struct ixgb_hw *hw) 368 { 369 uint16_t checksum = 0; 370 uint16_t i; 371 372 for(i = 0; i < EEPROM_CHECKSUM_REG; i++) 373 checksum += ixgb_read_eeprom(hw, i); 374 375 checksum = (uint16_t)EEPROM_SUM - checksum; 376 377 ixgb_write_eeprom(hw, EEPROM_CHECKSUM_REG, checksum); 378 return; 379 } 380 381 /****************************************************************************** 382 * Writes a 16 bit word to a given offset in the EEPROM. 383 * 384 * hw - Struct containing variables accessed by shared code 385 * reg - offset within the EEPROM to be written to 386 * data - 16 bit word to be writen to the EEPROM 387 * 388 * If ixgb_update_eeprom_checksum is not called after this function, the 389 * EEPROM will most likely contain an invalid checksum. 390 * 391 *****************************************************************************/ 392 void 393 ixgb_write_eeprom(struct ixgb_hw *hw, uint16_t offset, uint16_t data) 394 { 395 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 396 397 /* Prepare the EEPROM for writing */ 398 ixgb_setup_eeprom(hw); 399 400 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit 401 * opcode plus 4-bit dummy). This puts the EEPROM into write/erase 402 * mode. */ 403 ixgb_shift_out_bits(hw, EEPROM_EWEN_OPCODE, 5); 404 ixgb_shift_out_bits(hw, 0, 4); 405 406 /* Prepare the EEPROM */ 407 ixgb_standby_eeprom(hw); 408 409 /* Send the Write command (3-bit opcode + 6-bit addr) */ 410 ixgb_shift_out_bits(hw, EEPROM_WRITE_OPCODE, 3); 411 ixgb_shift_out_bits(hw, offset, 6); 412 413 /* Send the data */ 414 ixgb_shift_out_bits(hw, data, 16); 415 416 ixgb_wait_eeprom_command(hw); 417 418 /* Recover from write */ 419 ixgb_standby_eeprom(hw); 420 421 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit 422 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase 423 * mode. */ 424 ixgb_shift_out_bits(hw, EEPROM_EWDS_OPCODE, 5); 425 ixgb_shift_out_bits(hw, 0, 4); 426 427 /* Done with writing */ 428 ixgb_cleanup_eeprom(hw); 429 430 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */ 431 ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); 432 433 return; 434 } 435 436 /****************************************************************************** 437 * Reads a 16 bit word from the EEPROM. 438 * 439 * hw - Struct containing variables accessed by shared code 440 * offset - offset of 16 bit word in the EEPROM to read 441 * 442 * Returns: 443 * The 16-bit value read from the eeprom 444 *****************************************************************************/ 445 uint16_t 446 ixgb_read_eeprom(struct ixgb_hw *hw, uint16_t offset) 447 { 448 uint16_t data; 449 450 /* Prepare the EEPROM for reading */ 451 ixgb_setup_eeprom(hw); 452 453 /* Send the READ command (opcode + addr) */ 454 ixgb_shift_out_bits(hw, EEPROM_READ_OPCODE, 3); 455 /* 456 * We have a 64 word EEPROM, there are 6 address bits 457 */ 458 ixgb_shift_out_bits(hw, offset, 6); 459 460 /* Read the data */ 461 data = ixgb_shift_in_bits(hw); 462 463 /* End this read operation */ 464 ixgb_standby_eeprom(hw); 465 466 return (data); 467 } 468 469 /****************************************************************************** 470 * Reads eeprom and stores data in shared structure. 471 * Validates eeprom checksum and eeprom signature. 472 * 473 * hw - Struct containing variables accessed by shared code 474 * 475 * Returns: 476 * TRUE: if eeprom read is successful 477 * FALSE: otherwise. 478 *****************************************************************************/ 479 boolean_t 480 ixgb_get_eeprom_data(struct ixgb_hw *hw) 481 { 482 uint16_t i; 483 uint16_t checksum = 0; 484 struct ixgb_ee_map_type *ee_map; 485 486 DEBUGFUNC("ixgb_get_eeprom_data"); 487 488 ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 489 490 DEBUGOUT("ixgb_ee: Reading eeprom data\n"); 491 for(i = 0; i < IXGB_EEPROM_SIZE; i++) { 492 uint16_t ee_data; 493 494 ee_data = ixgb_read_eeprom(hw, i); 495 checksum += ee_data; 496 hw->eeprom[i] = le16_to_cpu(ee_data); 497 } 498 499 if(checksum != (uint16_t)EEPROM_SUM) { 500 DEBUGOUT("ixgb_ee: Checksum invalid.\n"); 501 /* clear the init_ctrl_reg_1 to signify that the cache is 502 * invalidated */ 503 ee_map->init_ctrl_reg_1 = le16_to_cpu(EEPROM_ICW1_SIGNATURE_CLEAR); 504 return (FALSE); 505 } 506 507 if((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK)) 508 != le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) { 509 DEBUGOUT("ixgb_ee: Signature invalid.\n"); 510 return (FALSE); 511 } 512 513 return (TRUE); 514 } 515 516 /****************************************************************************** 517 * Local function to check if the eeprom signature is good 518 * If the eeprom signature is good, calls ixgb)get_eeprom_data. 519 * 520 * hw - Struct containing variables accessed by shared code 521 * 522 * Returns: 523 * TRUE: eeprom signature was good and the eeprom read was successful 524 * FALSE: otherwise. 525 ******************************************************************************/ 526 static boolean_t 527 ixgb_check_and_get_eeprom_data(struct ixgb_hw *hw) 528 { 529 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 530 531 if((ee_map->init_ctrl_reg_1 & le16_to_cpu(EEPROM_ICW1_SIGNATURE_MASK)) 532 == le16_to_cpu(EEPROM_ICW1_SIGNATURE_VALID)) { 533 return (TRUE); 534 } else { 535 return ixgb_get_eeprom_data(hw); 536 } 537 } 538 539 /****************************************************************************** 540 * return a word from the eeprom 541 * 542 * hw - Struct containing variables accessed by shared code 543 * index - Offset of eeprom word 544 * 545 * Returns: 546 * Word at indexed offset in eeprom, if valid, 0 otherwise. 547 ******************************************************************************/ 548 uint16_t 549 ixgb_get_eeprom_word(struct ixgb_hw *hw, uint16_t index) 550 { 551 552 if((index < IXGB_EEPROM_SIZE) && 553 (ixgb_check_and_get_eeprom_data(hw) == TRUE)) { 554 return (hw->eeprom[index]); 555 } 556 557 return (0); 558 } 559 560 /****************************************************************************** 561 * return the mac address from EEPROM 562 * 563 * hw - Struct containing variables accessed by shared code 564 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise 565 * 566 * Returns: None. 567 ******************************************************************************/ 568 void 569 ixgb_get_ee_mac_addr(struct ixgb_hw *hw, uint8_t *mac_addr) 570 { 571 int i; 572 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 573 574 DEBUGFUNC("ixgb_get_ee_mac_addr"); 575 576 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) { 577 for(i = 0; i < IXGB_ETH_LENGTH_OF_ADDRESS; i++) { 578 mac_addr[i] = ee_map->mac_addr[i]; 579 DEBUGOUT2("mac(%d) = %.2X\n", i, mac_addr[i]); 580 } 581 } 582 } 583 584 585 /****************************************************************************** 586 * return the Printed Board Assembly number from EEPROM 587 * 588 * hw - Struct containing variables accessed by shared code 589 * 590 * Returns: 591 * PBA number if EEPROM contents are valid, 0 otherwise 592 ******************************************************************************/ 593 uint32_t 594 ixgb_get_ee_pba_number(struct ixgb_hw *hw) 595 { 596 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) 597 return (le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG]) 598 | (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG]) << 16)); 599 600 return (0); 601 } 602 603 604 /****************************************************************************** 605 * return the Device Id from EEPROM 606 * 607 * hw - Struct containing variables accessed by shared code 608 * 609 * Returns: 610 * Device Id if EEPROM contents are valid, 0 otherwise 611 ******************************************************************************/ 612 uint16_t 613 ixgb_get_ee_device_id(struct ixgb_hw *hw) 614 { 615 struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom; 616 617 if(ixgb_check_and_get_eeprom_data(hw) == TRUE) 618 return (le16_to_cpu(ee_map->device_id)); 619 620 return (0); 621 } 622 623