xref: /openbsd/sys/dev/pci/ixgbe.h (revision 9b7c3dbb)
1 /*	$OpenBSD: ixgbe.h,v 1.22 2016/03/15 16:45:52 naddy Exp $	*/
2 
3 /******************************************************************************
4 
5   Copyright (c) 2001-2008, Intel Corporation
6   All rights reserved.
7 
8   Redistribution and use in source and binary forms, with or without
9   modification, are permitted provided that the following conditions are met:
10 
11    1. Redistributions of source code must retain the above copyright notice,
12       this list of conditions and the following disclaimer.
13 
14    2. Redistributions in binary form must reproduce the above copyright
15       notice, this list of conditions and the following disclaimer in the
16       documentation and/or other materials provided with the distribution.
17 
18    3. Neither the name of the Intel Corporation nor the names of its
19       contributors may be used to endorse or promote products derived from
20       this software without specific prior written permission.
21 
22   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32   POSSIBILITY OF SUCH DAMAGE.
33 
34 ******************************************************************************/
35 /* FreeBSD: src/sys/dev/ixgbe/ixgbe_osdep.h 251964 Jun 18 21:28:19 2013 UTC */
36 /* FreeBSD: src/sys/dev/ixgbe/ixgbe_common.h 251964 Jun 18 21:28:19 2013 UTC */
37 
38 #ifndef _IXGBE_H_
39 #define _IXGBE_H_
40 
41 #include "bpfilter.h"
42 #include "vlan.h"
43 
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/sockio.h>
47 #include <sys/mbuf.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/device.h>
51 #include <sys/socket.h>
52 #include <sys/timeout.h>
53 #include <sys/pool.h>
54 #include <sys/rwlock.h>
55 #include <sys/atomic.h>
56 
57 #include <net/if.h>
58 #include <net/bpf.h>
59 #include <net/if_media.h>
60 
61 #include <netinet/in.h>
62 #include <netinet/if_ether.h>
63 #include <netinet/ip.h>
64 
65 #if NBPFILTER > 0
66 #include <net/bpf.h>
67 #endif
68 
69 typedef int	boolean_t;
70 #define TRUE	1
71 #define FALSE	0
72 
73 #include <dev/pci/pcireg.h>
74 #include <dev/pci/pcivar.h>
75 #include <dev/pci/pcidevs.h>
76 #include <dev/pci/ixgbe_type.h>
77 
78 #define DBG 0
79 #define MSGOUT(S, A, B)     printf(S "\n", A, B)
80 #define DEBUGFUNC(F)        DEBUGOUT(F);
81 #if DBG
82 	#define DEBUGOUT(S)         printf(S "\n")
83 	#define DEBUGOUT1(S,A)      printf(S "\n",A)
84 	#define DEBUGOUT2(S,A,B)    printf(S "\n",A,B)
85 	#define DEBUGOUT3(S,A,B,C)  printf(S "\n",A,B,C)
86 	#define DEBUGOUT4(S,A,B,C,D)  printf(S "\n",A,B,C,D)
87 	#define DEBUGOUT5(S,A,B,C,D,E)  printf(S "\n",A,B,C,D,E)
88 	#define DEBUGOUT6(S,A,B,C,D,E,F)  printf(S "\n",A,B,C,D,E,F)
89 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)  printf(S "\n",A,B,C,D,E,F,G)
90 	#define ERROR_REPORT1(S,A)      printf(S "\n",A)
91 	#define ERROR_REPORT2(S,A,B)    printf(S "\n",A,B)
92 	#define ERROR_REPORT3(S,A,B,C)  printf(S "\n",A,B,C)
93 #else
94 	#define DEBUGOUT(S)
95 	#define DEBUGOUT1(S,A)
96 	#define DEBUGOUT2(S,A,B)
97 	#define DEBUGOUT3(S,A,B,C)
98 	#define DEBUGOUT4(S,A,B,C,D)
99 	#define DEBUGOUT5(S,A,B,C,D,E)
100 	#define DEBUGOUT6(S,A,B,C,D,E,F)
101 	#define DEBUGOUT7(S,A,B,C,D,E,F,G)
102 
103 	#define ERROR_REPORT1(S,A)
104 	#define ERROR_REPORT2(S,A,B)
105 	#define ERROR_REPORT3(S,A,B,C)
106 #endif
107 
108 #define FALSE		    		0
109 #define TRUE		    		1
110 #define CMD_MEM_WRT_INVALIDATE          0x0010  /* BIT_4 */
111 #define PCI_COMMAND_REGISTER            PCIR_COMMAND
112 
113 /* Compat glue */
114 #define PCIR_BAR(_x)	(0x10 + (_x) * 4)
115 #define roundup2(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
116 #define usec_delay(x) delay(x)
117 #define msec_delay(x) delay(1000 * (x))
118 
119 /* This is needed by the shared code */
120 struct ixgbe_hw;
121 
122 struct ixgbe_osdep {
123 	bus_dma_tag_t		 os_dmat;
124 	bus_space_tag_t		 os_memt;
125 	bus_space_handle_t	 os_memh;
126 
127 	bus_size_t		 os_memsize;
128 	bus_addr_t		 os_membase;
129 
130 	void			*os_sc;
131 	struct pci_attach_args	 os_pa;
132 };
133 
134 extern uint16_t ixgbe_read_pci_cfg(struct ixgbe_hw *, uint32_t);
135 #define IXGBE_READ_PCIE_WORD ixgbe_read_pci_cfg
136 
137 extern void ixgbe_write_pci_cfg(struct ixgbe_hw *, uint32_t, uint16_t);
138 #define IXGBE_WRITE_PCIE_WORD ixgbe_write_pci_cfg
139 
140 #define IXGBE_WRITE_FLUSH(a)						\
141 	IXGBE_READ_REG(a, IXGBE_STATUS)
142 #define IXGBE_READ_REG(a, reg)						\
143 	bus_space_read_4(((struct ixgbe_osdep *)(a)->back)->os_memt,	\
144 	((struct ixgbe_osdep *)(a)->back)->os_memh, reg)
145 #define IXGBE_WRITE_REG(a, reg, value)					\
146 	bus_space_write_4(((struct ixgbe_osdep *)(a)->back)->os_memt,	\
147 	((struct ixgbe_osdep *)(a)->back)->os_memh, reg, value)
148 #define IXGBE_READ_REG_ARRAY(a, reg, offset)				\
149 	bus_space_read_4(((struct ixgbe_osdep *)(a)->back)->os_memt,	\
150 	((struct ixgbe_osdep *)(a)->back)->os_memh, (reg + ((offset) << 2)))
151 #define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value)			\
152 	bus_space_write_4(((struct ixgbe_osdep *)(a)->back)->os_memt,	\
153 	((struct ixgbe_osdep *)(a)->back)->os_memh, (reg + ((offset) << 2)), value)
154 
155 uint16_t ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
156 
157 int32_t ixgbe_init_ops_generic(struct ixgbe_hw *hw);
158 int32_t ixgbe_init_hw_generic(struct ixgbe_hw *hw);
159 int32_t ixgbe_start_hw_generic(struct ixgbe_hw *hw);
160 int32_t ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
161 int32_t ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
162 int32_t ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, uint32_t *pba_num);
163 int32_t ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, uint8_t *pba_num,
164 				      uint32_t pba_num_size);
165 int32_t ixgbe_read_pba_length_generic(struct ixgbe_hw *hw, uint32_t *pba_num_size);
166 int32_t ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, uint8_t *mac_addr);
167 int32_t ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
168 void    ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
169 int32_t ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
170 
171 int32_t ixgbe_led_on_generic(struct ixgbe_hw *hw, uint32_t index);
172 int32_t ixgbe_led_off_generic(struct ixgbe_hw *hw, uint32_t index);
173 
174 int32_t ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
175 int32_t ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t data);
176 int32_t ixgbe_read_eerd_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t *data);
177 int32_t ixgbe_write_eewr_generic(struct ixgbe_hw *hw, uint16_t offset, uint16_t data);
178 int32_t ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, uint16_t offset,
179 					   uint16_t *data);
180 uint16_t ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
181 int32_t ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
182 					       uint16_t *checksum_val);
183 int32_t ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
184 int32_t ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, uint32_t ee_reg);
185 
186 int32_t ixgbe_set_rar_generic(struct ixgbe_hw *hw, uint32_t index, uint8_t *addr, uint32_t vmdq,
187 			      uint32_t enable_addr);
188 int32_t ixgbe_clear_rar_generic(struct ixgbe_hw *hw, uint32_t index);
189 int32_t ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
190 int32_t ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, uint8_t *mc_addr_list,
191 					  uint32_t mc_addr_count,
192 					  ixgbe_mc_addr_itr func, bool clear);
193 int32_t ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, uint8_t *addr_list,
194 					  uint32_t addr_count, ixgbe_mc_addr_itr func);
195 int32_t ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
196 int32_t ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
197 int32_t ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, uint32_t regval);
198 int32_t ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
199 int32_t ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
200 
201 int32_t ixgbe_setup_fc(struct ixgbe_hw *hw);
202 int32_t ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
203 void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
204 
205 int32_t ixgbe_validate_mac_addr(uint8_t *mac_addr);
206 int32_t ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, uint16_t mask);
207 void    ixgbe_release_swfw_sync(struct ixgbe_hw *hw, uint16_t mask);
208 int32_t ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
209 
210 int32_t ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, uint32_t index);
211 int32_t ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, uint32_t index);
212 
213 int32_t ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, uint8_t *san_mac_addr);
214 int32_t ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, uint8_t *san_mac_addr);
215 
216 int32_t ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, uint32_t rar, uint32_t vmdq);
217 int32_t ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, uint32_t rar, uint32_t vmdq);
218 int32_t ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, uint8_t *addr, uint32_t vmdq);
219 int32_t ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
220 int32_t ixgbe_set_vfta_generic(struct ixgbe_hw *hw, uint32_t vlan,
221 			       uint32_t vind, bool vlan_on);
222 int32_t ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, uint32_t vlan, uint32_t vind,
223 			       bool vlan_on, bool *vfta_changed);
224 int32_t ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
225 
226 int32_t ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
227 				     ixgbe_link_speed *speed,
228 				     bool *link_up, bool link_up_wait_to_complete);
229 
230 int32_t ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, uint16_t *device_caps);
231 void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
232 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
233 
234 /* MAC Operations */
235 int32_t ixgbe_init_shared_code(struct ixgbe_hw *hw);
236 int32_t ixgbe_init_hw(struct ixgbe_hw *hw);
237 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
238 int32_t ixgbe_identify_phy(struct ixgbe_hw *hw);
239 int32_t ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
240 			 bool *link_up, bool link_up_wait_to_complete);
241 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
242 int32_t ixgbe_set_rar(struct ixgbe_hw *hw, uint32_t index, uint8_t *addr,
243 		      uint32_t vmdq, uint32_t enable_addr);
244 int32_t ixgbe_set_vmdq(struct ixgbe_hw *hw, uint32_t rar, uint32_t vmdq);
245 int32_t ixgbe_clear_vmdq(struct ixgbe_hw *hw, uint32_t rar, uint32_t vmdq);
246 int32_t ixgbe_init_uta_tables(struct ixgbe_hw *hw);
247 bool ixgbe_verify_lesm_fw_enabled(struct ixgbe_hw *hw);
248 int32_t ixgbe_reset_pipeline(struct ixgbe_hw *hw);
249 
250 /* API */
251 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, uint8_t *addr, uint32_t vmdq);
252 void ixgbe_set_mta(struct ixgbe_hw *hw, uint8_t *mc_addr);
253 
254 int32_t ixgbe_init_ops_82598(struct ixgbe_hw *hw);
255 int32_t ixgbe_init_ops_82599(struct ixgbe_hw *hw);
256 int32_t ixgbe_init_ops_X540(struct ixgbe_hw *hw);
257 
258 /* PHY */
259 int32_t ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
260 bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, uint32_t phy_addr);
261 enum ixgbe_phy_type ixgbe_get_phy_type_from_id(uint32_t phy_id);
262 int32_t ixgbe_get_phy_id(struct ixgbe_hw *hw);
263 int32_t ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
264 int32_t ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
265 int32_t ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, uint32_t reg_addr,
266 			       uint32_t device_type, uint16_t *phy_data);
267 int32_t ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, uint32_t reg_addr,
268 				uint32_t device_type, uint16_t phy_data);
269 int32_t ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, uint32_t reg_addr,
270 				   uint32_t device_type, uint16_t *phy_data);
271 int32_t ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, uint32_t reg_addr,
272 				    uint32_t device_type, uint16_t phy_data);
273 int32_t ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
274 int32_t ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
275 					   ixgbe_link_speed speed,
276 					   bool autoneg_wait_to_complete);
277 int32_t ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
278 						   ixgbe_link_speed *speed,
279 						   bool *autoneg);
280 
281 /* PHY specific */
282 int32_t ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
283 				 ixgbe_link_speed *speed,
284 				 bool *link_up);
285 int32_t ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
286 int32_t ixgbe_get_phy_firmware_version_tnx(struct ixgbe_hw *hw,
287 					   uint16_t *firmware_version);
288 int32_t ixgbe_get_phy_firmware_version_generic(struct ixgbe_hw *hw,
289 					       uint16_t *firmware_version);
290 
291 int32_t ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
292 int32_t ixgbe_identify_module_generic(struct ixgbe_hw *hw);
293 int32_t ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw);
294 int32_t ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
295 					    uint16_t *list_offset,
296 					    uint16_t *data_offset);
297 int32_t ixgbe_tn_check_overtemp(struct ixgbe_hw *hw);
298 int32_t ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, uint8_t byte_offset,
299 				    uint8_t dev_addr, uint8_t *data);
300 int32_t ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, uint8_t byte_offset,
301 				     uint8_t dev_addr, uint8_t data);
302 int32_t ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, uint8_t byte_offset,
303 				      uint8_t *eeprom_data);
304 int32_t ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, uint8_t byte_offset,
305 				       uint8_t eeprom_data);
306 
307 /* MBX */
308 int32_t ixgbe_read_mbx(struct ixgbe_hw *, uint32_t *, uint16_t, uint16_t);
309 int32_t ixgbe_write_mbx(struct ixgbe_hw *, uint32_t *, uint16_t, uint16_t);
310 int32_t ixgbe_read_posted_mbx(struct ixgbe_hw *, uint32_t *, uint16_t, uint16_t);
311 int32_t ixgbe_write_posted_mbx(struct ixgbe_hw *, uint32_t *, uint16_t, uint16_t);
312 int32_t ixgbe_check_for_msg(struct ixgbe_hw *, uint16_t);
313 int32_t ixgbe_check_for_ack(struct ixgbe_hw *, uint16_t);
314 int32_t ixgbe_check_for_rst(struct ixgbe_hw *, uint16_t);
315 void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw);
316 void ixgbe_init_mbx_params_vf(struct ixgbe_hw *);
317 void ixgbe_init_mbx_params_pf(struct ixgbe_hw *);
318 
319 #endif /* _IXGBE_H_ */
320