1 /* $OpenBSD: qecvar.h,v 1.4 2008/06/26 05:42:18 ray Exp $ */ 2 /* $NetBSD: qecvar.h,v 1.4 1999/01/17 20:47:50 pk Exp $ */ 3 4 /*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 struct qec_softc { 34 struct device sc_dev; /* us as a device */ 35 bus_space_tag_t sc_bustag; /* bus & dma tags */ 36 bus_dma_tag_t sc_dmatag; 37 struct sbus_range *sc_range; /* PROM ranges */ 38 int sc_nrange; /* */ 39 struct sbus_intr *sc_intr; /* interrupt info */ 40 41 bus_space_handle_t sc_regs; /* QEC registers */ 42 int sc_nchannels; /* # of channels on board */ 43 int sc_burst; /* DVMA burst size in effect */ 44 caddr_t sc_buffer; /* VA of the buffer we provide */ 45 int sc_bufsiz; /* Size of buffer */ 46 47 u_int sc_msize; /* QEC buffer offset per channel */ 48 u_int sc_rsize; /* QEC buffer size for receive */ 49 }; 50 51 struct qec_ring { 52 /* Ring Descriptors */ 53 caddr_t rb_membase; /* Packet buffer: CPU address */ 54 bus_addr_t rb_dmabase; /* Packet buffer: DMA address */ 55 struct qec_xd *rb_txd; /* Transmit descriptors */ 56 bus_addr_t rb_txddma; /* DMA address of same */ 57 struct qec_xd *rb_rxd; /* Receive descriptors */ 58 bus_addr_t rb_rxddma; /* DMA address of same */ 59 caddr_t rb_txbuf; /* Transmit buffers */ 60 caddr_t rb_rxbuf; /* Receive buffers */ 61 int rb_ntbuf; /* # of transmit buffers */ 62 int rb_nrbuf; /* # of receive buffers */ 63 64 /* Ring Descriptor state */ 65 int rb_tdhead, rb_tdtail; 66 int rb_rdtail; 67 int rb_td_nbusy; 68 }; 69 70 void qec_meminit(struct qec_ring *, unsigned int); 71