1 /* $OpenBSD: sdmmc_io.c,v 1.22 2015/03/14 03:38:49 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 /* Routines for SD I/O cards. */ 20 21 #include <sys/param.h> 22 #include <sys/device.h> 23 #include <sys/kernel.h> 24 #include <sys/malloc.h> 25 #include <sys/systm.h> 26 27 #include <dev/sdmmc/sdmmc_ioreg.h> 28 #include <dev/sdmmc/sdmmcchip.h> 29 #include <dev/sdmmc/sdmmcvar.h> 30 31 struct sdmmc_intr_handler { 32 struct sdmmc_softc *ih_softc; 33 const char *ih_name; 34 int (*ih_fun)(void *); 35 void *ih_arg; 36 TAILQ_ENTRY(sdmmc_intr_handler) entry; 37 }; 38 39 int sdmmc_submatch(struct device *, void *, void *); 40 int sdmmc_print(void *, const char *); 41 int sdmmc_io_rw_direct(struct sdmmc_softc *, struct sdmmc_function *, 42 int, u_char *, int); 43 int sdmmc_io_rw_extended(struct sdmmc_softc *, struct sdmmc_function *, 44 int, u_char *, int, int); 45 int sdmmc_io_xchg(struct sdmmc_softc *, struct sdmmc_function *, 46 int, u_char *); 47 void sdmmc_io_reset(struct sdmmc_softc *); 48 int sdmmc_io_send_op_cond(struct sdmmc_softc *, u_int32_t, u_int32_t *); 49 50 #ifdef SDMMC_DEBUG 51 #define DPRINTF(s) printf s 52 #else 53 #define DPRINTF(s) /**/ 54 #endif 55 56 #ifdef SDMMC_DEBUG 57 int sdmmc_verbose = 1; 58 #else 59 int sdmmc_verbose = 0; 60 #endif 61 62 /* 63 * Initialize SD I/O card functions (before memory cards). The host 64 * system and controller must support card interrupts in order to use 65 * I/O functions. 66 */ 67 int 68 sdmmc_io_enable(struct sdmmc_softc *sc) 69 { 70 u_int32_t host_ocr; 71 u_int32_t card_ocr; 72 73 rw_assert_wrlock(&sc->sc_lock); 74 75 /* Set host mode to SD "combo" card. */ 76 SET(sc->sc_flags, SMF_SD_MODE|SMF_IO_MODE|SMF_MEM_MODE); 77 78 /* Reset I/O functions. */ 79 sdmmc_io_reset(sc); 80 81 /* 82 * Read the I/O OCR value, determine the number of I/O 83 * functions and whether memory is also present (a "combo 84 * card") by issuing CMD5. SD memory-only and MMC cards 85 * do not respond to CMD5. 86 */ 87 if (sdmmc_io_send_op_cond(sc, 0, &card_ocr) != 0) { 88 /* No SDIO card; switch to SD memory-only mode. */ 89 CLR(sc->sc_flags, SMF_IO_MODE); 90 return 0; 91 } 92 93 /* Parse the additional bits in the I/O OCR value. */ 94 if (!ISSET(card_ocr, SD_IO_OCR_MEM_PRESENT)) { 95 /* SDIO card without memory (not a "combo card"). */ 96 DPRINTF(("%s: no memory present\n", DEVNAME(sc))); 97 CLR(sc->sc_flags, SMF_MEM_MODE); 98 } 99 sc->sc_function_count = SD_IO_OCR_NUM_FUNCTIONS(card_ocr); 100 if (sc->sc_function_count == 0) { 101 /* Useless SDIO card without any I/O functions. */ 102 DPRINTF(("%s: no I/O functions\n", DEVNAME(sc))); 103 CLR(sc->sc_flags, SMF_IO_MODE); 104 return 0; 105 } 106 card_ocr &= SD_IO_OCR_MASK; 107 108 /* Set the lowest voltage supported by the card and host. */ 109 host_ocr = sdmmc_chip_host_ocr(sc->sct, sc->sch); 110 if (sdmmc_set_bus_power(sc, host_ocr, card_ocr) != 0) { 111 printf("%s: can't supply voltage requested by card\n", 112 DEVNAME(sc)); 113 return 1; 114 } 115 116 /* Reset I/O functions (again). */ 117 sdmmc_io_reset(sc); 118 119 /* Send the new OCR value until all cards are ready. */ 120 if (sdmmc_io_send_op_cond(sc, host_ocr, NULL) != 0) { 121 printf("%s: can't send I/O OCR\n", DEVNAME(sc)); 122 return 1; 123 } 124 return 0; 125 } 126 127 /* 128 * Allocate sdmmc_function structures for SD card I/O function 129 * (including function 0). 130 */ 131 void 132 sdmmc_io_scan(struct sdmmc_softc *sc) 133 { 134 struct sdmmc_function *sf0, *sf; 135 int i; 136 137 rw_assert_wrlock(&sc->sc_lock); 138 139 sf0 = sdmmc_function_alloc(sc); 140 sf0->number = 0; 141 if (sdmmc_set_relative_addr(sc, sf0) != 0) { 142 printf("%s: can't set I/O RCA\n", DEVNAME(sc)); 143 SET(sf0->flags, SFF_ERROR); 144 return; 145 } 146 sc->sc_fn0 = sf0; 147 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf0, sf_list); 148 149 /* Verify that the RCA has been set by selecting the card. */ 150 if (sdmmc_select_card(sc, sf0) != 0) { 151 printf("%s: can't select I/O RCA %d\n", DEVNAME(sc), 152 sf0->rca); 153 SET(sf0->flags, SFF_ERROR); 154 return; 155 } 156 157 for (i = 1; i <= sc->sc_function_count; i++) { 158 sf = sdmmc_function_alloc(sc); 159 sf->number = i; 160 sf->rca = sf0->rca; 161 162 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list); 163 } 164 } 165 166 /* 167 * Initialize SDIO card functions. 168 */ 169 int 170 sdmmc_io_init(struct sdmmc_softc *sc, struct sdmmc_function *sf) 171 { 172 rw_assert_wrlock(&sc->sc_lock); 173 174 if (sf->number == 0) { 175 sdmmc_io_write_1(sf, SD_IO_CCCR_BUS_WIDTH, 176 CCCR_BUS_WIDTH_1); 177 178 if (sdmmc_read_cis(sf, &sf->cis) != 0) { 179 printf("%s: can't read CIS\n", DEVNAME(sc)); 180 SET(sf->flags, SFF_ERROR); 181 return 1; 182 } 183 184 sdmmc_check_cis_quirks(sf); 185 186 if (sdmmc_verbose) 187 sdmmc_print_cis(sf); 188 } 189 return 0; 190 } 191 192 /* 193 * Indicate whether the function is ready to operate. 194 */ 195 int 196 sdmmc_io_function_ready(struct sdmmc_function *sf) 197 { 198 struct sdmmc_softc *sc = sf->sc; 199 struct sdmmc_function *sf0 = sc->sc_fn0; 200 u_int8_t rv; 201 202 rw_assert_wrlock(&sc->sc_lock); 203 204 if (sf->number == 0) 205 return 1; /* FN0 is always ready */ 206 207 rv = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_READY); 208 209 return (rv & (1 << sf->number)) != 0; 210 } 211 212 /* 213 * Enable the I/O function. Return zero if the function was 214 * enabled successfully. 215 */ 216 int 217 sdmmc_io_function_enable(struct sdmmc_function *sf) 218 { 219 struct sdmmc_softc *sc = sf->sc; 220 struct sdmmc_function *sf0 = sc->sc_fn0; 221 u_int8_t rv; 222 int retry = 5; 223 224 if (sf->number == 0) 225 return 0; /* FN0 is always enabled */ 226 227 rw_enter_write(&sc->sc_lock); 228 rv = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 229 rv |= (1<<sf->number); 230 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, rv); 231 rw_exit(&sc->sc_lock); 232 233 while (!sdmmc_io_function_ready(sf) && retry-- > 0) 234 tsleep(&lbolt, PPAUSE, "pause", 0); 235 return (retry >= 0) ? 0 : ETIMEDOUT; 236 } 237 238 /* 239 * Disable the I/O function. Return zero if the function was 240 * disabled successfully. 241 */ 242 void 243 sdmmc_io_function_disable(struct sdmmc_function *sf) 244 { 245 struct sdmmc_softc *sc = sf->sc; 246 struct sdmmc_function *sf0 = sc->sc_fn0; 247 u_int8_t rv; 248 249 rw_assert_wrlock(&sc->sc_lock); 250 251 if (sf->number == 0) 252 return; /* FN0 is always enabled */ 253 254 rv = sdmmc_io_read_1(sf0, SD_IO_CCCR_FN_ENABLE); 255 rv &= ~(1<<sf->number); 256 sdmmc_io_write_1(sf0, SD_IO_CCCR_FN_ENABLE, rv); 257 } 258 259 void 260 sdmmc_io_attach(struct sdmmc_softc *sc) 261 { 262 struct sdmmc_function *sf; 263 struct sdmmc_attach_args saa; 264 265 rw_assert_wrlock(&sc->sc_lock); 266 267 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 268 if (sf->number < 1) 269 continue; 270 271 bzero(&saa, sizeof saa); 272 saa.sf = sf; 273 274 sf->child = config_found_sm(&sc->sc_dev, &saa, sdmmc_print, 275 sdmmc_submatch); 276 } 277 } 278 279 int 280 sdmmc_submatch(struct device *parent, void *match, void *aux) 281 { 282 struct cfdata *cf = match; 283 284 /* Skip the scsibus, it is configured directly. */ 285 if (strcmp(cf->cf_driver->cd_name, "scsibus") == 0) 286 return 0; 287 288 return cf->cf_attach->ca_match(parent, cf, aux); 289 } 290 291 int 292 sdmmc_print(void *aux, const char *pnp) 293 { 294 struct sdmmc_attach_args *sa = aux; 295 struct sdmmc_function *sf = sa->sf; 296 struct sdmmc_cis *cis = &sf->sc->sc_fn0->cis; 297 int i; 298 299 if (pnp) { 300 if (sf->number == 0) 301 return QUIET; 302 303 for (i = 0; i < 4 && cis->cis1_info[i]; i++) 304 printf("%s%s", i ? ", " : "\"", cis->cis1_info[i]); 305 if (i != 0) 306 printf("\""); 307 308 if (cis->manufacturer != SDMMC_VENDOR_INVALID && 309 cis->product != SDMMC_PRODUCT_INVALID) { 310 printf("%s(", i ? " " : ""); 311 if (cis->manufacturer != SDMMC_VENDOR_INVALID) 312 printf("manufacturer 0x%x%s", 313 cis->manufacturer, 314 cis->product == SDMMC_PRODUCT_INVALID ? 315 "" : ", "); 316 if (cis->product != SDMMC_PRODUCT_INVALID) 317 printf("product 0x%x", cis->product); 318 printf(")"); 319 } 320 printf("%sat %s", i ? " " : "", pnp); 321 } 322 printf(" function %d", sf->number); 323 324 if (!pnp) { 325 for (i = 0; i < 3 && cis->cis1_info[i]; i++) 326 printf("%s%s", i ? ", " : " \"", cis->cis1_info[i]); 327 if (i != 0) 328 printf("\""); 329 } 330 return UNCONF; 331 } 332 333 void 334 sdmmc_io_detach(struct sdmmc_softc *sc) 335 { 336 struct sdmmc_function *sf; 337 338 rw_assert_wrlock(&sc->sc_lock); 339 340 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) { 341 if (sf->child != NULL) { 342 config_detach(sf->child, DETACH_FORCE); 343 sf->child = NULL; 344 } 345 } 346 347 KASSERT(TAILQ_EMPTY(&sc->sc_intrq)); 348 } 349 350 int 351 sdmmc_io_rw_direct(struct sdmmc_softc *sc, struct sdmmc_function *sf, 352 int reg, u_char *datap, int arg) 353 { 354 struct sdmmc_command cmd; 355 int error; 356 357 rw_assert_wrlock(&sc->sc_lock); 358 359 /* Make sure the card is selected. */ 360 if ((error = sdmmc_select_card(sc, sf)) != 0) { 361 rw_exit(&sc->sc_lock); 362 return error; 363 } 364 365 arg |= ((sf == NULL ? 0 : sf->number) & SD_ARG_CMD52_FUNC_MASK) << 366 SD_ARG_CMD52_FUNC_SHIFT; 367 arg |= (reg & SD_ARG_CMD52_REG_MASK) << 368 SD_ARG_CMD52_REG_SHIFT; 369 arg |= (*datap & SD_ARG_CMD52_DATA_MASK) << 370 SD_ARG_CMD52_DATA_SHIFT; 371 372 bzero(&cmd, sizeof cmd); 373 cmd.c_opcode = SD_IO_RW_DIRECT; 374 cmd.c_arg = arg; 375 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 376 377 error = sdmmc_mmc_command(sc, &cmd); 378 *datap = SD_R5_DATA(cmd.c_resp); 379 380 return error; 381 } 382 383 /* 384 * Useful values of `arg' to pass in are either SD_ARG_CMD53_READ or 385 * SD_ARG_CMD53_WRITE. SD_ARG_CMD53_INCREMENT may be ORed into `arg' 386 * to access successive register locations instead of accessing the 387 * same register many times. 388 */ 389 int 390 sdmmc_io_rw_extended(struct sdmmc_softc *sc, struct sdmmc_function *sf, 391 int reg, u_char *datap, int datalen, int arg) 392 { 393 struct sdmmc_command cmd; 394 int error; 395 396 rw_assert_wrlock(&sc->sc_lock); 397 398 #if 0 399 /* Make sure the card is selected. */ 400 if ((error = sdmmc_select_card(sc, sf)) != 0) { 401 rw_exit(&sc->sc_lock); 402 return error; 403 } 404 #endif 405 406 arg |= ((sf == NULL ? 0 : sf->number) & SD_ARG_CMD53_FUNC_MASK) << 407 SD_ARG_CMD53_FUNC_SHIFT; 408 arg |= (reg & SD_ARG_CMD53_REG_MASK) << 409 SD_ARG_CMD53_REG_SHIFT; 410 arg |= (datalen & SD_ARG_CMD53_LENGTH_MASK) << 411 SD_ARG_CMD53_LENGTH_SHIFT; 412 413 bzero(&cmd, sizeof cmd); 414 cmd.c_opcode = SD_IO_RW_EXTENDED; 415 cmd.c_arg = arg; 416 cmd.c_flags = SCF_CMD_AC | SCF_RSP_R5; 417 cmd.c_data = datap; 418 cmd.c_datalen = datalen; 419 cmd.c_blklen = MIN(datalen, sdmmc_chip_host_maxblklen(sc->sct, sc->sch)); 420 421 if (!ISSET(arg, SD_ARG_CMD53_WRITE)) 422 cmd.c_flags |= SCF_CMD_READ; 423 424 error = sdmmc_mmc_command(sc, &cmd); 425 rw_exit(&sc->sc_lock); 426 return error; 427 } 428 429 u_int8_t 430 sdmmc_io_read_1(struct sdmmc_function *sf, int reg) 431 { 432 u_int8_t data = 0; 433 434 rw_assert_wrlock(&sf->sc->sc_lock); 435 436 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 437 SD_ARG_CMD52_READ); 438 return data; 439 } 440 441 void 442 sdmmc_io_write_1(struct sdmmc_function *sf, int reg, u_int8_t data) 443 { 444 rw_assert_wrlock(&sf->sc->sc_lock); 445 446 (void)sdmmc_io_rw_direct(sf->sc, sf, reg, (u_char *)&data, 447 SD_ARG_CMD52_WRITE); 448 } 449 450 u_int16_t 451 sdmmc_io_read_2(struct sdmmc_function *sf, int reg) 452 { 453 u_int16_t data = 0; 454 455 rw_assert_wrlock(&sf->sc->sc_lock); 456 457 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 458 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 459 return data; 460 } 461 462 void 463 sdmmc_io_write_2(struct sdmmc_function *sf, int reg, u_int16_t data) 464 { 465 rw_assert_wrlock(&sf->sc->sc_lock); 466 467 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 2, 468 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 469 } 470 471 u_int32_t 472 sdmmc_io_read_4(struct sdmmc_function *sf, int reg) 473 { 474 u_int32_t data = 0; 475 476 rw_assert_wrlock(&sf->sc->sc_lock); 477 478 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 479 SD_ARG_CMD53_READ | SD_ARG_CMD53_INCREMENT); 480 return data; 481 } 482 483 void 484 sdmmc_io_write_4(struct sdmmc_function *sf, int reg, u_int32_t data) 485 { 486 rw_assert_wrlock(&sf->sc->sc_lock); 487 488 (void)sdmmc_io_rw_extended(sf->sc, sf, reg, (u_char *)&data, 4, 489 SD_ARG_CMD53_WRITE | SD_ARG_CMD53_INCREMENT); 490 } 491 492 int 493 sdmmc_io_read_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 494 int datalen) 495 { 496 int error; 497 498 rw_assert_wrlock(&sf->sc->sc_lock); 499 500 while (datalen > SD_ARG_CMD53_LENGTH_MAX) { 501 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 502 SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_READ); 503 if (error) 504 return error; 505 data += SD_ARG_CMD53_LENGTH_MAX; 506 datalen -= SD_ARG_CMD53_LENGTH_MAX; 507 } 508 509 return sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 510 SD_ARG_CMD53_READ); 511 } 512 513 int 514 sdmmc_io_write_multi_1(struct sdmmc_function *sf, int reg, u_char *data, 515 int datalen) 516 { 517 int error; 518 519 rw_assert_wrlock(&sf->sc->sc_lock); 520 521 while (datalen > SD_ARG_CMD53_LENGTH_MAX) { 522 error = sdmmc_io_rw_extended(sf->sc, sf, reg, data, 523 SD_ARG_CMD53_LENGTH_MAX, SD_ARG_CMD53_WRITE); 524 if (error) 525 return error; 526 data += SD_ARG_CMD53_LENGTH_MAX; 527 datalen -= SD_ARG_CMD53_LENGTH_MAX; 528 } 529 530 return sdmmc_io_rw_extended(sf->sc, sf, reg, data, datalen, 531 SD_ARG_CMD53_WRITE); 532 } 533 534 int 535 sdmmc_io_xchg(struct sdmmc_softc *sc, struct sdmmc_function *sf, 536 int reg, u_char *datap) 537 { 538 539 rw_assert_wrlock(&sc->sc_lock); 540 541 return sdmmc_io_rw_direct(sc, sf, reg, datap, 542 SD_ARG_CMD52_WRITE|SD_ARG_CMD52_EXCHANGE); 543 } 544 545 /* 546 * Reset the I/O functions of the card. 547 */ 548 void 549 sdmmc_io_reset(struct sdmmc_softc *sc) 550 { 551 #if 0 /* XXX command fails */ 552 (void)sdmmc_io_write(sc, NULL, SD_IO_REG_CCCR_CTL, CCCR_CTL_RES); 553 sdmmc_delay(100000); 554 #endif 555 } 556 557 /* 558 * Get or set the card's I/O OCR value (SDIO). 559 */ 560 int 561 sdmmc_io_send_op_cond(struct sdmmc_softc *sc, u_int32_t ocr, u_int32_t *ocrp) 562 { 563 struct sdmmc_command cmd; 564 int error; 565 int i; 566 567 rw_assert_wrlock(&sc->sc_lock); 568 569 /* 570 * If we change the OCR value, retry the command until the OCR 571 * we receive in response has the "CARD BUSY" bit set, meaning 572 * that all cards are ready for identification. 573 */ 574 for (i = 0; i < 100; i++) { 575 bzero(&cmd, sizeof cmd); 576 cmd.c_opcode = SD_IO_SEND_OP_COND; 577 cmd.c_arg = ocr; 578 cmd.c_flags = SCF_CMD_BCR | SCF_RSP_R4; 579 580 error = sdmmc_mmc_command(sc, &cmd); 581 if (error != 0) 582 break; 583 if (ISSET(MMC_R4(cmd.c_resp), SD_IO_OCR_MEM_READY) || 584 ocr == 0) 585 break; 586 error = ETIMEDOUT; 587 sdmmc_delay(10000); 588 } 589 if (error == 0 && ocrp != NULL) 590 *ocrp = MMC_R4(cmd.c_resp); 591 592 return error; 593 } 594 595 /* 596 * Card interrupt handling 597 */ 598 599 void 600 sdmmc_intr_enable(struct sdmmc_function *sf) 601 { 602 struct sdmmc_softc *sc = sf->sc; 603 struct sdmmc_function *sf0 = sc->sc_fn0; 604 u_int8_t imask; 605 606 rw_enter_write(&sc->sc_lock); 607 imask = sdmmc_io_read_1(sf0, SD_IO_CCCR_INT_ENABLE); 608 imask |= 1 << sf->number; 609 sdmmc_io_write_1(sf0, SD_IO_CCCR_INT_ENABLE, imask); 610 rw_exit(&sc->sc_lock); 611 } 612 613 void 614 sdmmc_intr_disable(struct sdmmc_function *sf) 615 { 616 struct sdmmc_softc *sc = sf->sc; 617 struct sdmmc_function *sf0 = sc->sc_fn0; 618 u_int8_t imask; 619 620 rw_enter_write(&sc->sc_lock); 621 imask = sdmmc_io_read_1(sf0, SD_IO_CCCR_INT_ENABLE); 622 imask &= ~(1 << sf->number); 623 sdmmc_io_write_1(sf0, SD_IO_CCCR_INT_ENABLE, imask); 624 rw_exit(&sc->sc_lock); 625 } 626 627 /* 628 * Establish a handler for the SDIO card interrupt. Because the 629 * interrupt may be shared with different SDIO functions, multiple 630 * handlers can be established. 631 */ 632 void * 633 sdmmc_intr_establish(struct device *sdmmc, int (*fun)(void *), 634 void *arg, const char *name) 635 { 636 struct sdmmc_softc *sc = (struct sdmmc_softc *)sdmmc; 637 struct sdmmc_intr_handler *ih; 638 int s; 639 640 if (sc->sct->card_intr_mask == NULL) 641 return NULL; 642 643 ih = malloc(sizeof *ih, M_DEVBUF, M_WAITOK | M_CANFAIL | M_ZERO); 644 if (ih == NULL) 645 return NULL; 646 647 ih->ih_name = name; 648 ih->ih_softc = sc; 649 ih->ih_fun = fun; 650 ih->ih_arg = arg; 651 652 s = splhigh(); 653 if (TAILQ_EMPTY(&sc->sc_intrq)) { 654 sdmmc_intr_enable(sc->sc_fn0); 655 sdmmc_chip_card_intr_mask(sc->sct, sc->sch, 1); 656 } 657 TAILQ_INSERT_TAIL(&sc->sc_intrq, ih, entry); 658 splx(s); 659 return ih; 660 } 661 662 /* 663 * Disestablish the given handler. 664 */ 665 void 666 sdmmc_intr_disestablish(void *cookie) 667 { 668 struct sdmmc_intr_handler *ih = cookie; 669 struct sdmmc_softc *sc = ih->ih_softc; 670 int s; 671 672 if (sc->sct->card_intr_mask == NULL) 673 return; 674 675 s = splhigh(); 676 TAILQ_REMOVE(&sc->sc_intrq, ih, entry); 677 if (TAILQ_EMPTY(&sc->sc_intrq)) { 678 sdmmc_chip_card_intr_mask(sc->sct, sc->sch, 0); 679 sdmmc_intr_disable(sc->sc_fn0); 680 } 681 splx(s); 682 683 free(ih, M_DEVBUF, 0); 684 } 685 686 /* 687 * Call established SDIO card interrupt handlers. The host controller 688 * must call this function from its own interrupt handler to handle an 689 * SDIO interrupt from the card. 690 */ 691 void 692 sdmmc_card_intr(struct device *sdmmc) 693 { 694 struct sdmmc_softc *sc = (struct sdmmc_softc *)sdmmc; 695 696 if (sc->sct->card_intr_mask == NULL) 697 return; 698 699 if (!sdmmc_task_pending(&sc->sc_intr_task)) 700 sdmmc_add_task(sc, &sc->sc_intr_task); 701 } 702 703 void 704 sdmmc_intr_task(void *arg) 705 { 706 struct sdmmc_softc *sc = arg; 707 struct sdmmc_intr_handler *ih; 708 int s; 709 710 s = splhigh(); 711 TAILQ_FOREACH(ih, &sc->sc_intrq, entry) { 712 splx(s); 713 714 /* XXX examine return value and do evcount stuff*/ 715 (void)ih->ih_fun(ih->ih_arg); 716 717 s = splhigh(); 718 } 719 sdmmc_chip_card_intr_ack(sc->sct, sc->sch); 720 splx(s); 721 } 722