1 /* $OpenBSD: tcds.c,v 1.9 2017/10/27 20:21:53 mpi Exp $ */ 2 /* $NetBSD: tcds.c,v 1.3 2001/11/13 06:26:10 lukem Exp $ */ 3 4 /*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 10 * NASA Ames Research Center. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University. 36 * All rights reserved. 37 * 38 * Author: Keith Bostic, Chris G. Demetriou 39 * 40 * Permission to use, copy, modify and distribute this software and 41 * its documentation is hereby granted, provided that both the copyright 42 * notice and this permission notice appear in all copies of the 43 * software, derivative works or modified versions, and any portions 44 * thereof, and that both notices appear in supporting documentation. 45 * 46 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 47 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 48 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 49 * 50 * Carnegie Mellon requests users of this software to return to 51 * 52 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 53 * School of Computer Science 54 * Carnegie Mellon University 55 * Pittsburgh PA 15213-3890 56 * 57 * any improvements or extensions that they make and grant Carnegie the 58 * rights to redistribute these changes. 59 */ 60 61 #include <sys/param.h> 62 #include <sys/kernel.h> 63 #include <sys/systm.h> 64 #include <sys/device.h> 65 #include <sys/malloc.h> 66 67 #ifdef __alpha__ 68 #include <machine/rpb.h> 69 #endif /* __alpha__ */ 70 71 #include <scsi/scsi_all.h> 72 #include <scsi/scsiconf.h> 73 74 #include <dev/ic/ncr53c9xvar.h> 75 76 #include <machine/bus.h> 77 78 #include <dev/tc/tcvar.h> 79 #include <dev/tc/tcdsreg.h> 80 #include <dev/tc/tcdsvar.h> 81 82 struct tcds_softc { 83 struct device sc_dv; 84 bus_space_tag_t sc_bst; 85 bus_space_handle_t sc_bsh; 86 bus_dma_tag_t sc_dmat; 87 void *sc_cookie; 88 int sc_flags; 89 struct tcds_slotconfig sc_slots[2]; 90 }; 91 92 /* sc_flags */ 93 #define TCDSF_BASEBOARD 0x01 /* baseboard on DEC 3000 */ 94 #define TCDSF_FASTSCSI 0x02 /* supports Fast SCSI */ 95 96 /* Definition of the driver for autoconfig. */ 97 int tcdsmatch(struct device *, void *, void *); 98 void tcdsattach(struct device *, struct device *, void *); 99 int tcdsprint(void *, const char *); 100 int tcdssubmatch(struct device *, void *, void *); 101 102 struct cfattach tcds_ca = { 103 sizeof(struct tcds_softc), tcdsmatch, tcdsattach, 104 }; 105 106 struct cfdriver tcds_cd = { 107 NULL, "tcds", DV_DULL, 108 }; 109 110 /*static*/ int tcds_intr(void *); 111 /*static*/ int tcds_intrnull(void *); 112 113 struct tcds_device { 114 const char *td_name; 115 int td_flags; 116 } tcds_devices[] = { 117 #ifdef __alpha__ 118 { "PMAZ-DS ", TCDSF_BASEBOARD }, 119 { "PMAZ-FS ", TCDSF_BASEBOARD|TCDSF_FASTSCSI }, 120 #endif /* __alpha__ */ 121 { "PMAZB-AA", 0 }, 122 { "PMAZC-AA", TCDSF_FASTSCSI }, 123 { NULL, 0 }, 124 }; 125 126 struct tcds_device *tcds_lookup(const char *); 127 void tcds_params(struct tcds_softc *, int, int *, int *); 128 129 struct tcds_device * 130 tcds_lookup(modname) 131 const char *modname; 132 { 133 struct tcds_device *td; 134 135 for (td = tcds_devices; td->td_name != NULL; td++) 136 if (strncmp(td->td_name, modname, TC_ROM_LLEN) == 0) 137 return (td); 138 139 return (NULL); 140 } 141 142 int 143 tcdsmatch(parent, cfdata, aux) 144 struct device *parent; 145 void *cfdata, *aux; 146 { 147 struct tc_attach_args *ta = aux; 148 149 return (tcds_lookup(ta->ta_modname) != NULL); 150 } 151 152 void 153 tcdsattach(parent, self, aux) 154 struct device *parent, *self; 155 void *aux; 156 { 157 struct tcds_softc *sc = (struct tcds_softc *)self; 158 struct tc_attach_args *ta = aux; 159 struct tcdsdev_attach_args tcdsdev; 160 struct tcds_slotconfig *slotc; 161 struct tcds_device *td; 162 bus_space_handle_t sbsh[2]; 163 int i, gpi2; 164 165 td = tcds_lookup(ta->ta_modname); 166 if (td == NULL) 167 panic("tcdsattach: impossible"); 168 169 printf(": TurboChannel Dual SCSI"); 170 if (td->td_flags & TCDSF_BASEBOARD) 171 printf(" (baseboard)"); 172 printf("\n"); 173 174 sc->sc_flags = td->td_flags; 175 176 sc->sc_bst = ta->ta_memt; 177 sc->sc_dmat = ta->ta_dmat; 178 179 /* 180 * Map the device. 181 */ 182 if (bus_space_map(sc->sc_bst, ta->ta_addr, 183 (TCDS_SCSI1_OFFSET + 0x100), 0, &sc->sc_bsh)) { 184 printf("%s: unable to map device\n", sc->sc_dv.dv_xname); 185 return; 186 } 187 188 /* 189 * Now, slice off two subregions for the individual NCR SCSI chips. 190 */ 191 if (bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI0_OFFSET, 192 0x100, &sbsh[0]) || 193 bus_space_subregion(sc->sc_bst, sc->sc_bsh, TCDS_SCSI1_OFFSET, 194 0x100, &sbsh[1])) { 195 printf("%s: unable to subregion SCSI chip space\n", 196 sc->sc_dv.dv_xname); 197 return; 198 } 199 200 sc->sc_cookie = ta->ta_cookie; 201 202 tc_intr_establish(parent, sc->sc_cookie, IPL_BIO, tcds_intr, sc, 203 self->dv_xname); 204 205 /* 206 * XXX 207 * IMER apparently has some random (or, not so random, but still 208 * not useful) bits set in it when the system boots. Clear it. 209 */ 210 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, 0); 211 212 /* XXX Initial contents of CIR? */ 213 214 /* 215 * Remember if GPI2 is set in the CIR; we'll need it later. 216 */ 217 gpi2 = (bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR) & 218 TCDS_CIR_GPI_2) != 0; 219 220 /* 221 * Set up the per-slot definitions for later use. 222 */ 223 224 /* fill in common information first */ 225 for (i = 0; i < 2; i++) { 226 slotc = &sc->sc_slots[i]; 227 bzero(slotc, sizeof *slotc); /* clear everything */ 228 229 slotc->sc_slot = i; 230 slotc->sc_bst = sc->sc_bst; 231 slotc->sc_bsh = sc->sc_bsh; 232 slotc->sc_intrhand = tcds_intrnull; 233 slotc->sc_intrarg = (void *)(long)i; 234 } 235 236 /* information for slot 0 */ 237 slotc = &sc->sc_slots[0]; 238 slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET; 239 slotc->sc_intrmaskbits = 240 TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB; 241 slotc->sc_intrbits = TCDS_CIR_SCSI0_INT; 242 slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA; 243 slotc->sc_errorbits = 0; /* XXX */ 244 slotc->sc_sda = TCDS_SCSI0_DMA_ADDR; 245 slotc->sc_dic = TCDS_SCSI0_DMA_INTR; 246 slotc->sc_dud0 = TCDS_SCSI0_DMA_DUD0; 247 slotc->sc_dud1 = TCDS_SCSI0_DMA_DUD1; 248 249 /* information for slot 1 */ 250 slotc = &sc->sc_slots[1]; 251 slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET; 252 slotc->sc_intrmaskbits = 253 TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB; 254 slotc->sc_intrbits = TCDS_CIR_SCSI1_INT; 255 slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA; 256 slotc->sc_errorbits = 0; /* XXX */ 257 slotc->sc_sda = TCDS_SCSI1_DMA_ADDR; 258 slotc->sc_dic = TCDS_SCSI1_DMA_INTR; 259 slotc->sc_dud0 = TCDS_SCSI1_DMA_DUD0; 260 slotc->sc_dud1 = TCDS_SCSI1_DMA_DUD1; 261 262 /* find the hardware attached to the TCDS ASIC */ 263 for (i = 0; i < 2; i++) { 264 tcds_params(sc, i, &tcdsdev.tcdsda_id, 265 &tcdsdev.tcdsda_fast); 266 267 tcdsdev.tcdsda_bst = sc->sc_bst; 268 tcdsdev.tcdsda_bsh = sbsh[i]; 269 tcdsdev.tcdsda_dmat = sc->sc_dmat; 270 tcdsdev.tcdsda_chip = i; 271 tcdsdev.tcdsda_sc = &sc->sc_slots[i]; 272 /* 273 * Determine the chip frequency. TCDSF_FASTSCSI will be set 274 * for TC option cards. For baseboard chips, GPI2 is set, for a 275 * 25MHz clock, else a 40MHz clock. 276 */ 277 if ((sc->sc_flags & TCDSF_BASEBOARD && gpi2 == 0) || 278 sc->sc_flags & TCDSF_FASTSCSI) { 279 tcdsdev.tcdsda_freq = 40000000; 280 tcdsdev.tcdsda_period = tcdsdev.tcdsda_fast ? 4 : 8; 281 } else { 282 tcdsdev.tcdsda_freq = 25000000; 283 tcdsdev.tcdsda_period = 5; 284 } 285 if (sc->sc_flags & TCDSF_BASEBOARD) 286 tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C94; 287 else 288 tcdsdev.tcdsda_variant = NCR_VARIANT_NCR53C96; 289 290 tcds_scsi_reset(tcdsdev.tcdsda_sc); 291 292 config_found_sm(self, &tcdsdev, tcdsprint, tcdssubmatch); 293 #ifdef __alpha__ 294 /* 295 * The second SCSI chip isn't present on the baseboard TCDS 296 * on the DEC Alpha 3000/300 series. 297 */ 298 if (sc->sc_flags & TCDSF_BASEBOARD && 299 cputype == ST_DEC_3000_300) 300 break; 301 #endif /* __alpha__ */ 302 } 303 } 304 305 int 306 tcdssubmatch(parent, vcf, aux) 307 struct device *parent; 308 void *vcf, *aux; 309 { 310 struct tcdsdev_attach_args *tcdsdev = aux; 311 struct cfdata *cf = vcf; 312 313 if (cf->cf_loc[0] != -1 && 314 cf->cf_loc[0] != tcdsdev->tcdsda_chip) 315 return (0); 316 317 return ((*cf->cf_attach->ca_match)(parent, vcf, aux)); 318 } 319 320 int 321 tcdsprint(aux, pnp) 322 void *aux; 323 const char *pnp; 324 { 325 struct tcdsdev_attach_args *tcdsdev = aux; 326 327 /* Only ASCs can attach to TCDSs; easy. */ 328 if (pnp) 329 printf("asc at %s", pnp); 330 331 printf(" chip %d", tcdsdev->tcdsda_chip); 332 333 return (UNCONF); 334 } 335 336 void 337 tcds_intr_establish(tcds, slot, func, arg, name) 338 struct device *tcds; 339 int slot; 340 int (*func)(void *); 341 void *arg; 342 const char *name; 343 { 344 struct tcds_softc *sc = (struct tcds_softc *)tcds; 345 346 if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull) 347 panic("tcds_intr_establish: chip %d twice", slot); 348 349 sc->sc_slots[slot].sc_intrhand = func; 350 sc->sc_slots[slot].sc_intrarg = arg; 351 evcount_attach(&sc->sc_slots[slot].sc_count, name, NULL); 352 353 tcds_scsi_reset(&sc->sc_slots[slot]); 354 } 355 356 void 357 tcds_intr_disestablish(tcds, slot) 358 struct device *tcds; 359 int slot; 360 { 361 struct tcds_softc *sc = (struct tcds_softc *)tcds; 362 363 if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull) 364 panic("tcds_intr_disestablish: chip %d missing intr", 365 slot); 366 367 sc->sc_slots[slot].sc_intrhand = tcds_intrnull; 368 sc->sc_slots[slot].sc_intrarg = (void *)(u_long)slot; 369 evcount_detach(&sc->sc_slots[slot].sc_count); 370 371 tcds_dma_enable(&sc->sc_slots[slot], 0); 372 tcds_scsi_enable(&sc->sc_slots[slot], 0); 373 } 374 375 int 376 tcds_intrnull(val) 377 void *val; 378 { 379 380 panic("tcds_intrnull: uncaught TCDS intr for chip %lu", 381 (u_long)val); 382 } 383 384 void 385 tcds_scsi_reset(sc) 386 struct tcds_slotconfig *sc; 387 { 388 u_int32_t cir; 389 390 tcds_dma_enable(sc, 0); 391 tcds_scsi_enable(sc, 0); 392 393 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 394 TCDS_CIR_CLR(cir, sc->sc_resetbits); 395 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 396 397 DELAY(1); 398 399 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 400 TCDS_CIR_SET(cir, sc->sc_resetbits); 401 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 402 403 tcds_scsi_enable(sc, 1); 404 tcds_dma_enable(sc, 1); 405 } 406 407 void 408 tcds_scsi_enable(sc, on) 409 struct tcds_slotconfig *sc; 410 int on; 411 { 412 u_int32_t imer; 413 414 imer = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER); 415 416 if (on) 417 imer |= sc->sc_intrmaskbits; 418 else 419 imer &= ~sc->sc_intrmaskbits; 420 421 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_IMER, imer); 422 } 423 424 void 425 tcds_dma_enable(sc, on) 426 struct tcds_slotconfig *sc; 427 int on; 428 { 429 u_int32_t cir; 430 431 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 432 433 /* XXX Clear/set IOSLOT/PBS bits. */ 434 if (on) 435 TCDS_CIR_SET(cir, sc->sc_dmabits); 436 else 437 TCDS_CIR_CLR(cir, sc->sc_dmabits); 438 439 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, cir); 440 } 441 442 int 443 tcds_scsi_isintr(sc, clear) 444 struct tcds_slotconfig *sc; 445 int clear; 446 { 447 u_int32_t cir; 448 449 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 450 451 if ((cir & sc->sc_intrbits) != 0) { 452 if (clear) { 453 TCDS_CIR_CLR(cir, sc->sc_intrbits); 454 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, 455 cir); 456 } 457 return (1); 458 } else 459 return (0); 460 } 461 462 int 463 tcds_scsi_iserr(sc) 464 struct tcds_slotconfig *sc; 465 { 466 u_int32_t cir; 467 468 cir = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 469 return ((cir & sc->sc_errorbits) != 0); 470 } 471 472 int 473 tcds_intr(arg) 474 void *arg; 475 { 476 struct tcds_softc *sc = arg; 477 u_int32_t ir, ir0; 478 479 /* 480 * XXX 481 * Copy and clear (gag!) the interrupts. 482 */ 483 ir = ir0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR); 484 TCDS_CIR_CLR(ir0, TCDS_CIR_ALLINTR); 485 bus_space_write_4(sc->sc_bst, sc->sc_bsh, TCDS_CIR, ir0); 486 tc_syncbus(); 487 488 #define CHECKINTR(slot) \ 489 if (ir & sc->sc_slots[slot].sc_intrbits) { \ 490 sc->sc_slots[slot].sc_count.ec_count++; \ 491 (void)(*sc->sc_slots[slot].sc_intrhand) \ 492 (sc->sc_slots[slot].sc_intrarg); \ 493 } 494 CHECKINTR(0); 495 CHECKINTR(1); 496 #undef CHECKINTR 497 498 #ifdef DIAGNOSTIC 499 /* 500 * Interrupts not currently handled, but would like to know if they 501 * occur. 502 * 503 * XXX 504 * Don't know if we have to set the interrupt mask and enable bits 505 * in the IMER to allow some of them to happen? 506 */ 507 #define PRINTINTR(msg, bits) \ 508 if (ir & bits) \ 509 printf("%s: %s", sc->sc_dv.dv_xname, msg); 510 PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ); 511 PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ); 512 PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH); 513 PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH); 514 PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA); 515 PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA); 516 PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB); 517 PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB); 518 PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR); 519 PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR); 520 PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR); 521 PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR); 522 PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR); 523 PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR); 524 #undef PRINTINTR 525 #endif 526 527 tc_mb(); 528 529 return (1); 530 } 531 532 void 533 tcds_params(sc, chip, idp, fastp) 534 struct tcds_softc *sc; 535 int chip, *idp, *fastp; 536 { 537 int id, fast; 538 u_int32_t ids; 539 540 #ifdef __alpha__ 541 if (sc->sc_flags & TCDSF_BASEBOARD) { 542 extern u_int8_t dec_3000_scsiid[], dec_3000_scsifast[]; 543 544 id = dec_3000_scsiid[chip]; 545 fast = dec_3000_scsifast[chip]; 546 } else 547 #endif /* __alpha__ */ 548 { 549 /* 550 * SCSI IDs are stored in the EEPROM, along with whether or 551 * not the device is "fast". Chip 0 is the high nibble, 552 * chip 1 the low nibble. 553 */ 554 ids = bus_space_read_4(sc->sc_bst, sc->sc_bsh, TCDS_EEPROM_IDS); 555 if (chip == 0) 556 ids >>= 4; 557 558 id = ids & 0x7; 559 fast = ids & 0x8; 560 } 561 562 if (id < 0 || id > 7) { 563 printf("%s: WARNING: bad SCSI ID %d for chip %d, using 7\n", 564 sc->sc_dv.dv_xname, id, chip); 565 id = 7; 566 } 567 568 if (fast) 569 printf("%s: fast mode set for chip %d\n", 570 sc->sc_dv.dv_xname, chip); 571 572 *idp = id; 573 *fastp = fast; 574 } 575