1 /* $OpenBSD: dwc2.c,v 1.25 2015/03/19 10:39:17 mpi Exp $ */ 2 /* $NetBSD: dwc2.c,v 1.32 2014/09/02 23:26:20 macallan Exp $ */ 3 4 /*- 5 * Copyright (c) 2013 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Nick Hudson 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #if 0 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: dwc2.c,v 1.32 2014/09/02 23:26:20 macallan Exp $"); 36 #endif 37 38 #if 0 39 #include "opt_usb.h" 40 #endif 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/device.h> 47 #include <sys/select.h> 48 #include <sys/proc.h> 49 #include <sys/queue.h> 50 #if 0 51 #include <sys/cpu.h> 52 #endif 53 54 #include <machine/bus.h> 55 #include <machine/endian.h> 56 57 #include <dev/usb/usb.h> 58 #include <dev/usb/usbdi.h> 59 #include <dev/usb/usbdivar.h> 60 #include <dev/usb/usb_mem.h> 61 62 #if 0 63 #include <dev/usb/usbroothub_subr.h> 64 #endif 65 66 #include <dev/usb/dwc2/dwc2.h> 67 #include <dev/usb/dwc2/dwc2var.h> 68 69 #include <dev/usb/dwc2/dwc2_core.h> 70 #include <dev/usb/dwc2/dwc2_hcd.h> 71 72 #ifdef DWC2_COUNTERS 73 #define DWC2_EVCNT_ADD(a,b) ((void)((a).ev_count += (b))) 74 #else 75 #define DWC2_EVCNT_ADD(a,b) do { } while (/*CONSTCOND*/0) 76 #endif 77 #define DWC2_EVCNT_INCR(a) DWC2_EVCNT_ADD((a), 1) 78 79 #ifdef DWC2_DEBUG 80 #define DPRINTFN(n,fmt,...) do { \ 81 if (dwc2debug >= (n)) { \ 82 printf("%s: " fmt, \ 83 __FUNCTION__,## __VA_ARGS__); \ 84 } \ 85 } while (0) 86 #define DPRINTF(...) DPRINTFN(1, __VA_ARGS__) 87 int dwc2debug = 0; 88 #else 89 #define DPRINTF(...) do { } while (0) 90 #define DPRINTFN(...) do { } while (0) 91 #endif 92 93 STATIC usbd_status dwc2_open(struct usbd_pipe *); 94 STATIC int dwc2_setaddr(struct usbd_device *, int); 95 STATIC void dwc2_poll(struct usbd_bus *); 96 STATIC void dwc2_softintr(void *); 97 STATIC void dwc2_waitintr(struct dwc2_softc *, struct usbd_xfer *); 98 99 #if 0 100 STATIC usbd_status dwc2_allocm(struct usbd_bus *, struct usb_dma *, uint32_t); 101 STATIC void dwc2_freem(struct usbd_bus *, struct usb_dma *); 102 #endif 103 104 STATIC struct usbd_xfer *dwc2_allocx(struct usbd_bus *); 105 STATIC void dwc2_freex(struct usbd_bus *, struct usbd_xfer *); 106 #if 0 107 STATIC void dwc2_get_lock(struct usbd_bus *, struct mutex **); 108 #endif 109 110 STATIC usbd_status dwc2_root_ctrl_transfer(struct usbd_xfer *); 111 STATIC usbd_status dwc2_root_ctrl_start(struct usbd_xfer *); 112 STATIC void dwc2_root_ctrl_abort(struct usbd_xfer *); 113 STATIC void dwc2_root_ctrl_close(struct usbd_pipe *); 114 STATIC void dwc2_root_ctrl_done(struct usbd_xfer *); 115 116 STATIC usbd_status dwc2_root_intr_transfer(struct usbd_xfer *); 117 STATIC usbd_status dwc2_root_intr_start(struct usbd_xfer *); 118 STATIC void dwc2_root_intr_abort(struct usbd_xfer *); 119 STATIC void dwc2_root_intr_close(struct usbd_pipe *); 120 STATIC void dwc2_root_intr_done(struct usbd_xfer *); 121 122 STATIC usbd_status dwc2_device_ctrl_transfer(struct usbd_xfer *); 123 STATIC usbd_status dwc2_device_ctrl_start(struct usbd_xfer *); 124 STATIC void dwc2_device_ctrl_abort(struct usbd_xfer *); 125 STATIC void dwc2_device_ctrl_close(struct usbd_pipe *); 126 STATIC void dwc2_device_ctrl_done(struct usbd_xfer *); 127 128 STATIC usbd_status dwc2_device_bulk_transfer(struct usbd_xfer *); 129 STATIC usbd_status dwc2_device_bulk_start(struct usbd_xfer *); 130 STATIC void dwc2_device_bulk_abort(struct usbd_xfer *); 131 STATIC void dwc2_device_bulk_close(struct usbd_pipe *); 132 STATIC void dwc2_device_bulk_done(struct usbd_xfer *); 133 134 STATIC usbd_status dwc2_device_intr_transfer(struct usbd_xfer *); 135 STATIC usbd_status dwc2_device_intr_start(struct usbd_xfer *); 136 STATIC void dwc2_device_intr_abort(struct usbd_xfer *); 137 STATIC void dwc2_device_intr_close(struct usbd_pipe *); 138 STATIC void dwc2_device_intr_done(struct usbd_xfer *); 139 140 STATIC usbd_status dwc2_device_isoc_transfer(struct usbd_xfer *); 141 STATIC usbd_status dwc2_device_isoc_start(struct usbd_xfer *); 142 STATIC void dwc2_device_isoc_abort(struct usbd_xfer *); 143 STATIC void dwc2_device_isoc_close(struct usbd_pipe *); 144 STATIC void dwc2_device_isoc_done(struct usbd_xfer *); 145 146 STATIC usbd_status dwc2_device_start(struct usbd_xfer *); 147 148 STATIC void dwc2_close_pipe(struct usbd_pipe *); 149 STATIC void dwc2_abort_xfer(struct usbd_xfer *, usbd_status); 150 151 STATIC void dwc2_device_clear_toggle(struct usbd_pipe *); 152 STATIC void dwc2_noop(struct usbd_pipe *pipe); 153 154 STATIC int dwc2_interrupt(struct dwc2_softc *); 155 STATIC void dwc2_rhc(void *); 156 157 STATIC void dwc2_timeout(void *); 158 STATIC void dwc2_timeout_task(void *); 159 160 STATIC_INLINE void 161 dwc2_allocate_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 162 struct usbd_xfer *xfer) 163 { 164 } 165 166 STATIC_INLINE void 167 dwc2_free_bus_bandwidth(struct dwc2_hsotg *hsotg, u16 bw, 168 struct usbd_xfer *xfer) 169 { 170 } 171 172 #define DWC2_INTR_ENDPT 1 173 174 STATIC struct usbd_bus_methods dwc2_bus_methods = { 175 .open_pipe = dwc2_open, 176 .dev_setaddr = dwc2_setaddr, 177 .soft_intr = dwc2_softintr, 178 .do_poll = dwc2_poll, 179 #if 0 180 .allocm = dwc2_allocm, 181 .freem = dwc2_freem, 182 #endif 183 .allocx = dwc2_allocx, 184 .freex = dwc2_freex, 185 #if 0 186 .get_lock = dwc2_get_lock, 187 #endif 188 }; 189 190 STATIC struct usbd_pipe_methods dwc2_root_ctrl_methods = { 191 .transfer = dwc2_root_ctrl_transfer, 192 .start = dwc2_root_ctrl_start, 193 .abort = dwc2_root_ctrl_abort, 194 .close = dwc2_root_ctrl_close, 195 .cleartoggle = dwc2_noop, 196 .done = dwc2_root_ctrl_done, 197 }; 198 199 STATIC struct usbd_pipe_methods dwc2_root_intr_methods = { 200 .transfer = dwc2_root_intr_transfer, 201 .start = dwc2_root_intr_start, 202 .abort = dwc2_root_intr_abort, 203 .close = dwc2_root_intr_close, 204 .cleartoggle = dwc2_noop, 205 .done = dwc2_root_intr_done, 206 }; 207 208 STATIC struct usbd_pipe_methods dwc2_device_ctrl_methods = { 209 .transfer = dwc2_device_ctrl_transfer, 210 .start = dwc2_device_ctrl_start, 211 .abort = dwc2_device_ctrl_abort, 212 .close = dwc2_device_ctrl_close, 213 .cleartoggle = dwc2_noop, 214 .done = dwc2_device_ctrl_done, 215 }; 216 217 STATIC struct usbd_pipe_methods dwc2_device_intr_methods = { 218 .transfer = dwc2_device_intr_transfer, 219 .start = dwc2_device_intr_start, 220 .abort = dwc2_device_intr_abort, 221 .close = dwc2_device_intr_close, 222 .cleartoggle = dwc2_device_clear_toggle, 223 .done = dwc2_device_intr_done, 224 }; 225 226 STATIC struct usbd_pipe_methods dwc2_device_bulk_methods = { 227 .transfer = dwc2_device_bulk_transfer, 228 .start = dwc2_device_bulk_start, 229 .abort = dwc2_device_bulk_abort, 230 .close = dwc2_device_bulk_close, 231 .cleartoggle = dwc2_device_clear_toggle, 232 .done = dwc2_device_bulk_done, 233 }; 234 235 STATIC struct usbd_pipe_methods dwc2_device_isoc_methods = { 236 .transfer = dwc2_device_isoc_transfer, 237 .start = dwc2_device_isoc_start, 238 .abort = dwc2_device_isoc_abort, 239 .close = dwc2_device_isoc_close, 240 .cleartoggle = dwc2_noop, 241 .done = dwc2_device_isoc_done, 242 }; 243 244 #if 0 245 STATIC usbd_status 246 dwc2_allocm(struct usbd_bus *bus, struct usb_dma *dma, uint32_t size) 247 { 248 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 249 usbd_status status; 250 251 DPRINTFN(10, "\n"); 252 253 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 254 if (status == USBD_NOMEM) 255 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 256 return status; 257 } 258 259 STATIC void 260 dwc2_freem(struct usbd_bus *bus, struct usb_dma *dma) 261 { 262 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 263 264 DPRINTFN(10, "\n"); 265 266 if (dma->block->flags & USB_DMA_RESERVE) { 267 usb_reserve_freem(&sc->sc_dma_reserve, dma); 268 return; 269 } 270 usb_freemem(&sc->sc_bus, dma); 271 } 272 #endif 273 274 /* 275 * Work around the half configured control (default) pipe when setting 276 * the address of a device. 277 */ 278 STATIC int 279 dwc2_setaddr(struct usbd_device *dev, int addr) 280 { 281 if (usbd_set_address(dev, addr)) 282 return (1); 283 284 dev->address = addr; 285 286 /* 287 * Re-establish the default pipe with the new address and the 288 * new max packet size. 289 */ 290 dwc2_close_pipe(dev->default_pipe); 291 if (dwc2_open(dev->default_pipe)) 292 return (EINVAL); 293 294 return (0); 295 } 296 297 struct usbd_xfer * 298 dwc2_allocx(struct usbd_bus *bus) 299 { 300 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 301 struct dwc2_xfer *dxfer; 302 303 DPRINTFN(10, "\n"); 304 305 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolget); 306 dxfer = pool_get(&sc->sc_xferpool, PR_NOWAIT); 307 if (dxfer != NULL) { 308 memset(dxfer, 0, sizeof(*dxfer)); 309 310 dxfer->urb = dwc2_hcd_urb_alloc(sc->sc_hsotg, 311 DWC2_MAXISOCPACKETS, GFP_KERNEL); 312 313 #ifdef DWC2_DEBUG 314 dxfer->xfer.busy_free = XFER_ONQU; 315 #endif 316 } 317 return (struct usbd_xfer *)dxfer; 318 } 319 320 void 321 dwc2_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 322 { 323 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 324 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 325 326 DPRINTFN(10, "\n"); 327 328 #ifdef DWC2_DEBUG 329 if (xfer->busy_free != XFER_ONQU) { 330 DPRINTF("xfer=%p not busy, 0x%08x\n", xfer, xfer->busy_free); 331 } 332 xfer->busy_free = XFER_FREE; 333 #endif 334 DWC2_EVCNT_INCR(sc->sc_ev_xferpoolput); 335 dwc2_hcd_urb_free(sc->sc_hsotg, dxfer->urb, DWC2_MAXISOCPACKETS); 336 pool_put(&sc->sc_xferpool, xfer); 337 } 338 339 #if 0 340 STATIC void 341 dwc2_get_lock(struct usbd_bus *bus, struct mutex **lock) 342 { 343 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 344 345 *lock = &sc->sc_lock; 346 } 347 #endif 348 349 STATIC void 350 dwc2_rhc(void *addr) 351 { 352 struct dwc2_softc *sc = addr; 353 struct usbd_xfer *xfer; 354 u_char *p; 355 356 DPRINTF("\n"); 357 mtx_enter(&sc->sc_lock); 358 xfer = sc->sc_intrxfer; 359 360 if (xfer == NULL) { 361 /* Just ignore the change. */ 362 mtx_leave(&sc->sc_lock); 363 return; 364 365 } 366 /* set port bit */ 367 p = KERNADDR(&xfer->dmabuf, 0); 368 369 p[0] = 0x02; /* we only have one port (1 << 1) */ 370 371 xfer->actlen = xfer->length; 372 xfer->status = USBD_NORMAL_COMPLETION; 373 374 usb_transfer_complete(xfer); 375 mtx_leave(&sc->sc_lock); 376 } 377 378 STATIC void 379 dwc2_softintr(void *v) 380 { 381 struct usbd_bus *bus = v; 382 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 383 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 384 struct dwc2_xfer *dxfer; 385 386 KASSERT(sc->sc_bus.use_polling || mtx_owned(&sc->sc_lock)); 387 388 mtx_enter(&hsotg->lock); 389 while ((dxfer = TAILQ_FIRST(&sc->sc_complete)) != NULL) { 390 391 KASSERTMSG(!timeout_pending(&dxfer->xfer.timeout_handle), 392 "xfer %p pipe %p\n", dxfer, dxfer->xfer.pipe); 393 394 /* 395 * dwc2_abort_xfer will remove this transfer from the 396 * sc_complete queue 397 */ 398 /*XXXNH not tested */ 399 if (dxfer->flags & DWC2_XFER_ABORTING) { 400 wakeup(&dxfer->flags); 401 continue; 402 } 403 404 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 405 406 mtx_leave(&hsotg->lock); 407 usb_transfer_complete(&dxfer->xfer); 408 mtx_enter(&hsotg->lock); 409 } 410 mtx_leave(&hsotg->lock); 411 } 412 413 STATIC void 414 dwc2_waitintr(struct dwc2_softc *sc, struct usbd_xfer *xfer) 415 { 416 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 417 uint32_t intrs; 418 int timo; 419 420 xfer->status = USBD_IN_PROGRESS; 421 for (timo = xfer->timeout; timo >= 0; timo--) { 422 usb_delay_ms(&sc->sc_bus, 1); 423 if (sc->sc_dying) 424 break; 425 intrs = dwc2_read_core_intr(hsotg); 426 427 DPRINTFN(15, "0x%08x\n", intrs); 428 429 if (intrs) { 430 mtx_enter(&hsotg->lock); 431 dwc2_interrupt(sc); 432 mtx_leave(&hsotg->lock); 433 if (xfer->status != USBD_IN_PROGRESS) 434 return; 435 } 436 } 437 438 /* Timeout */ 439 DPRINTF("timeout\n"); 440 441 mtx_enter(&sc->sc_lock); 442 xfer->status = USBD_TIMEOUT; 443 usb_transfer_complete(xfer); 444 mtx_leave(&sc->sc_lock); 445 } 446 447 STATIC void 448 dwc2_timeout(void *addr) 449 { 450 struct usbd_xfer *xfer = addr; 451 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 452 // struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 453 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 454 455 DPRINTF("dxfer=%p\n", dxfer); 456 457 if (sc->sc_dying) { 458 mtx_enter(&sc->sc_lock); 459 dwc2_abort_xfer(&dxfer->xfer, USBD_TIMEOUT); 460 mtx_leave(&sc->sc_lock); 461 return; 462 } 463 464 /* Execute the abort in a process context. */ 465 usb_init_task(&dxfer->abort_task, dwc2_timeout_task, addr, 466 USB_TASK_TYPE_ABORT); 467 usb_add_task(dxfer->xfer.pipe->device, &dxfer->abort_task); 468 } 469 470 STATIC void 471 dwc2_timeout_task(void *addr) 472 { 473 struct usbd_xfer *xfer = addr; 474 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 475 476 DPRINTF("xfer=%p\n", xfer); 477 478 mtx_enter(&sc->sc_lock); 479 dwc2_abort_xfer(xfer, USBD_TIMEOUT); 480 mtx_leave(&sc->sc_lock); 481 } 482 483 usbd_status 484 dwc2_open(struct usbd_pipe *pipe) 485 { 486 struct usbd_device *dev = pipe->device; 487 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 488 struct dwc2_pipe *dpipe = DWC2_PIPE2DPIPE(pipe); 489 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 490 uint8_t addr = dev->address; 491 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 492 usbd_status err; 493 494 DPRINTF("pipe %p addr %d xfertype %d dir %s\n", pipe, addr, xfertype, 495 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? "in" : "out"); 496 497 if (sc->sc_dying) { 498 return USBD_IOERROR; 499 } 500 501 if (addr == sc->sc_addr) { 502 switch (ed->bEndpointAddress) { 503 case USB_CONTROL_ENDPOINT: 504 pipe->methods = &dwc2_root_ctrl_methods; 505 break; 506 case UE_DIR_IN | DWC2_INTR_ENDPT: 507 pipe->methods = &dwc2_root_intr_methods; 508 break; 509 default: 510 DPRINTF("bad bEndpointAddress 0x%02x\n", 511 ed->bEndpointAddress); 512 return USBD_INVAL; 513 } 514 DPRINTF("root hub pipe open\n"); 515 return USBD_NORMAL_COMPLETION; 516 } 517 518 switch (xfertype) { 519 case UE_CONTROL: 520 pipe->methods = &dwc2_device_ctrl_methods; 521 err = usb_allocmem(&sc->sc_bus, sizeof(usb_device_request_t), 522 0, &dpipe->req_dma); 523 if (err) 524 return err; 525 break; 526 case UE_INTERRUPT: 527 pipe->methods = &dwc2_device_intr_methods; 528 break; 529 case UE_ISOCHRONOUS: 530 pipe->methods = &dwc2_device_isoc_methods; 531 break; 532 case UE_BULK: 533 pipe->methods = &dwc2_device_bulk_methods; 534 break; 535 default: 536 DPRINTF("bad xfer type %d\n", xfertype); 537 return USBD_INVAL; 538 } 539 540 dpipe->priv = NULL; /* QH */ 541 542 return USBD_NORMAL_COMPLETION; 543 } 544 545 STATIC void 546 dwc2_poll(struct usbd_bus *bus) 547 { 548 struct dwc2_softc *sc = DWC2_BUS2SC(bus); 549 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 550 551 mtx_enter(&hsotg->lock); 552 dwc2_interrupt(sc); 553 mtx_leave(&hsotg->lock); 554 } 555 556 /* 557 * Close a reqular pipe. 558 * Assumes that there are no pending transactions. 559 */ 560 STATIC void 561 dwc2_close_pipe(struct usbd_pipe *pipe) 562 { 563 #ifdef DIAGNOSTIC 564 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 565 #endif 566 567 KASSERT(mtx_owned(&sc->sc_lock)); 568 } 569 570 /* 571 * Abort a device request. 572 */ 573 STATIC void 574 dwc2_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 575 { 576 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 577 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 578 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 579 struct dwc2_xfer *d, *tmp; 580 bool wake; 581 int err; 582 583 DPRINTF("xfer=%p\n", xfer); 584 585 KASSERT(mtx_owned(&sc->sc_lock)); 586 //KASSERT(!cpu_intr_p() && !cpu_softintr_p()); 587 588 if (sc->sc_dying) { 589 xfer->status = status; 590 timeout_del(&xfer->timeout_handle); 591 usb_transfer_complete(xfer); 592 return; 593 } 594 595 /* 596 * If an abort is already in progress then just wait for it to 597 * complete and return. 598 */ 599 if (dxfer->flags & DWC2_XFER_ABORTING) { 600 xfer->status = status; 601 dxfer->flags |= DWC2_XFER_ABORTWAIT; 602 while (dxfer->flags & DWC2_XFER_ABORTING) 603 tsleep(&dxfer->flags, PZERO, "dwc2xfer", 0); 604 return; 605 } 606 607 /* 608 * Step 1: Make the stack ignore it and stop the timeout. 609 */ 610 mtx_enter(&hsotg->lock); 611 dxfer->flags |= DWC2_XFER_ABORTING; 612 613 xfer->status = status; /* make software ignore it */ 614 timeout_del(&xfer->timeout_handle); 615 616 /* XXXNH suboptimal */ 617 TAILQ_FOREACH_SAFE(d, &sc->sc_complete, xnext, tmp) { 618 if (d == dxfer) { 619 TAILQ_REMOVE(&sc->sc_complete, dxfer, xnext); 620 } 621 } 622 623 err = dwc2_hcd_urb_dequeue(hsotg, dxfer->urb); 624 if (err) { 625 DPRINTF("dwc2_hcd_urb_dequeue failed\n"); 626 } 627 628 mtx_leave(&hsotg->lock); 629 630 /* 631 * Step 2: Execute callback. 632 */ 633 wake = dxfer->flags & DWC2_XFER_ABORTWAIT; 634 dxfer->flags &= ~(DWC2_XFER_ABORTING | DWC2_XFER_ABORTWAIT); 635 636 usb_transfer_complete(xfer); 637 if (wake) { 638 wakeup(&dxfer->flags); 639 } 640 } 641 642 STATIC void 643 dwc2_noop(struct usbd_pipe *pipe) 644 { 645 646 } 647 648 STATIC void 649 dwc2_device_clear_toggle(struct usbd_pipe *pipe) 650 { 651 652 DPRINTF("toggle %d -> 0", pipe->endpoint->savedtoggle); 653 } 654 655 /***********************************************************************/ 656 657 /* 658 * Data structures and routines to emulate the root hub. 659 */ 660 661 STATIC const usb_device_descriptor_t dwc2_devd = { 662 .bLength = sizeof(usb_device_descriptor_t), 663 .bDescriptorType = UDESC_DEVICE, 664 .bcdUSB = {0x00, 0x02}, 665 .bDeviceClass = UDCLASS_HUB, 666 .bDeviceSubClass = UDSUBCLASS_HUB, 667 .bDeviceProtocol = UDPROTO_HSHUBSTT, 668 .bMaxPacketSize = 64, 669 .bcdDevice = {0x00, 0x01}, 670 .iManufacturer = 1, 671 .iProduct = 2, 672 .bNumConfigurations = 1, 673 }; 674 675 struct dwc2_config_desc { 676 usb_config_descriptor_t confd; 677 usb_interface_descriptor_t ifcd; 678 usb_endpoint_descriptor_t endpd; 679 } __packed; 680 681 STATIC const struct dwc2_config_desc dwc2_confd = { 682 .confd = { 683 .bLength = USB_CONFIG_DESCRIPTOR_SIZE, 684 .bDescriptorType = UDESC_CONFIG, 685 .wTotalLength[0] = sizeof(dwc2_confd), 686 .bNumInterface = 1, 687 .bConfigurationValue = 1, 688 .iConfiguration = 0, 689 .bmAttributes = UC_SELF_POWERED, 690 .bMaxPower = 0, 691 }, 692 .ifcd = { 693 .bLength = USB_INTERFACE_DESCRIPTOR_SIZE, 694 .bDescriptorType = UDESC_INTERFACE, 695 .bInterfaceNumber = 0, 696 .bAlternateSetting = 0, 697 .bNumEndpoints = 1, 698 .bInterfaceClass = UICLASS_HUB, 699 .bInterfaceSubClass = UISUBCLASS_HUB, 700 .bInterfaceProtocol = UIPROTO_HSHUBSTT, 701 .iInterface = 0 702 }, 703 .endpd = { 704 .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE, 705 .bDescriptorType = UDESC_ENDPOINT, 706 .bEndpointAddress = UE_DIR_IN | DWC2_INTR_ENDPT, 707 .bmAttributes = UE_INTERRUPT, 708 .wMaxPacketSize = {8, 0}, /* max packet */ 709 .bInterval = 255, 710 }, 711 }; 712 713 #define HSETW(ptr, val) ptr = { (uint8_t)(val), (uint8_t)((val) >> 8) } 714 #if 0 715 /* appears to be unused */ 716 STATIC const usb_hub_descriptor_t dwc2_hubd = { 717 .bDescLength = USB_HUB_DESCRIPTOR_SIZE, 718 .bDescriptorType = UDESC_HUB, 719 .bNbrPorts = 1, 720 HSETW(.wHubCharacteristics, (UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL)), 721 .bPwrOn2PwrGood = 50, 722 .bHubContrCurrent = 0, 723 .DeviceRemovable = {0}, /* port is removable */ 724 }; 725 #endif 726 727 STATIC usbd_status 728 dwc2_root_ctrl_transfer(struct usbd_xfer *xfer) 729 { 730 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 731 usbd_status err; 732 733 mtx_enter(&sc->sc_lock); 734 err = usb_insert_transfer(xfer); 735 mtx_leave(&sc->sc_lock); 736 if (err) 737 return err; 738 739 return dwc2_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 740 } 741 742 STATIC usbd_status 743 dwc2_root_ctrl_start(struct usbd_xfer *xfer) 744 { 745 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 746 usb_device_request_t *req; 747 uint8_t *buf; 748 uint16_t len; 749 int value, index, l, totlen; 750 usbd_status err = USBD_IOERROR; 751 752 if (sc->sc_dying) 753 return USBD_IOERROR; 754 755 req = &xfer->request; 756 757 DPRINTFN(4, "type=0x%02x request=%02x\n", 758 req->bmRequestType, req->bRequest); 759 760 len = UGETW(req->wLength); 761 value = UGETW(req->wValue); 762 index = UGETW(req->wIndex); 763 764 buf = len ? KERNADDR(&xfer->dmabuf, 0) : NULL; 765 766 totlen = 0; 767 768 #define C(x,y) ((x) | ((y) << 8)) 769 switch (C(req->bRequest, req->bmRequestType)) { 770 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 771 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 772 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 773 /* 774 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 775 * for the integrated root hub. 776 */ 777 break; 778 case C(UR_GET_CONFIG, UT_READ_DEVICE): 779 if (len > 0) { 780 *buf = sc->sc_conf; 781 totlen = 1; 782 } 783 break; 784 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 785 DPRINTFN(8, "wValue=0x%04x\n", value); 786 787 if (len == 0) 788 break; 789 switch (value) { 790 case C(0, UDESC_DEVICE): 791 l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 792 // USETW(dwc2_devd.idVendor, sc->sc_id_vendor); 793 memcpy(buf, &dwc2_devd, l); 794 buf += l; 795 len -= l; 796 totlen += l; 797 798 break; 799 case C(0, UDESC_CONFIG): 800 l = min(len, sizeof(dwc2_confd)); 801 memcpy(buf, &dwc2_confd, l); 802 buf += l; 803 len -= l; 804 totlen += l; 805 806 break; 807 #define sd ((usb_string_descriptor_t *)buf) 808 case C(0, UDESC_STRING): 809 totlen = usbd_str(sd, len, "\001"); 810 break; 811 case C(1, UDESC_STRING): 812 totlen = usbd_str(sd, len, sc->sc_vendor); 813 break; 814 case C(2, UDESC_STRING): 815 totlen = usbd_str(sd, len, "DWC2 root hub"); 816 break; 817 #undef sd 818 default: 819 goto fail; 820 } 821 break; 822 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 823 if (len > 0) { 824 *buf = 0; 825 totlen = 1; 826 } 827 break; 828 case C(UR_GET_STATUS, UT_READ_DEVICE): 829 if (len > 1) { 830 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 831 totlen = 2; 832 } 833 break; 834 case C(UR_GET_STATUS, UT_READ_INTERFACE): 835 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 836 if (len > 1) { 837 USETW(((usb_status_t *)buf)->wStatus, 0); 838 totlen = 2; 839 } 840 break; 841 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 842 DPRINTF("UR_SET_ADDRESS, UT_WRITE_DEVICE: addr %d\n", 843 value); 844 if (value >= USB_MAX_DEVICES) 845 goto fail; 846 847 sc->sc_addr = value; 848 break; 849 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 850 if (value != 0 && value != 1) 851 goto fail; 852 853 sc->sc_conf = value; 854 break; 855 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 856 break; 857 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 858 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 859 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 860 err = USBD_IOERROR; 861 goto fail; 862 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 863 break; 864 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 865 break; 866 default: 867 /* Hub requests - XXXNH len check? */ 868 err = dwc2_hcd_hub_control(sc->sc_hsotg, 869 C(req->bRequest, req->bmRequestType), value, index, 870 buf, len); 871 if (err) { 872 err = USBD_IOERROR; 873 goto fail; 874 } 875 totlen = len; 876 } 877 xfer->actlen = totlen; 878 err = USBD_NORMAL_COMPLETION; 879 880 fail: 881 mtx_enter(&sc->sc_lock); 882 xfer->status = err; 883 usb_transfer_complete(xfer); 884 mtx_leave(&sc->sc_lock); 885 886 return USBD_IN_PROGRESS; 887 } 888 889 STATIC void 890 dwc2_root_ctrl_abort(struct usbd_xfer *xfer) 891 { 892 DPRINTFN(10, "\n"); 893 894 /* Nothing to do, all transfers are synchronous. */ 895 } 896 897 STATIC void 898 dwc2_root_ctrl_close(struct usbd_pipe *pipe) 899 { 900 DPRINTFN(10, "\n"); 901 902 /* Nothing to do. */ 903 } 904 905 STATIC void 906 dwc2_root_ctrl_done(struct usbd_xfer *xfer) 907 { 908 DPRINTFN(10, "\n"); 909 910 /* Nothing to do. */ 911 } 912 913 STATIC usbd_status 914 dwc2_root_intr_transfer(struct usbd_xfer *xfer) 915 { 916 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 917 usbd_status err; 918 919 DPRINTF("\n"); 920 921 /* Insert last in queue. */ 922 mtx_enter(&sc->sc_lock); 923 err = usb_insert_transfer(xfer); 924 mtx_leave(&sc->sc_lock); 925 if (err) 926 return err; 927 928 /* Pipe isn't running, start first */ 929 return dwc2_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 930 } 931 932 STATIC usbd_status 933 dwc2_root_intr_start(struct usbd_xfer *xfer) 934 { 935 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 936 937 DPRINTF("\n"); 938 939 if (sc->sc_dying) 940 return USBD_IOERROR; 941 942 mtx_enter(&sc->sc_lock); 943 KASSERT(sc->sc_intrxfer == NULL); 944 sc->sc_intrxfer = xfer; 945 mtx_leave(&sc->sc_lock); 946 947 return USBD_IN_PROGRESS; 948 } 949 950 /* Abort a root interrupt request. */ 951 STATIC void 952 dwc2_root_intr_abort(struct usbd_xfer *xfer) 953 { 954 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 955 956 DPRINTF("xfer=%p\n", xfer); 957 958 KASSERT(mtx_owned(&sc->sc_lock)); 959 KASSERT(xfer->pipe->intrxfer == xfer); 960 961 sc->sc_intrxfer = NULL; 962 963 xfer->status = USBD_CANCELLED; 964 usb_transfer_complete(xfer); 965 } 966 967 STATIC void 968 dwc2_root_intr_close(struct usbd_pipe *pipe) 969 { 970 struct dwc2_softc *sc = DWC2_PIPE2SC(pipe); 971 972 DPRINTF("\n"); 973 974 KASSERT(mtx_owned(&sc->sc_lock)); 975 976 sc->sc_intrxfer = NULL; 977 } 978 979 STATIC void 980 dwc2_root_intr_done(struct usbd_xfer *xfer) 981 { 982 983 DPRINTF("\n"); 984 } 985 986 /***********************************************************************/ 987 988 STATIC usbd_status 989 dwc2_device_ctrl_transfer(struct usbd_xfer *xfer) 990 { 991 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 992 usbd_status err; 993 994 DPRINTF("\n"); 995 996 /* Insert last in queue. */ 997 mtx_enter(&sc->sc_lock); 998 err = usb_insert_transfer(xfer); 999 mtx_leave(&sc->sc_lock); 1000 if (err) 1001 return err; 1002 1003 /* Pipe isn't running, start first */ 1004 return dwc2_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1005 } 1006 1007 STATIC usbd_status 1008 dwc2_device_ctrl_start(struct usbd_xfer *xfer) 1009 { 1010 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1011 usbd_status err; 1012 1013 DPRINTF("\n"); 1014 1015 mtx_enter(&sc->sc_lock); 1016 xfer->status = USBD_IN_PROGRESS; 1017 err = dwc2_device_start(xfer); 1018 mtx_leave(&sc->sc_lock); 1019 1020 if (err) 1021 return err; 1022 1023 if (sc->sc_bus.use_polling) 1024 dwc2_waitintr(sc, xfer); 1025 1026 return USBD_IN_PROGRESS; 1027 } 1028 1029 STATIC void 1030 dwc2_device_ctrl_abort(struct usbd_xfer *xfer) 1031 { 1032 #ifdef DIAGNOSTIC 1033 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1034 #endif 1035 KASSERT(mtx_owned(&sc->sc_lock)); 1036 1037 DPRINTF("xfer=%p\n", xfer); 1038 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1039 } 1040 1041 STATIC void 1042 dwc2_device_ctrl_close(struct usbd_pipe *pipe) 1043 { 1044 1045 DPRINTF("pipe=%p\n", pipe); 1046 dwc2_close_pipe(pipe); 1047 } 1048 1049 STATIC void 1050 dwc2_device_ctrl_done(struct usbd_xfer *xfer) 1051 { 1052 1053 DPRINTF("xfer=%p\n", xfer); 1054 } 1055 1056 /***********************************************************************/ 1057 1058 STATIC usbd_status 1059 dwc2_device_bulk_transfer(struct usbd_xfer *xfer) 1060 { 1061 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1062 usbd_status err; 1063 1064 DPRINTF("xfer=%p\n", xfer); 1065 1066 /* Insert last in queue. */ 1067 mtx_enter(&sc->sc_lock); 1068 err = usb_insert_transfer(xfer); 1069 mtx_leave(&sc->sc_lock); 1070 if (err) 1071 return err; 1072 1073 /* Pipe isn't running, start first */ 1074 return dwc2_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1075 } 1076 1077 STATIC usbd_status 1078 dwc2_device_bulk_start(struct usbd_xfer *xfer) 1079 { 1080 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1081 usbd_status err; 1082 1083 DPRINTF("xfer=%p\n", xfer); 1084 mtx_enter(&sc->sc_lock); 1085 xfer->status = USBD_IN_PROGRESS; 1086 err = dwc2_device_start(xfer); 1087 mtx_leave(&sc->sc_lock); 1088 1089 return err; 1090 } 1091 1092 STATIC void 1093 dwc2_device_bulk_abort(struct usbd_xfer *xfer) 1094 { 1095 #ifdef DIAGNOSTIC 1096 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1097 #endif 1098 KASSERT(mtx_owned(&sc->sc_lock)); 1099 1100 DPRINTF("xfer=%p\n", xfer); 1101 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1102 } 1103 1104 STATIC void 1105 dwc2_device_bulk_close(struct usbd_pipe *pipe) 1106 { 1107 1108 DPRINTF("pipe=%p\n", pipe); 1109 1110 dwc2_close_pipe(pipe); 1111 } 1112 1113 STATIC void 1114 dwc2_device_bulk_done(struct usbd_xfer *xfer) 1115 { 1116 1117 DPRINTF("xfer=%p\n", xfer); 1118 } 1119 1120 /***********************************************************************/ 1121 1122 STATIC usbd_status 1123 dwc2_device_intr_transfer(struct usbd_xfer *xfer) 1124 { 1125 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1126 usbd_status err; 1127 1128 DPRINTF("xfer=%p\n", xfer); 1129 1130 /* Insert last in queue. */ 1131 mtx_enter(&sc->sc_lock); 1132 err = usb_insert_transfer(xfer); 1133 mtx_leave(&sc->sc_lock); 1134 if (err) 1135 return err; 1136 1137 /* Pipe isn't running, start first */ 1138 return dwc2_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1139 } 1140 1141 STATIC usbd_status 1142 dwc2_device_intr_start(struct usbd_xfer *xfer) 1143 { 1144 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer) 1145 struct dwc2_softc *sc = DWC2_DPIPE2SC(dpipe); 1146 usbd_status err; 1147 1148 mtx_enter(&sc->sc_lock); 1149 xfer->status = USBD_IN_PROGRESS; 1150 err = dwc2_device_start(xfer); 1151 mtx_leave(&sc->sc_lock); 1152 1153 if (err) 1154 return err; 1155 1156 if (sc->sc_bus.use_polling) 1157 dwc2_waitintr(sc, xfer); 1158 1159 return USBD_IN_PROGRESS; 1160 } 1161 1162 /* Abort a device interrupt request. */ 1163 STATIC void 1164 dwc2_device_intr_abort(struct usbd_xfer *xfer) 1165 { 1166 #ifdef DIAGNOSTIC 1167 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1168 #endif 1169 1170 KASSERT(mtx_owned(&sc->sc_lock)); 1171 KASSERT(xfer->pipe->intrxfer == xfer); 1172 1173 DPRINTF("xfer=%p\n", xfer); 1174 1175 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1176 } 1177 1178 STATIC void 1179 dwc2_device_intr_close(struct usbd_pipe *pipe) 1180 { 1181 1182 DPRINTF("pipe=%p\n", pipe); 1183 1184 dwc2_close_pipe(pipe); 1185 } 1186 1187 STATIC void 1188 dwc2_device_intr_done(struct usbd_xfer *xfer) 1189 { 1190 1191 DPRINTF("\n"); 1192 1193 if (xfer->pipe->repeat) { 1194 xfer->status = USBD_IN_PROGRESS; 1195 dwc2_device_start(xfer); 1196 } 1197 } 1198 1199 /***********************************************************************/ 1200 1201 usbd_status 1202 dwc2_device_isoc_transfer(struct usbd_xfer *xfer) 1203 { 1204 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1205 usbd_status err; 1206 1207 DPRINTF("xfer=%p\n", xfer); 1208 1209 /* Insert last in queue. */ 1210 mtx_enter(&sc->sc_lock); 1211 err = usb_insert_transfer(xfer); 1212 mtx_leave(&sc->sc_lock); 1213 if (err) 1214 return err; 1215 1216 /* Pipe isn't running, start first */ 1217 return dwc2_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 1218 } 1219 1220 usbd_status 1221 dwc2_device_isoc_start(struct usbd_xfer *xfer) 1222 { 1223 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1224 struct dwc2_softc *sc = DWC2_DPIPE2SC(dpipe); 1225 usbd_status err; 1226 1227 mtx_enter(&sc->sc_lock); 1228 xfer->status = USBD_IN_PROGRESS; 1229 err = dwc2_device_start(xfer); 1230 mtx_leave(&sc->sc_lock); 1231 1232 if (sc->sc_bus.use_polling) 1233 dwc2_waitintr(sc, xfer); 1234 1235 return err; 1236 } 1237 1238 void 1239 dwc2_device_isoc_abort(struct usbd_xfer *xfer) 1240 { 1241 #ifdef DIAGNOSTIC 1242 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1243 #endif 1244 KASSERT(mtx_owned(&sc->sc_lock)); 1245 1246 DPRINTF("xfer=%p\n", xfer); 1247 dwc2_abort_xfer(xfer, USBD_CANCELLED); 1248 } 1249 1250 void 1251 dwc2_device_isoc_close(struct usbd_pipe *pipe) 1252 { 1253 DPRINTF("\n"); 1254 1255 dwc2_close_pipe(pipe); 1256 } 1257 1258 void 1259 dwc2_device_isoc_done(struct usbd_xfer *xfer) 1260 { 1261 1262 DPRINTF("\n"); 1263 } 1264 1265 1266 usbd_status 1267 dwc2_device_start(struct usbd_xfer *xfer) 1268 { 1269 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 1270 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1271 struct dwc2_softc *sc = DWC2_XFER2SC(xfer); 1272 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1273 struct dwc2_hcd_urb *dwc2_urb; 1274 1275 struct usbd_device *dev = xfer->pipe->device; 1276 usb_endpoint_descriptor_t *ed = xfer->pipe->endpoint->edesc; 1277 uint8_t addr = dev->address; 1278 uint8_t xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1279 uint8_t epnum = UE_GET_ADDR(ed->bEndpointAddress); 1280 uint8_t dir = UE_GET_DIR(ed->bEndpointAddress); 1281 uint16_t mps = UE_GET_SIZE(UGETW(ed->wMaxPacketSize)); 1282 uint32_t len; 1283 1284 uint32_t flags = 0; 1285 uint32_t off = 0; 1286 int retval, err = USBD_IN_PROGRESS; 1287 int alloc_bandwidth = 0; 1288 int i; 1289 1290 DPRINTFN(1, "xfer=%p pipe=%p\n", xfer, xfer->pipe); 1291 1292 if (xfertype == UE_ISOCHRONOUS || 1293 xfertype == UE_INTERRUPT) { 1294 mtx_enter(&hsotg->lock); 1295 if (!dwc2_hcd_is_bandwidth_allocated(hsotg, xfer)) 1296 alloc_bandwidth = 1; 1297 mtx_leave(&hsotg->lock); 1298 } 1299 1300 /* 1301 * For Control pipe the direction is from the request, all other 1302 * transfers have been set correctly at pipe open time. 1303 */ 1304 if (xfertype == UE_CONTROL) { 1305 usb_device_request_t *req = &xfer->request; 1306 1307 DPRINTFN(3, "xfer=%p type=0x%02x request=0x%02x wValue=0x%04x " 1308 "wIndex=0x%04x len=%d addr=%d endpt=%d dir=%s speed=%d " 1309 "mps=%d\n", 1310 xfer, req->bmRequestType, req->bRequest, UGETW(req->wValue), 1311 UGETW(req->wIndex), UGETW(req->wLength), dev->address, 1312 epnum, dir == UT_READ ? "in" :"out", dev->speed, mps); 1313 1314 /* Copy request packet to our DMA buffer */ 1315 memcpy(KERNADDR(&dpipe->req_dma, 0), req, sizeof(*req)); 1316 usb_syncmem(&dpipe->req_dma, 0, sizeof(*req), 1317 BUS_DMASYNC_PREWRITE); 1318 len = UGETW(req->wLength); 1319 if ((req->bmRequestType & UT_READ) == UT_READ) { 1320 dir = UE_DIR_IN; 1321 } else { 1322 dir = UE_DIR_OUT; 1323 } 1324 1325 DPRINTFN(3, "req = %p dma = %llx len %d dir %s\n", 1326 KERNADDR(&dpipe->req_dma, 0), 1327 (long long)DMAADDR(&dpipe->req_dma, 0), 1328 len, dir == UE_DIR_IN ? "in" : "out"); 1329 } else { 1330 DPRINTFN(3, "xfer=%p len=%d flags=%d addr=%d endpt=%d," 1331 " mps=%d dir %s\n", xfer, xfer->length, xfer->flags, addr, 1332 epnum, mps, dir == UT_READ ? "in" :"out"); 1333 1334 len = xfer->length; 1335 } 1336 1337 dwc2_urb = dxfer->urb; 1338 if (!dwc2_urb) 1339 return USBD_NOMEM; 1340 1341 memset(dwc2_urb, 0, sizeof(*dwc2_urb) + 1342 sizeof(dwc2_urb->iso_descs[0]) * DWC2_MAXISOCPACKETS); 1343 1344 dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, addr, epnum, xfertype, dir, 1345 mps); 1346 1347 if (xfertype == UE_CONTROL) { 1348 dwc2_urb->setup_usbdma = &dpipe->req_dma; 1349 dwc2_urb->setup_packet = KERNADDR(&dpipe->req_dma, 0); 1350 dwc2_urb->setup_dma = DMAADDR(&dpipe->req_dma, 0); 1351 } else { 1352 /* XXXNH - % mps required? */ 1353 if ((xfer->flags & USBD_FORCE_SHORT_XFER) && (len % mps) == 0) 1354 flags |= URB_SEND_ZERO_PACKET; 1355 } 1356 flags |= URB_GIVEBACK_ASAP; 1357 1358 /* 1359 * control transfers with no data phase don't touch usbdma, but 1360 * everything else does. 1361 */ 1362 if (!(xfertype == UE_CONTROL && len == 0)) { 1363 dwc2_urb->usbdma = &xfer->dmabuf; 1364 dwc2_urb->buf = KERNADDR(dwc2_urb->usbdma, 0); 1365 dwc2_urb->dma = DMAADDR(dwc2_urb->usbdma, 0); 1366 } 1367 dwc2_urb->length = len; 1368 dwc2_urb->flags = flags; 1369 dwc2_urb->status = -EINPROGRESS; 1370 dwc2_urb->packet_count = xfer->nframes; 1371 1372 if (xfertype == UE_INTERRUPT || 1373 xfertype == UE_ISOCHRONOUS) { 1374 uint16_t ival; 1375 1376 if (xfertype == UE_INTERRUPT && 1377 dpipe->pipe.interval != USBD_DEFAULT_INTERVAL) { 1378 ival = dpipe->pipe.interval; 1379 } else { 1380 ival = ed->bInterval; 1381 } 1382 1383 if (ival < 1) { 1384 retval = -ENODEV; 1385 goto fail; 1386 } 1387 if (dev->speed == USB_SPEED_HIGH || 1388 (dev->speed == USB_SPEED_FULL && xfertype == UE_ISOCHRONOUS)) { 1389 if (ival > 16) { 1390 /* 1391 * illegal with HS/FS, but there were 1392 * documentation bugs in the spec 1393 */ 1394 ival = 256; 1395 } else { 1396 ival = (1 << (ival - 1)); 1397 } 1398 } else { 1399 if (xfertype == UE_INTERRUPT && ival < 10) 1400 ival = 10; 1401 } 1402 dwc2_urb->interval = ival; 1403 } 1404 1405 /* XXXNH bring down from callers?? */ 1406 // mtx_enter(&sc->sc_lock); 1407 1408 xfer->actlen = 0; 1409 1410 KASSERT(xfertype != UE_ISOCHRONOUS || 1411 xfer->nframes < DWC2_MAXISOCPACKETS); 1412 KASSERTMSG(xfer->nframes == 0 || xfertype == UE_ISOCHRONOUS, 1413 "nframes %d xfertype %d\n", xfer->nframes, xfertype); 1414 1415 for (off = i = 0; i < xfer->nframes; ++i) { 1416 DPRINTFN(3, "xfer=%p frame=%d offset=%d length=%d\n", xfer, i, 1417 off, xfer->frlengths[i]); 1418 1419 dwc2_hcd_urb_set_iso_desc_params(dwc2_urb, i, off, 1420 xfer->frlengths[i]); 1421 off += xfer->frlengths[i]; 1422 } 1423 1424 /* might need to check cpu_intr_p */ 1425 mtx_enter(&hsotg->lock); 1426 1427 if (xfer->timeout && !sc->sc_bus.use_polling) { 1428 timeout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 1429 dwc2_timeout, xfer); 1430 } 1431 1432 dwc2_urb->priv = xfer; 1433 retval = dwc2_hcd_urb_enqueue(hsotg, dwc2_urb, &dpipe->priv, 0); 1434 if (retval) 1435 goto fail; 1436 1437 if (alloc_bandwidth) { 1438 dwc2_allocate_bus_bandwidth(hsotg, 1439 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1440 xfer); 1441 } 1442 1443 fail: 1444 mtx_leave(&hsotg->lock); 1445 1446 // mtx_leave(&sc->sc_lock); 1447 1448 switch (retval) { 1449 case 0: 1450 break; 1451 case -ENODEV: 1452 err = USBD_INVAL; 1453 break; 1454 case -ENOMEM: 1455 err = USBD_NOMEM; 1456 break; 1457 default: 1458 err = USBD_IOERROR; 1459 } 1460 1461 return err; 1462 1463 } 1464 1465 void 1466 dwc2_worker(struct task *wk, void *priv) 1467 { 1468 struct dwc2_softc *sc = priv; 1469 struct dwc2_hsotg *hsotg = sc->sc_hsotg; 1470 1471 Debugger(); 1472 #if 0 1473 struct usbd_xfer *xfer = dwork->xfer; 1474 struct dwc2_xfer *dxfer = DWC2_XFER2DXFER(xfer); 1475 1476 dwc2_hcd_endpoint_disable(sc->dwc_dev.hcd, dpipe->priv, 250); 1477 dwc_free(NULL, dpipe->urb); 1478 #endif 1479 1480 mtx_enter(&sc->sc_lock); 1481 if (wk == &hsotg->wf_otg) { 1482 dwc2_conn_id_status_change(wk); 1483 } else if (wk == &hsotg->start_work.work) { 1484 dwc2_hcd_start_func(wk); 1485 } else if (wk == &hsotg->reset_work.work) { 1486 dwc2_hcd_reset_func(wk); 1487 } else { 1488 #if 0 1489 KASSERT(dwork->xfer != NULL); 1490 KASSERT(dxfer->queued == true); 1491 1492 if (!(dxfer->flags & DWC2_XFER_ABORTING)) { 1493 dwc2_start_standard_chain(xfer); 1494 } 1495 dxfer->queued = false; 1496 wakeup(&dxfer->flags); 1497 #endif 1498 } 1499 mtx_leave(&sc->sc_lock); 1500 } 1501 1502 int dwc2_intr(void *p) 1503 { 1504 struct dwc2_softc *sc = p; 1505 struct dwc2_hsotg *hsotg; 1506 int ret = 0; 1507 1508 if (sc == NULL) 1509 return 0; 1510 1511 hsotg = sc->sc_hsotg; 1512 mtx_enter(&hsotg->lock); 1513 1514 if (sc->sc_dying) 1515 goto done; 1516 1517 if (sc->sc_bus.use_polling) { 1518 uint32_t intrs; 1519 1520 intrs = dwc2_read_core_intr(hsotg); 1521 DWC2_WRITE_4(hsotg, GINTSTS, intrs); 1522 } else { 1523 ret = dwc2_interrupt(sc); 1524 } 1525 1526 done: 1527 mtx_leave(&hsotg->lock); 1528 1529 return ret; 1530 } 1531 1532 int 1533 dwc2_interrupt(struct dwc2_softc *sc) 1534 { 1535 int ret = 0; 1536 1537 if (sc->sc_hcdenabled) { 1538 ret |= dwc2_handle_hcd_intr(sc->sc_hsotg); 1539 } 1540 1541 ret |= dwc2_handle_common_intr(sc->sc_hsotg); 1542 1543 return ret; 1544 } 1545 1546 /***********************************************************************/ 1547 1548 int 1549 dwc2_detach(struct dwc2_softc *sc, int flags) 1550 { 1551 int rv = 0; 1552 1553 if (sc->sc_child != NULL) 1554 rv = config_detach(sc->sc_child, flags); 1555 1556 return rv; 1557 } 1558 1559 bool 1560 dwc2_shutdown(struct device *self, int flags) 1561 { 1562 struct dwc2_softc *sc = (void *)self; 1563 1564 sc = sc; 1565 1566 return true; 1567 } 1568 1569 void 1570 dwc2_childdet(struct device *self, struct device *child) 1571 { 1572 struct dwc2_softc *sc = (void *)self; 1573 1574 sc = sc; 1575 } 1576 1577 int 1578 dwc2_activate(struct device *self, int act) 1579 { 1580 struct dwc2_softc *sc = (void *)self; 1581 1582 sc = sc; 1583 1584 return 0; 1585 } 1586 1587 #if 0 1588 bool 1589 dwc2_resume(struct device *dv, const pmf_qual_t *qual) 1590 { 1591 struct dwc2_softc *sc = (void *)dv; 1592 1593 sc = sc; 1594 1595 return true; 1596 } 1597 1598 bool 1599 dwc2_suspend(struct device *dv, const pmf_qual_t *qual) 1600 { 1601 struct dwc2_softc *sc = (void *)dv; 1602 1603 sc = sc; 1604 1605 return true; 1606 } 1607 #endif 1608 1609 /***********************************************************************/ 1610 int 1611 dwc2_init(struct dwc2_softc *sc) 1612 { 1613 int err = 0; 1614 1615 sc->sc_bus.usbrev = USBREV_2_0; 1616 sc->sc_bus.methods = &dwc2_bus_methods; 1617 sc->sc_bus.pipe_size = sizeof(struct dwc2_pipe); 1618 sc->sc_hcdenabled = false; 1619 1620 mtx_init(&sc->sc_lock, IPL_SOFTUSB); 1621 1622 TAILQ_INIT(&sc->sc_complete); 1623 1624 sc->sc_rhc_si = softintr_establish(IPL_SOFTUSB, dwc2_rhc, sc); 1625 1626 #if 0 1627 usb_setup_reserve(&sc->sc_bus, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 1628 USB_MEM_RESERVE); 1629 #endif 1630 1631 pool_init(&sc->sc_xferpool, sizeof(struct dwc2_xfer), 0, 0, 0, 1632 "dwc2xfer", NULL); 1633 pool_setipl(&sc->sc_xferpool, IPL_USB); 1634 pool_init(&sc->sc_qhpool, sizeof(struct dwc2_qh), 0, 0, 0, 1635 "dwc2qh", NULL); 1636 pool_setipl(&sc->sc_qhpool, IPL_USB); 1637 pool_init(&sc->sc_qtdpool, sizeof(struct dwc2_qtd), 0, 0, 0, 1638 "dwc2qtd", NULL); 1639 pool_setipl(&sc->sc_qtdpool, IPL_USB); 1640 1641 sc->sc_hsotg = malloc(sizeof(struct dwc2_hsotg), M_DEVBUF, 1642 M_ZERO | M_WAITOK); 1643 if (sc->sc_hsotg == NULL) { 1644 err = ENOMEM; 1645 goto fail1; 1646 } 1647 1648 sc->sc_hsotg->hsotg_sc = sc; 1649 sc->sc_hsotg->dev = &sc->sc_bus.bdev; 1650 sc->sc_hcdenabled = true; 1651 1652 err = dwc2_hcd_init(sc->sc_hsotg, sc->sc_params); 1653 if (err) { 1654 err = -err; 1655 goto fail2; 1656 } 1657 1658 return 0; 1659 1660 fail2: 1661 free(sc->sc_hsotg, M_DEVBUF, sizeof(struct dwc2_hsotg)); 1662 fail1: 1663 softintr_disestablish(sc->sc_rhc_si); 1664 1665 return err; 1666 } 1667 1668 int 1669 dwc2_dma_config(struct dwc2_softc *sc, struct dwc2_core_dma_config *config) 1670 { 1671 sc->sc_dma_config = config; 1672 return dwc2_hcd_dma_config(sc->sc_hsotg, sc->sc_dma_config); 1673 } 1674 1675 #if 0 1676 /* 1677 * curmode is a mode indication bit 0 = device, 1 = host 1678 */ 1679 STATIC const char * const intnames[32] = { 1680 "curmode", "modemis", "otgint", "sof", 1681 "rxflvl", "nptxfemp", "ginnakeff", "goutnakeff", 1682 "ulpickint", "i2cint", "erlysusp", "usbsusp", 1683 "usbrst", "enumdone", "isooutdrop", "eopf", 1684 "restore_done", "epmis", "iepint", "oepint", 1685 "incompisoin", "incomplp", "fetsusp", "resetdet", 1686 "prtint", "hchint", "ptxfemp", "lpm", 1687 "conidstschng", "disconnint", "sessreqint", "wkupint" 1688 }; 1689 1690 1691 /***********************************************************************/ 1692 1693 #endif 1694 1695 1696 void 1697 dw_timeout(void *arg) 1698 { 1699 struct delayed_work *dw = arg; 1700 1701 task_set(&dw->work, dw->dw_fn, arg); 1702 task_add(dw->dw_wq, &dw->work); 1703 } 1704 1705 void dwc2_host_hub_info(struct dwc2_hsotg *hsotg, void *context, int *hub_addr, 1706 int *hub_port) 1707 { 1708 struct usbd_xfer *xfer = context; 1709 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1710 struct usbd_device *dev = dpipe->pipe.device; 1711 1712 if (dev->myhsport != NULL) { 1713 *hub_addr = dev->myhsport->parent->address; 1714 *hub_port = dev->myhsport->portno; 1715 } 1716 } 1717 1718 int dwc2_host_get_speed(struct dwc2_hsotg *hsotg, void *context) 1719 { 1720 struct usbd_xfer *xfer = context; 1721 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1722 struct usbd_device *dev = dpipe->pipe.device; 1723 1724 return dev->speed; 1725 } 1726 1727 /* 1728 * Sets the final status of an URB and returns it to the upper layer. Any 1729 * required cleanup of the URB is performed. 1730 * 1731 * Must be called with interrupt disabled and spinlock held 1732 */ 1733 void dwc2_host_complete(struct dwc2_hsotg *hsotg, struct dwc2_qtd *qtd, 1734 int status) 1735 { 1736 struct usbd_xfer *xfer; 1737 struct dwc2_xfer *dxfer; 1738 struct dwc2_softc *sc; 1739 usb_endpoint_descriptor_t *ed; 1740 uint8_t xfertype; 1741 1742 if (!qtd) { 1743 dev_dbg(hsotg->dev, "## %s: qtd is NULL ##\n", __func__); 1744 return; 1745 } 1746 1747 if (!qtd->urb) { 1748 dev_dbg(hsotg->dev, "## %s: qtd->urb is NULL ##\n", __func__); 1749 return; 1750 } 1751 1752 xfer = qtd->urb->priv; 1753 if (!xfer) { 1754 dev_dbg(hsotg->dev, "## %s: urb->priv is NULL ##\n", __func__); 1755 return; 1756 } 1757 1758 dxfer = DWC2_XFER2DXFER(xfer); 1759 sc = DWC2_XFER2SC(xfer); 1760 ed = xfer->pipe->endpoint->edesc; 1761 xfertype = UE_GET_XFERTYPE(ed->bmAttributes); 1762 1763 xfer->actlen = dwc2_hcd_urb_get_actual_length(qtd->urb); 1764 1765 DPRINTFN(3, "xfer=%p actlen=%d\n", xfer, xfer->actlen); 1766 1767 if (xfertype == UE_ISOCHRONOUS && dbg_perio()) { 1768 int i; 1769 1770 for (i = 0; i < xfer->nframes; i++) 1771 dev_vdbg(hsotg->dev, " ISO Desc %d status %d\n", 1772 i, qtd->urb->iso_descs[i].status); 1773 } 1774 1775 if (xfertype == UE_ISOCHRONOUS) { 1776 int i; 1777 1778 xfer->actlen = 0; 1779 for (i = 0; i < xfer->nframes; ++i) { 1780 xfer->frlengths[i] = 1781 dwc2_hcd_urb_get_iso_desc_actual_length( 1782 qtd->urb, i); 1783 xfer->actlen += xfer->frlengths[i]; 1784 } 1785 } 1786 1787 if (!status) { 1788 if (!(xfer->flags & USBD_SHORT_XFER_OK) && 1789 xfer->actlen < xfer->length) 1790 status = -EIO; 1791 } 1792 1793 switch (status) { 1794 case 0: 1795 xfer->status = USBD_NORMAL_COMPLETION; 1796 break; 1797 case -EPIPE: 1798 xfer->status = USBD_STALLED; 1799 break; 1800 case -ETIMEDOUT: 1801 xfer->status = USBD_TIMEOUT; 1802 break; 1803 case -EPROTO: 1804 xfer->status = USBD_INVAL; 1805 break; 1806 case -EIO: 1807 xfer->status = USBD_IOERROR; 1808 break; 1809 case -EOVERFLOW: 1810 xfer->status = USBD_IOERROR; 1811 break; 1812 default: 1813 printf("%s: unknown error status %d\n", __func__, status); 1814 } 1815 1816 if (xfertype == UE_ISOCHRONOUS || 1817 xfertype == UE_INTERRUPT) { 1818 struct dwc2_pipe *dpipe = DWC2_XFER2DPIPE(xfer); 1819 1820 dwc2_free_bus_bandwidth(hsotg, 1821 dwc2_hcd_get_ep_bandwidth(hsotg, dpipe), 1822 xfer); 1823 } 1824 1825 qtd->urb = NULL; 1826 timeout_del(&xfer->timeout_handle); 1827 1828 KASSERT(mtx_owned(&hsotg->lock)); 1829 1830 TAILQ_INSERT_TAIL(&sc->sc_complete, dxfer, xnext); 1831 1832 mtx_leave(&hsotg->lock); 1833 usb_schedsoftintr(&sc->sc_bus); 1834 mtx_enter(&hsotg->lock); 1835 } 1836 1837 1838 int 1839 _dwc2_hcd_start(struct dwc2_hsotg *hsotg) 1840 { 1841 dev_dbg(hsotg->dev, "DWC OTG HCD START\n"); 1842 1843 mtx_enter(&hsotg->lock); 1844 1845 hsotg->op_state = OTG_STATE_A_HOST; 1846 1847 dwc2_hcd_reinit(hsotg); 1848 1849 /* Try to enable port. */ 1850 dwc2_handle_hcd_intr(hsotg); 1851 1852 /*XXXNH*/ 1853 delay(50); 1854 1855 mtx_leave(&hsotg->lock); 1856 return 0; 1857 } 1858 1859 int dwc2_host_is_b_hnp_enabled(struct dwc2_hsotg *hsotg) 1860 { 1861 1862 return false; 1863 } 1864