xref: /openbsd/sys/dev/usb/ehcivar.h (revision 404b540a)
1 /*	$OpenBSD: ehcivar.h,v 1.18 2009/10/13 19:33:17 pirofti Exp $ */
2 /*	$NetBSD: ehcivar.h,v 1.19 2005/04/29 15:04:29 augustss Exp $	*/
3 
4 /*
5  * Copyright (c) 2001 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Lennart Augustsson (lennart@augustsson.net).
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 typedef struct ehci_soft_qtd {
34 	ehci_qtd_t qtd;
35 	struct ehci_soft_qtd *nextqtd; /* mirrors nextqtd in TD */
36 	ehci_physaddr_t physaddr;
37 	usbd_xfer_handle xfer;
38 	LIST_ENTRY(ehci_soft_qtd) hnext;
39 	u_int16_t len;
40 } ehci_soft_qtd_t;
41 #define EHCI_SQTD_SIZE ((sizeof (struct ehci_soft_qtd) + EHCI_QTD_ALIGN - 1) / EHCI_QTD_ALIGN * EHCI_QTD_ALIGN)
42 #define EHCI_SQTD_CHUNK (EHCI_PAGE_SIZE / EHCI_SQTD_SIZE)
43 
44 typedef struct ehci_soft_qh {
45 	ehci_qh_t qh;
46 	struct ehci_soft_qh *next;
47 	struct ehci_soft_qh *prev;
48 	struct ehci_soft_qtd *sqtd;
49 	ehci_physaddr_t physaddr;
50 	int islot;
51 } ehci_soft_qh_t;
52 #define EHCI_SQH_SIZE ((sizeof (struct ehci_soft_qh) + EHCI_QH_ALIGN - 1) / EHCI_QH_ALIGN * EHCI_QH_ALIGN)
53 #define EHCI_SQH_CHUNK (EHCI_PAGE_SIZE / EHCI_SQH_SIZE)
54 
55 typedef struct ehci_soft_itd {
56 	ehci_itd_t itd;
57 	union {
58 		struct {
59 			/* soft_itds links in a periodic frame*/
60 			struct ehci_soft_itd *next;
61 			struct ehci_soft_itd *prev;
62 		} frame_list;
63 		/* circular list of free itds */
64 		LIST_ENTRY(ehci_soft_itd) free_list;
65 	} u;
66 	struct ehci_soft_itd *xfer_next; /* Next soft_itd in xfer */
67 	ehci_physaddr_t physaddr;
68 	usb_dma_t dma;
69 	int offs;
70 	int slot;
71 	struct timeval t; /* store free time */
72 } ehci_soft_itd_t;
73 #define EHCI_ITD_SIZE ((sizeof(struct ehci_soft_itd) + EHCI_QH_ALIGN - 1) / EHCI_ITD_ALIGN * EHCI_ITD_ALIGN)
74 #define EHCI_ITD_CHUNK (EHCI_PAGE_SIZE / EHCI_ITD_SIZE)
75 
76 struct ehci_xfer {
77 	struct usbd_xfer xfer;
78 	struct usb_task	abort_task;
79 	TAILQ_ENTRY(ehci_xfer) inext; /* list of active xfers */
80 	ehci_soft_qtd_t *sqtdstart;
81 	ehci_soft_qtd_t *sqtdend;
82 	ehci_soft_itd_t *itdstart;
83 	ehci_soft_itd_t *itdend;
84 	u_int isoc_len;
85 	u_int32_t ehci_xfer_flags;
86 #ifdef DIAGNOSTIC
87 	int isdone;
88 #endif
89 };
90 #define EHCI_XFER_ABORTING	0x0001	/* xfer is aborting. */
91 #define EHCI_XFER_ABORTWAIT	0x0002	/* abort completion is being awaited. */
92 
93 #define EXFER(xfer) ((struct ehci_xfer *)(xfer))
94 
95 /* Information about an entry in the interrupt list. */
96 struct ehci_soft_islot {
97 	ehci_soft_qh_t *sqh;	/* Queue Head. */
98 };
99 
100 #define EHCI_FRAMELIST_MAXCOUNT	1024
101 #define EHCI_IPOLLRATES		8 /* Poll rates (1ms, 2, 4, 8 .. 128) */
102 #define EHCI_INTRQHS		((1 << EHCI_IPOLLRATES) - 1)
103 #define EHCI_IQHIDX(lev, pos) \
104 	((((pos) & ((1 << (lev)) - 1)) | (1 << (lev))) - 1)
105 #define EHCI_ILEV_IVAL(lev)	(1 << (lev))
106 
107 
108 #define EHCI_HASH_SIZE 128
109 #define EHCI_COMPANION_MAX 8
110 
111 #define EHCI_FREE_LIST_INTERVAL 100
112 
113 typedef struct ehci_softc {
114 	struct usbd_bus sc_bus;		/* base device */
115 	bus_space_tag_t iot;
116 	bus_space_handle_t ioh;
117 	bus_size_t sc_size;
118 	u_int sc_offs;			/* offset to operational regs */
119 	int sc_flags;			/* misc flags */
120 #define EHCIF_DROPPED_INTR_WORKAROUND	0x01
121 
122 	char sc_vendor[16];		/* vendor string for root hub */
123 	int sc_id_vendor;		/* vendor ID for root hub */
124 
125 	u_int32_t sc_cmd;		/* shadow of cmd reg during suspend */
126 	void *sc_powerhook;		/* cookie from power hook */
127 	void *sc_shutdownhook;		/* cookie from shutdown hook */
128 
129 	usb_dma_t sc_fldma;
130 	ehci_link_t *sc_flist;
131 	u_int sc_flsize;
132 	u_int sc_rand;			/* XXX need proper intr scheduling */
133 
134 	struct ehci_soft_islot sc_islots[EHCI_INTRQHS];
135 
136 	/* jcmm - an array matching sc_flist, but with software pointers,
137 	 * not hardware address pointers
138 	 */
139 	struct ehci_soft_itd **sc_softitds;
140 
141 	TAILQ_HEAD(, ehci_xfer) sc_intrhead;
142 
143 	ehci_soft_qh_t *sc_freeqhs;
144 	ehci_soft_qtd_t *sc_freeqtds;
145 	LIST_HEAD(sc_freeitds, ehci_soft_itd) sc_freeitds;
146 
147 	int sc_noport;
148 	u_int8_t sc_addr;		/* device address */
149 	u_int8_t sc_conf;		/* device configuration */
150 	usbd_xfer_handle sc_intrxfer;
151 	char sc_isreset;
152 	char sc_softwake;
153 
154 	u_int32_t sc_eintrs;
155 	ehci_soft_qh_t *sc_async_head;
156 
157 	SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */
158 
159 	struct rwlock sc_doorbell_lock;
160 
161 	struct timeout sc_tmo_intrlist;
162 
163 	struct device *sc_child;		/* /dev/usb# device */
164 
165 	char sc_dying;
166 } ehci_softc_t;
167 
168 #define EREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (a))
169 #define EREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (a))
170 #define EREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (a))
171 #define EWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (a), (x))
172 #define EWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (a), (x))
173 #define EWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (a), (x))
174 #define EOREAD1(sc, a) bus_space_read_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
175 #define EOREAD2(sc, a) bus_space_read_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
176 #define EOREAD4(sc, a) bus_space_read_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a))
177 #define EOWRITE1(sc, a, x) bus_space_write_1((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
178 #define EOWRITE2(sc, a, x) bus_space_write_2((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
179 #define EOWRITE4(sc, a, x) bus_space_write_4((sc)->iot, (sc)->ioh, (sc)->sc_offs+(a), (x))
180 
181 usbd_status	ehci_init(ehci_softc_t *);
182 int		ehci_intr(void *);
183 int		ehci_detach(ehci_softc_t *, int);
184 int		ehci_activate(struct device *, int);
185 void		ehci_shutdown(void *);
186