xref: /openbsd/sys/dev/usb/if_axenreg.h (revision 9060cf22)
1*9060cf22Skevlo /*	$OpenBSD: if_axenreg.h,v 1.8 2024/10/07 07:35:40 kevlo Exp $	*/
2b5ab0bc5Syuo 
3b5ab0bc5Syuo /*
4b5ab0bc5Syuo  * Copyright (c) 2013 Yojiro UO <yuo@openbsd.org>. All right reserved.
5b5ab0bc5Syuo  *
6b5ab0bc5Syuo  */
7b5ab0bc5Syuo 
8b5ab0bc5Syuo /*
9b5ab0bc5Syuo  * Definitions for the ASIX Electronics AX88179 to ethernet controller.
10b5ab0bc5Syuo  */
11b5ab0bc5Syuo 
12b5ab0bc5Syuo #define AXEN_PHY_ID		0x0003
13b5ab0bc5Syuo #define AXEN_MCAST_FILTER_SIZE	8
14b5ab0bc5Syuo /* unit: KB */
15b5ab0bc5Syuo #define AXEN_BUFSZ_LS		8
16b5ab0bc5Syuo #define AXEN_BUFSZ_HS		16
17b5ab0bc5Syuo #define AXEN_BUFSZ_SS		24
18b5ab0bc5Syuo 
19b5ab0bc5Syuo #define AXEN_REV_UA1		0
20b5ab0bc5Syuo #define AXEN_REV_UA2		1
21b5ab0bc5Syuo 
22842d3fbeSbluhm /* receive header */
23b5ab0bc5Syuo /*
24b5ab0bc5Syuo  *                     +-multicast/broadcast
25b5ab0bc5Syuo  *                     |    +-rx_ok
26b5ab0bc5Syuo  *                     |    |     ++-----L3_type (1:ipv4, 0/2:ipv6)
27b5ab0bc5Syuo  *        pkt_len(13)  |    |     ||+ ++-L4_type(0: icmp, 1: UDP, 4: TCP)
28b5ab0bc5Syuo  * |765|43210 76543210|7654 3210 7654 3210|
2929ef1ec3Syuo  *  ||+-crc_err              |+-L4_err |+-L4_CSUM_ERR
3029ef1ec3Syuo  *  |+-mii_err               +--L3_err +--L3_CSUM_ERR
3129ef1ec3Syuo  *  +-drop_err
32b5ab0bc5Syuo  *
33b5ab0bc5Syuo  * ex) pkt_hdr 0x00680820
34b5ab0bc5Syuo  *      drop_err, crc_err: none
35b5ab0bc5Syuo  *      pkt_length = 104 byte
36b5ab0bc5Syuo  *      0x0820 = 0000 1000 0010 0000  => ipv4 icmp
37b5ab0bc5Syuo  *
38b5ab0bc5Syuo  * ex) pkt_hdr 0x004c8800
39b5ab0bc5Syuo  *      drop_err, crc_err: none
40b5ab0bc5Syuo  *      pkt_length = 76 byte
41b5ab0bc5Syuo  *      0x8800 = 1000 1000 0000 0000 => ipv6 mcast icmp
42b5ab0bc5Syuo  *
43b5ab0bc5Syuo  *  [memo]
44b5ab0bc5Syuo  *  0x0820: ipv4 icmp			0000 1000 0010 0000
45b5ab0bc5Syuo  *  0x8820: ipv4 icmp (broadcast)	1000 1000 0010 0000
46b5ab0bc5Syuo  *  0x0824: ipv4 udp (nping)		0000 1000 0010 0100
47b5ab0bc5Syuo  *  0x0830: ipv4 tcp (ssh)		0000 1000 0011 0000
48b5ab0bc5Syuo  *
49b5ab0bc5Syuo  *  0x0800: ipv6 icmp			0000 1000 0000 0000
50b5ab0bc5Syuo  *  0x8800: ipv6 icmp (multicast)	1000 1000 0000 0000
51b5ab0bc5Syuo  *  0x8844: ipv6 UDP/MDNS mcast		1000 1000 0100 0100
52b5ab0bc5Syuo  *  0x0850: ipv6 tcp (ssh)		0000 1000 0101 0000
53b5ab0bc5Syuo  */
54b5ab0bc5Syuo 
5529ef1ec3Syuo #define	AXEN_RXHDR_DROP_ERR	(1U << 31)
5629ef1ec3Syuo #define AXEN_RXHDR_MII_ERR	(1U << 30)
5729ef1ec3Syuo #define	AXEN_RXHDR_CRC_ERR	(1U << 29)
5861e87b28Sderaadt #define AXEN_RXHDR_MCAST	(1U << 15)
5961e87b28Sderaadt #define AXEN_RXHDR_RX_OK	(1U << 11)
6061e87b28Sderaadt #define	AXEN_RXHDR_L3_ERR	(1U << 9)
6161e87b28Sderaadt #define	AXEN_RXHDR_L4_ERR	(1U << 8)
6261e87b28Sderaadt #define AXEN_RXHDR_L3CSUM_ERR 	(1U << 1)
6361e87b28Sderaadt #define AXEN_RXHDR_L4CSUM_ERR	(1U << 0)
64b5ab0bc5Syuo 
65b5ab0bc5Syuo /* L4 packet type (3bit) */
66b5ab0bc5Syuo #define AXEN_RXHDR_L4_TYPE_MASK	0x0000001c
67b5ab0bc5Syuo #define AXEN_RXHDR_L4_TYPE_OFFSET	2
68b5ab0bc5Syuo #define   AXEN_RXHDR_L4_TYPE_ICMP	0x0
69b5ab0bc5Syuo #define   AXEN_RXHDR_L4_TYPE_UDP	0x1
70b5ab0bc5Syuo #define   AXEN_RXHDR_L4_TYPE_TCP	0x4
71b5ab0bc5Syuo 
72b5ab0bc5Syuo /* L3 packet type (2bit) */
73b5ab0bc5Syuo #define AXEN_RXHDR_L3_TYPE_MASK	0x00000600
74b5ab0bc5Syuo #define AXEN_RXHDR_L3_TYPE_OFFSET	5
75b5ab0bc5Syuo #define   AXEN_RXHDR_L3_TYPE_UNDEF	0x0
76b5ab0bc5Syuo #define   AXEN_RXHDR_L3_TYPE_IPV4	0x1
77b5ab0bc5Syuo #define   AXEN_RXHDR_L3_TYPE_IPV6	0x2
78b5ab0bc5Syuo 
79b5ab0bc5Syuo /*
80b5ab0bc5Syuo  * commands
81b5ab0bc5Syuo  */
82b5ab0bc5Syuo #define AXEN_CMD_LEN(x)	(((x) & 0xF000) >> 12)
83b5ab0bc5Syuo #define AXEN_CMD_DIR(x)	(((x) & 0x0F00) >> 8)
84b5ab0bc5Syuo #define AXEN_CMD_CMD(x)	 ((x) & 0x00FF)
85b5ab0bc5Syuo 
86b5ab0bc5Syuo /* ---MAC--- */
87b5ab0bc5Syuo /*   1byte cmd   */
88b5ab0bc5Syuo #define AXEN_CMD_MAC_READ			0x1001
89b5ab0bc5Syuo #define AXEN_CMD_MAC_WRITE			0x1101
90b5ab0bc5Syuo 
91b5ab0bc5Syuo #define   AXEN_USB_UPLINK			0x02
92b5ab0bc5Syuo #define     AXEN_USB_FS				  0x01
93b5ab0bc5Syuo #define     AXEN_USB_HS				  0x02
94b5ab0bc5Syuo #define     AXEN_USB_SS				  0x04
95b5ab0bc5Syuo #define   AXEN_GENERAL_STATUS			0x03
96b5ab0bc5Syuo #define     AXEN_GENERAL_STATUS_MASK		  0x4
97b5ab0bc5Syuo #define     AXEN_REV0				  0x0
98b5ab0bc5Syuo #define     AXEN_REV1				  0x4
99b5ab0bc5Syuo #define   AXEN_UNK_05				0x05
100b5ab0bc5Syuo #define   AXEN_MAC_EEPROM_ADDR			0x07
101b5ab0bc5Syuo #define   AXEN_MAC_EEPROM_READ			0x08
102b5ab0bc5Syuo #define   AXEN_MAC_EEPROM_CMD			0x0a
103b5ab0bc5Syuo #define     AXEN_EEPROM_READ			  0x04
104b5ab0bc5Syuo #define     AXEN_EEPROM_WRITE			  0x08
105b5ab0bc5Syuo #define     AXEN_EEPROM_BUSY			  0x10
106b5ab0bc5Syuo #define   AXEN_MONITOR_MODE			0x24
107b5ab0bc5Syuo #define     AXEN_MONITOR_NONE			  0x00
108b5ab0bc5Syuo #define     AXEN_MONITOR_RWLC			  0x02
109b5ab0bc5Syuo #define     AXEN_MONITOR_RWMP			  0x04
110b5ab0bc5Syuo #define     AXEN_MONITOR_RWWF			  0x08
111b5ab0bc5Syuo #define     AXEN_MONITOR_RW_FLAG		  0x10
112b5ab0bc5Syuo #define     AXEN_MONITOR_PMEPOL			  0x20
113b5ab0bc5Syuo #define     AXEN_MONITOR_PMETYPE		  0x40
114b5ab0bc5Syuo #define   AXEN_UNK_28				0x28
115b5ab0bc5Syuo #define   AXEN_PHYCLK				0x33
116b5ab0bc5Syuo #define     AXEN_PHYCLK_BCS			  0x01
117b5ab0bc5Syuo #define     AXEN_PHYCLK_ACS			  0x02
118b5ab0bc5Syuo #define     AXEN_PHYCLK_ULR			  0x08
119b5ab0bc5Syuo #define     AXEN_PHYCLK_ACSREQ			  0x10
120b5ab0bc5Syuo #define   AXEN_RX_COE				0x34
121b5ab0bc5Syuo #define	    AXEN_RXCOE_OFF			  0x00
122b5ab0bc5Syuo #define	    AXEN_RXCOE_IPv4			  0x01
123b5ab0bc5Syuo #define	    AXEN_RXCOE_TCPv4			  0x02
124b5ab0bc5Syuo #define	    AXEN_RXCOE_UDPv4			  0x04
125b5ab0bc5Syuo #define	    AXEN_RXCOE_ICMP			  0x08
126b5ab0bc5Syuo #define	    AXEN_RXCOE_IGMP			  0x10
127b5ab0bc5Syuo #define	    AXEN_RXCOE_TCPv6			  0x20
128b5ab0bc5Syuo #define	    AXEN_RXCOE_UDPv6			  0x40
129b5ab0bc5Syuo #define	    AXEN_RXCOE_ICMPv6			  0x80
130b5ab0bc5Syuo #define   AXEN_TX_COE				0x35
131b5ab0bc5Syuo #define	    AXEN_TXCOE_OFF			  0x00
132b5ab0bc5Syuo #define	    AXEN_TXCOE_IPv4			  0x01
133b5ab0bc5Syuo #define	    AXEN_TXCOE_TCPv4			  0x02
134b5ab0bc5Syuo #define	    AXEN_TXCOE_UDPv4			  0x04
135b5ab0bc5Syuo #define	    AXEN_TXCOE_ICMP			  0x08
136b5ab0bc5Syuo #define	    AXEN_TXCOE_IGMP			  0x10
137b5ab0bc5Syuo #define	    AXEN_TXCOE_TCPv6			  0x20
138b5ab0bc5Syuo #define	    AXEN_TXCOE_UDPv6			  0x40
139b5ab0bc5Syuo #define	    AXEN_TXCOE_ICMPv6			  0x80
140b5ab0bc5Syuo #define   AXEN_PAUSE_HIGH_WATERMARK		0x54
141b5ab0bc5Syuo #define   AXEN_PAUSE_LOW_WATERMARK		0x55
142b5ab0bc5Syuo 
143b5ab0bc5Syuo 
144b5ab0bc5Syuo /*   2byte cmd   */
145b5ab0bc5Syuo #define AXEN_CMD_MAC_READ2			0x2001
146b5ab0bc5Syuo #define AXEN_CMD_MAC_WRITE2			0x2101
147b5ab0bc5Syuo 
148b5ab0bc5Syuo #define   AXEN_MAC_RXCTL			0x0b
149b5ab0bc5Syuo #define     AXEN_RXCTL_STOP			  0x0000
150b5ab0bc5Syuo #define     AXEN_RXCTL_PROMISC			  0x0001
151b5ab0bc5Syuo #define     AXEN_RXCTL_ACPT_ALL_MCAST		  0x0002
152b5ab0bc5Syuo #define     AXEN_RXCTL_HA8B			  0x0004
153b5ab0bc5Syuo #define     AXEN_RXCTL_AUTOB			  0x0008
154b5ab0bc5Syuo #define     AXEN_RXCTL_ACPT_BCAST		  0x0010
155b5ab0bc5Syuo #define     AXEN_RXCTL_ACPT_PHY_MCAST		  0x0020
156b5ab0bc5Syuo #define     AXEN_RXCTL_START			  0x0080
157b5ab0bc5Syuo #define     AXEN_RXCTL_DROPCRCERR		  0x0100
158b5ab0bc5Syuo #define     AXEN_RXCTL_IPE			  0x0200
159b5ab0bc5Syuo #define     AXEN_RXCTL_TXPADCRC			  0x0400
160b5ab0bc5Syuo #define   AXEN_MEDIUM_STATUS			0x22
161b5ab0bc5Syuo #define	    AXEN_MEDIUM_NONE			  0x0000
162b5ab0bc5Syuo #define	    AXEN_MEDIUM_GIGA			  0x0001
163b5ab0bc5Syuo #define	    AXEN_MEDIUM_FDX			  0x0002
164b5ab0bc5Syuo #define	    AXEN_MEDIUM_ALWAYS_ONE		  0x0004
165b5ab0bc5Syuo #define	    AXEN_MEDIUM_EN_125MHZ		  0x0008
166b5ab0bc5Syuo #define	    AXEN_MEDIUM_RXFLOW_CTRL_EN		  0x0010
167b5ab0bc5Syuo #define	    AXEN_MEDIUM_TXFLOW_CTRL_EN		  0x0020
168b5ab0bc5Syuo #define	    AXEN_MEDIUM_RECV_EN			  0x0100
169b5ab0bc5Syuo #define	    AXEN_MEDIUM_PS			  0x0200
170b5ab0bc5Syuo #define	    AXEN_MEDIUM_JUMBO_EN		  0x8040
171b5ab0bc5Syuo #define   AXEN_PHYPWR_RSTCTL			0x26
172b5ab0bc5Syuo #define     AXEN_PHYPWR_RSTCTL_BZ		  0x0010
173b5ab0bc5Syuo #define     AXEN_PHYPWR_RSTCTL_IPRL		  0x0020
174b5ab0bc5Syuo #define     AXEN_PHYPWR_RSTCTL_AUTODETACH	  0x1000
175b5ab0bc5Syuo 
176b5ab0bc5Syuo #define AXEN_CMD_EEPROM_READ			0x2004
177b5ab0bc5Syuo #define	    AXEN_EEPROM_STAT			  0x43
178b5ab0bc5Syuo 
179b5ab0bc5Syuo /*   5byte cmd   */
180b5ab0bc5Syuo #define AXEN_CMD_MAC_SET_RXSR			0x5101
181b5ab0bc5Syuo #define   AXEN_RX_BULKIN_QCTRL			  0x2e
182b5ab0bc5Syuo 
183b5ab0bc5Syuo /*   6byte cmd   */
184b5ab0bc5Syuo #define AXEN_CMD_MAC_READ_ETHER			0x6001
18537962954Smpi #define AXEN_CMD_MAC_WRITE_ETHER		0x6101
186b5ab0bc5Syuo #define   AXEN_CMD_MAC_NODE_ID			  0x10
187b5ab0bc5Syuo 
188b5ab0bc5Syuo /*   8byte cmd   */
189b5ab0bc5Syuo #define AXEN_CMD_MAC_READ_FILTER		0x8001
190b5ab0bc5Syuo #define AXEN_CMD_MAC_WRITE_FILTER		0x8101
191b5ab0bc5Syuo #define   AXEN_FILTER_MULTI		 	  0x16
192b5ab0bc5Syuo 
193b5ab0bc5Syuo /* ---PHY--- */
194b5ab0bc5Syuo /*   2byte cmd   */
195b5ab0bc5Syuo #define AXEN_CMD_MII_READ_REG			0x2002
196b5ab0bc5Syuo #define AXEN_CMD_MII_WRITE_REG			0x2102
197b5ab0bc5Syuo 
198b5ab0bc5Syuo 
199b5ab0bc5Syuo 
200b5ab0bc5Syuo /* ========= */
201b5ab0bc5Syuo #define AXEN_GPIO0_EN		0x01
202b5ab0bc5Syuo #define AXEN_GPIO0		0x02
203b5ab0bc5Syuo #define AXEN_GPIO1_EN		0x04
204b5ab0bc5Syuo #define AXEN_GPIO1		0x08
205b5ab0bc5Syuo #define AXEN_GPIO2_EN		0x10
206b5ab0bc5Syuo #define AXEN_GPIO2		0x20
207b5ab0bc5Syuo #define AXEN_GPIO_RELOAD_EEPROM	0x80
208b5ab0bc5Syuo 
209b5ab0bc5Syuo 
210b5ab0bc5Syuo #define AXEN_TIMEOUT		1000
211b5ab0bc5Syuo 
212b5ab0bc5Syuo #define AXEN_RX_LIST_CNT		1
213b5ab0bc5Syuo #define AXEN_TX_LIST_CNT		1
214b5ab0bc5Syuo 
215b5ab0bc5Syuo 
216b5ab0bc5Syuo /*
217b5ab0bc5Syuo  * The interrupt endpoint is currently unused
218b5ab0bc5Syuo  * by the ASIX part.
219b5ab0bc5Syuo  */
220b5ab0bc5Syuo #define AXEN_ENDPT_RX		0x0
221b5ab0bc5Syuo #define AXEN_ENDPT_TX		0x1
222b5ab0bc5Syuo #define AXEN_ENDPT_INTR		0x2
223b5ab0bc5Syuo #define AXEN_ENDPT_MAX		0x3
224b5ab0bc5Syuo 
225b5ab0bc5Syuo struct axen_type {
226b5ab0bc5Syuo 	struct usb_devno	axen_dev;
227b5ab0bc5Syuo 	u_int16_t		axen_flags;
228b5ab0bc5Syuo #define AX178A	0x0001		/* AX88178a */
229b5ab0bc5Syuo #define AX179	0x0002		/* AX88179 */
2309c887effSkevlo #define AX179A	0x0004		/* AX88179a */
231*9060cf22Skevlo #define AX772D	0x0008		/* AX88772d */
232b5ab0bc5Syuo };
233b5ab0bc5Syuo 
234b5ab0bc5Syuo struct axen_softc;
235b5ab0bc5Syuo 
236b5ab0bc5Syuo struct axen_chain {
237b5ab0bc5Syuo 	struct axen_softc	*axen_sc;
238b5ab0bc5Syuo 	struct usbd_xfer	*axen_xfer;
239b5ab0bc5Syuo 	char			*axen_buf;
240b5ab0bc5Syuo 	struct mbuf		*axen_mbuf;
241b5ab0bc5Syuo 	int			axen_accum;
242b5ab0bc5Syuo 	int			axen_idx;
243b5ab0bc5Syuo };
244b5ab0bc5Syuo 
245b5ab0bc5Syuo struct axen_cdata {
246b5ab0bc5Syuo 	struct axen_chain	axen_tx_chain[AXEN_TX_LIST_CNT];
247b5ab0bc5Syuo 	struct axen_chain	axen_rx_chain[AXEN_RX_LIST_CNT];
248b5ab0bc5Syuo 	int			axen_tx_prod;
249b5ab0bc5Syuo 	int			axen_tx_cons;
250b5ab0bc5Syuo 	int			axen_tx_cnt;
251b5ab0bc5Syuo 	int			axen_rx_prod;
252b5ab0bc5Syuo };
253b5ab0bc5Syuo 
254b5ab0bc5Syuo struct axen_qctrl {
255b5ab0bc5Syuo 	u_int8_t		ctrl;
256b5ab0bc5Syuo 	u_int8_t		timer_low;
257b5ab0bc5Syuo 	u_int8_t		timer_high;
258b5ab0bc5Syuo 	u_int8_t		bufsize;
259b5ab0bc5Syuo 	u_int8_t		ifg;
260b5ab0bc5Syuo } __packed;
261b5ab0bc5Syuo 
262b5ab0bc5Syuo struct axen_sframe_hdr {
263b5ab0bc5Syuo 	u_int32_t		plen; /* packet length */
264b5ab0bc5Syuo 	u_int32_t		gso;
265b5ab0bc5Syuo } __packed;
266b5ab0bc5Syuo 
267b5ab0bc5Syuo struct axen_softc {
268b5ab0bc5Syuo 	struct device		axen_dev;
269b5ab0bc5Syuo #define GET_MII(sc) (&(sc)->axen_mii)
270b5ab0bc5Syuo 	struct arpcom		arpcom;
271b5ab0bc5Syuo #define GET_IFP(sc) (&(sc)->arpcom.ac_if)
272b5ab0bc5Syuo 	struct mii_data		axen_mii;
273b5ab0bc5Syuo 	struct usbd_device	*axen_udev;
274b5ab0bc5Syuo 	struct usbd_interface	*axen_iface;
275b5ab0bc5Syuo 
276b5ab0bc5Syuo 	u_int16_t		axen_vendor;
277b5ab0bc5Syuo 	u_int16_t		axen_product;
278b5ab0bc5Syuo 
279b5ab0bc5Syuo 	u_int16_t		axen_flags;
280b5ab0bc5Syuo 
281b5ab0bc5Syuo 	int			axen_ed[AXEN_ENDPT_MAX];
282b5ab0bc5Syuo 	struct usbd_pipe	*axen_ep[AXEN_ENDPT_MAX];
283b5ab0bc5Syuo 	int			axen_unit;
284b5ab0bc5Syuo 	struct axen_cdata	axen_cdata;
285b5ab0bc5Syuo 	struct timeout		axen_stat_ch;
286b5ab0bc5Syuo 
287b5ab0bc5Syuo 	int			axen_refcnt;
288b5ab0bc5Syuo 
289b5ab0bc5Syuo 	struct usb_task		axen_tick_task;
290b5ab0bc5Syuo 	struct usb_task		axen_stop_task;
291b5ab0bc5Syuo 
292b5ab0bc5Syuo 	struct rwlock		axen_mii_lock;
293b5ab0bc5Syuo 
294b5ab0bc5Syuo 	int			axen_link;
295b5ab0bc5Syuo 	unsigned char		axen_ipgs[3];
296b5ab0bc5Syuo 	int			axen_phyno;
297b5ab0bc5Syuo 	struct timeval		axen_rx_notice;
298b5ab0bc5Syuo 	u_int			axen_bufsz;
299b5ab0bc5Syuo 	int			axen_rev;
300b5ab0bc5Syuo };
301