1 /* $OpenBSD: if_otusreg.h,v 1.9 2013/11/26 20:33:18 deraadt Exp $ */ 2 3 /*- 4 * Copyright (c) 2009 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2007-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* USB Endpoints addresses. */ 21 #define AR_EPT_BULK_TX_NO (UE_DIR_OUT | 1) 22 #define AR_EPT_BULK_RX_NO (UE_DIR_IN | 2) 23 #define AR_EPT_INTR_RX_NO (UE_DIR_IN | 3) 24 #define AR_EPT_INTR_TX_NO (UE_DIR_OUT | 4) 25 26 /* USB Requests. */ 27 #define AR_FW_DOWNLOAD 0x30 28 #define AR_FW_DOWNLOAD_COMPLETE 0x31 29 30 /* Maximum number of writes that can fit in a single FW command is 7. */ 31 #define AR_MAX_WRITE_IDX 6 /* 56 bytes */ 32 33 #define AR_FW_INIT_ADDR 0x102800 34 #define AR_FW_MAIN_ADDR 0x200000 35 #define AR_USB_MODE_CTRL 0x1e1108 36 37 /* 38 * AR9170 MAC registers. 39 */ 40 #define AR_MAC_REG_BASE 0x1c3000 41 #define AR_MAC_REG_MAC_ADDR_L (AR_MAC_REG_BASE + 0x610) 42 #define AR_MAC_REG_MAC_ADDR_H (AR_MAC_REG_BASE + 0x614) 43 #define AR_MAC_REG_BSSID_L (AR_MAC_REG_BASE + 0x618) 44 #define AR_MAC_REG_BSSID_H (AR_MAC_REG_BASE + 0x61c) 45 #define AR_MAC_REG_GROUP_HASH_TBL_L (AR_MAC_REG_BASE + 0x624) 46 #define AR_MAC_REG_GROUP_HASH_TBL_H (AR_MAC_REG_BASE + 0x628) 47 #define AR_MAC_REG_BASIC_RATE (AR_MAC_REG_BASE + 0x630) 48 #define AR_MAC_REG_MANDATORY_RATE (AR_MAC_REG_BASE + 0x634) 49 #define AR_MAC_REG_RTS_CTS_RATE (AR_MAC_REG_BASE + 0x638) 50 #define AR_MAC_REG_BACKOFF_PROTECT (AR_MAC_REG_BASE + 0x63c) 51 #define AR_MAC_REG_RX_THRESHOLD (AR_MAC_REG_BASE + 0x640) 52 #define AR_MAC_REG_RX_PE_DELAY (AR_MAC_REG_BASE + 0x64c) 53 #define AR_MAC_REG_DYNAMIC_SIFS_ACK (AR_MAC_REG_BASE + 0x658) 54 #define AR_MAC_REG_SNIFFER (AR_MAC_REG_BASE + 0x674) 55 #define AR_MAC_REG_ACK_EXTENSION (AR_MAC_REG_BASE + 0x690) 56 #define AR_MAC_REG_EIFS_AND_SIFS (AR_MAC_REG_BASE + 0x698) 57 #define AR_MAC_REG_BUSY (AR_MAC_REG_BASE + 0x6e8) 58 #define AR_MAC_REG_BUSY_EXT (AR_MAC_REG_BASE + 0x6ec) 59 #define AR_MAC_REG_SLOT_TIME (AR_MAC_REG_BASE + 0x6f0) 60 #define AR_MAC_REG_AC0_CW (AR_MAC_REG_BASE + 0xb00) 61 #define AR_MAC_REG_AC1_CW (AR_MAC_REG_BASE + 0xb04) 62 #define AR_MAC_REG_AC2_CW (AR_MAC_REG_BASE + 0xb08) 63 #define AR_MAC_REG_AC3_CW (AR_MAC_REG_BASE + 0xb0c) 64 #define AR_MAC_REG_AC4_CW (AR_MAC_REG_BASE + 0xb10) 65 #define AR_MAC_REG_AC1_AC0_AIFS (AR_MAC_REG_BASE + 0xb14) 66 #define AR_MAC_REG_AC3_AC2_AIFS (AR_MAC_REG_BASE + 0xb18) 67 #define AR_MAC_REG_RETRY_MAX (AR_MAC_REG_BASE + 0xb28) 68 #define AR_MAC_REG_TXOP_NOT_ENOUGH_INDICATION \ 69 (AR_MAC_REG_BASE + 0xb30) 70 #define AR_MAC_REG_AC1_AC0_TXOP (AR_MAC_REG_BASE + 0xb44) 71 #define AR_MAC_REG_AC3_AC2_TXOP (AR_MAC_REG_BASE + 0xb48) 72 #define AR_MAC_REG_OFDM_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb4) 73 #define AR_MAC_REG_CCK_PHY_ERRORS (AR_MAC_REG_BASE + 0xcb8) 74 #define AR_MAC_REG_BCN_HT1 (AR_MAC_REG_BASE + 0xda0) 75 76 /* Possible values for register AR_USB_MODE_CTRL. */ 77 #define AR_USB_DS_ENA (1 << 0) 78 #define AR_USB_US_ENA (1 << 1) 79 #define AR_USB_US_PACKET_MODE (1 << 3) 80 #define AR_USB_RX_STREAM_4K (0 << 4) 81 #define AR_USB_RX_STREAM_8K (1 << 4) 82 #define AR_USB_RX_STREAM_16K (2 << 4) 83 #define AR_USB_RX_STREAM_32K (3 << 4) 84 #define AR_USB_TX_STREAM_MODE (1 << 6) 85 86 #define AR_LED0_ON (1 << 0) 87 #define AR_LED1_ON (1 << 1) 88 89 /* 90 * PHY registers. 91 */ 92 #define AR_PHY_BASE 0x1c5800 93 #define AR_PHY(reg) (AR_PHY_BASE + (reg) * 4) 94 #define AR_PHY_TURBO (AR_PHY_BASE + 0x0004) 95 #define AR_PHY_RF_CTL3 (AR_PHY_BASE + 0x0028) 96 #define AR_PHY_RF_CTL4 (AR_PHY_BASE + 0x0034) 97 #define AR_PHY_SETTLING (AR_PHY_BASE + 0x0044) 98 #define AR_PHY_RXGAIN (AR_PHY_BASE + 0x0048) 99 #define AR_PHY_DESIRED_SZ (AR_PHY_BASE + 0x0050) 100 #define AR_PHY_FIND_SIG (AR_PHY_BASE + 0x0058) 101 #define AR_PHY_AGC_CTL1 (AR_PHY_BASE + 0x005c) 102 #define AR_PHY_SFCORR (AR_PHY_BASE + 0x0068) 103 #define AR_PHY_SFCORR_LOW (AR_PHY_BASE + 0x006c) 104 #define AR_PHY_TIMING_CTRL4 (AR_PHY_BASE + 0x0120) 105 #define AR_PHY_TIMING5 (AR_PHY_BASE + 0x0124) 106 #define AR_PHY_POWER_TX_RATE1 (AR_PHY_BASE + 0x0134) 107 #define AR_PHY_POWER_TX_RATE2 (AR_PHY_BASE + 0x0138) 108 #define AR_PHY_POWER_TX_RATE_MAX (AR_PHY_BASE + 0x013c) 109 #define AR_PHY_SWITCH_CHAIN_0 (AR_PHY_BASE + 0x0160) 110 #define AR_PHY_SWITCH_COM (AR_PHY_BASE + 0x0164) 111 #define AR_PHY_HEAVY_CLIP_ENABLE (AR_PHY_BASE + 0x01e0) 112 #define AR_PHY_CCK_DETECT (AR_PHY_BASE + 0x0a08) 113 #define AR_PHY_GAIN_2GHZ (AR_PHY_BASE + 0x0a0c) 114 #define AR_PHY_POWER_TX_RATE3 (AR_PHY_BASE + 0x0a34) 115 #define AR_PHY_POWER_TX_RATE4 (AR_PHY_BASE + 0x0a38) 116 #define AR_PHY_TPCRG1 (AR_PHY_BASE + 0x0a58) 117 #define AR_PHY_POWER_TX_RATE5 (AR_PHY_BASE + 0x0b8c) 118 #define AR_PHY_POWER_TX_RATE6 (AR_PHY_BASE + 0x0b90) 119 #define AR_PHY_POWER_TX_RATE7 (AR_PHY_BASE + 0x0bcc) 120 #define AR_PHY_POWER_TX_RATE8 (AR_PHY_BASE + 0x0bd0) 121 #define AR_PHY_POWER_TX_RATE9 (AR_PHY_BASE + 0x0bd4) 122 #define AR_PHY_CCA (AR_PHY_BASE + 0x3064) 123 124 #define AR_SEEPROM_HW_TYPE_OFFSET 0x1374 125 #define AR_EEPROM_OFFSET 0x1600 126 127 #define AR_BANK4_CHUP (1 << 0) 128 #define AR_BANK4_BMODE_LF_SYNTH_FREQ (1 << 1) 129 #define AR_BANK4_AMODE_REFSEL(x) ((x) << 2) 130 #define AR_BANK4_ADDR(x) ((x) << 5) 131 132 /* Tx descriptor. */ 133 struct ar_tx_head { 134 uint16_t len; 135 uint16_t macctl; 136 #define AR_TX_MAC_RTS (1 << 0) 137 #define AR_TX_MAC_CTS (1 << 1) 138 #define AR_TX_MAC_BACKOFF (1 << 3) 139 #define AR_TX_MAC_NOACK (1 << 2) 140 #define AR_TX_MAC_HW_DUR (1 << 9) 141 #define AR_TX_MAC_QID(qid) ((qid) << 10) 142 #define AR_TX_MAC_RATE_PROBING (1 << 15) 143 144 uint32_t phyctl; 145 /* Modulation type. */ 146 #define AR_TX_PHY_MT_CCK 0 147 #define AR_TX_PHY_MT_OFDM 1 148 #define AR_TX_PHY_MT_HT 2 149 #define AR_TX_PHY_GF (1 << 2) 150 #define AR_TX_PHY_BW_SHIFT 3 151 #define AR_TX_PHY_TPC_SHIFT 9 152 #define AR_TX_PHY_ANTMSK(msk) ((msk) << 15) 153 #define AR_TX_PHY_MCS(mcs) ((mcs) << 18) 154 #define AR_TX_PHY_SHGI (1U << 31) 155 } __packed; 156 157 /* USB Rx stream mode header. */ 158 struct ar_rx_head { 159 uint16_t len; 160 uint16_t tag; 161 #define AR_RX_HEAD_TAG 0x4e00 162 } __packed; 163 164 /* Rx descriptor. */ 165 struct ar_rx_tail { 166 uint8_t rssi_ant[3]; 167 uint8_t rssi_ant_ext[3]; 168 uint8_t rssi; /* Combined RSSI. */ 169 uint8_t evm[2][6]; /* Error Vector Magnitude. */ 170 uint8_t phy_err; 171 uint8_t sa_idx; 172 uint8_t da_idx; 173 uint8_t error; 174 #define AR_RX_ERROR_TIMEOUT (1 << 0) 175 #define AR_RX_ERROR_OVERRUN (1 << 1) 176 #define AR_RX_ERROR_DECRYPT (1 << 2) 177 #define AR_RX_ERROR_FCS (1 << 3) 178 #define AR_RX_ERROR_BAD_RA (1 << 4) 179 #define AR_RX_ERROR_PLCP (1 << 5) 180 #define AR_RX_ERROR_MMIC (1 << 6) 181 182 uint8_t status; 183 /* Modulation type (same as AR_TX_PHY_MT). */ 184 #define AR_RX_STATUS_MT_MASK 0x3 185 #define AR_RX_STATUS_MT_CCK 0 186 #define AR_RX_STATUS_MT_OFDM 1 187 #define AR_RX_STATUS_MT_HT 2 188 #define AR_RX_STATUS_SHPREAMBLE (1 << 3) 189 } __packed; 190 191 #define AR_PLCP_HDR_LEN 12 192 /* Magic PLCP header for firmware notifications through Rx bulk pipe. */ 193 static uint8_t AR_PLCP_HDR_INTR[] = { 194 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 195 0xff, 0xff, 0xff, 0xff, 0xff, 0xff 196 }; 197 198 /* Firmware command/reply header. */ 199 struct ar_cmd_hdr { 200 uint8_t len; 201 uint8_t code; 202 #define AR_CMD_RREG 0x00 203 #define AR_CMD_WREG 0x01 204 #define AR_CMD_RMEM 0x02 205 #define AR_CMD_WMEM 0x03 206 #define AR_CMD_BITAND 0x04 207 #define AR_CMD_BITOR 0x05 208 #define AR_CMD_EKEY 0x28 209 #define AR_CMD_DKEY 0x29 210 #define AR_CMD_FREQUENCY 0x30 211 #define AR_CMD_RF_INIT 0x31 212 #define AR_CMD_SYNTH 0x32 213 #define AR_CMD_FREQ_STRAT 0x33 214 #define AR_CMD_ECHO 0x80 215 #define AR_CMD_TALLY 0x81 216 #define AR_CMD_TALLY_APD 0x82 217 #define AR_CMD_CONFIG 0x83 218 #define AR_CMD_RESET 0x90 219 #define AR_CMD_DKRESET 0x91 220 #define AR_CMD_DKTX_STATUS 0x92 221 #define AR_CMD_FDC 0xa0 222 #define AR_CMD_WREEPROM 0xb0 223 #define AR_CMD_WFLASH AR_CMD_WREEPROM 224 #define AR_CMD_FLASH_ERASE 0xb1 225 #define AR_CMD_FLASH_PROG 0xb2 226 #define AR_CMD_FLASH_CHKSUM 0xb3 227 #define AR_CMD_FLASH_READ 0xb4 228 #define AR_CMD_FW_DL_INIT 0xb5 229 #define AR_CMD_MEM_WREEPROM 0xbb 230 /* Those have the 2 MSB set to 1. */ 231 #define AR_EVT_BEACON 0x00 232 #define AR_EVT_TX_COMP 0x01 233 #define AR_EVT_TBTT 0x02 234 #define AR_EVT_ATIM 0x03 235 236 uint16_t token; /* Driver private data. */ 237 } __packed; 238 239 /* Structure for command AR_CMD_RF_INIT/AR_CMD_FREQUENCY. */ 240 struct ar_cmd_frequency { 241 uint32_t freq; 242 uint32_t dynht2040; 243 uint32_t htena; 244 uint32_t dsc_exp; 245 uint32_t dsc_man; 246 uint32_t dsc_shgi_exp; 247 uint32_t dsc_shgi_man; 248 uint32_t check_loop_count; 249 } __packed; 250 251 /* Firmware reply for command AR_CMD_FREQUENCY. */ 252 struct ar_rsp_frequency { 253 uint32_t status; 254 #define AR_CAL_ERR_AGC (1 << 0) /* AGC cal unfinished. */ 255 #define AR_CAL_ERR_NF (1 << 1) /* Noise cal unfinished. */ 256 #define AR_CAL_ERR_NF_VAL (1 << 2) /* NF value unexpected. */ 257 258 uint32_t nf[3]; /* Noisefloor. */ 259 uint32_t nf_ext[3]; /* Noisefloor ext. */ 260 } __packed; 261 262 /* Structure for command AR_CMD_EKEY. */ 263 struct ar_cmd_ekey { 264 uint16_t uid; /* user ID */ 265 uint16_t kix; 266 uint16_t cipher; 267 #define AR_CIPHER_NONE 0 268 #define AR_CIPHER_WEP64 1 269 #define AR_CIPHER_TKIP 2 270 #define AR_CIPHER_AES 4 271 #define AR_CIPHER_WEP128 5 272 #define AR_CIPHER_WEP256 6 273 #define AR_CIPHER_CENC 7 274 275 uint8_t macaddr[IEEE80211_ADDR_LEN]; 276 uint8_t key[16]; 277 } __packed; 278 279 /* Structure for event AR_EVT_TX_COMP. */ 280 struct ar_evt_tx_comp { 281 uint8_t macaddr[IEEE80211_ADDR_LEN]; 282 uint32_t phy; 283 uint16_t status; 284 #define AR_TX_STATUS_COMP 0 285 #define AR_TX_STATUS_RETRY_COMP 1 286 #define AR_TX_STATUS_FAILED 2 287 } __packed; 288 289 /* List of supported channels. */ 290 static const uint8_t ar_chans[] = { 291 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 292 36, 40, 44, 48, 52, 56, 60, 64, 100, 104, 108, 112, 116, 120, 124, 293 128, 132, 136, 140, 149, 153, 157, 161, 165, 34, 38, 42, 46 294 }; 295 296 /* 297 * This data is automatically generated from the "otus.ini" file. 298 * It is stored in a different way though, to reduce kernel's .rodata 299 * section overhead (5.1KB instead of 8.5KB). 300 */ 301 302 /* NB: apply AR_PHY(). */ 303 static const uint16_t ar5416_phy_regs[] = { 304 0x000, 0x001, 0x002, 0x003, 0x004, 0x005, 0x006, 0x007, 0x008, 305 0x009, 0x00a, 0x00b, 0x00c, 0x00d, 0x00e, 0x00f, 0x010, 0x011, 306 0x012, 0x013, 0x014, 0x015, 0x016, 0x017, 0x018, 0x01a, 0x01b, 307 0x040, 0x041, 0x042, 0x043, 0x045, 0x046, 0x047, 0x048, 0x049, 308 0x04a, 0x04b, 0x04d, 0x04e, 0x04f, 0x051, 0x052, 0x053, 0x055, 309 0x056, 0x058, 0x059, 0x05c, 0x05d, 0x05e, 0x05f, 0x060, 0x061, 310 0x062, 0x063, 0x064, 0x065, 0x066, 0x067, 0x068, 0x069, 0x06a, 311 0x06b, 0x06c, 0x06d, 0x070, 0x071, 0x072, 0x073, 0x074, 0x075, 312 0x076, 0x077, 0x078, 0x079, 0x07a, 0x07b, 0x07c, 0x07f, 0x080, 313 0x081, 0x082, 0x083, 0x084, 0x085, 0x086, 0x087, 0x088, 0x089, 314 0x08a, 0x08b, 0x08c, 0x08d, 0x08e, 0x08f, 0x090, 0x091, 0x092, 315 0x093, 0x094, 0x095, 0x096, 0x097, 0x098, 0x099, 0x09a, 0x09b, 316 0x09c, 0x09d, 0x09e, 0x09f, 0x0a0, 0x0a1, 0x0a2, 0x0a3, 0x0a4, 317 0x0a5, 0x0a6, 0x0a7, 0x0a8, 0x0a9, 0x0aa, 0x0ab, 0x0ac, 0x0ad, 318 0x0ae, 0x0af, 0x0b0, 0x0b1, 0x0b2, 0x0b3, 0x0b4, 0x0b5, 0x0b6, 319 0x0b7, 0x0b8, 0x0b9, 0x0ba, 0x0bb, 0x0bc, 0x0bd, 0x0be, 0x0bf, 320 0x0c0, 0x0c1, 0x0c2, 0x0c3, 0x0c4, 0x0c5, 0x0c6, 0x0c7, 0x0c8, 321 0x0c9, 0x0ca, 0x0cb, 0x0cc, 0x0cd, 0x0ce, 0x0cf, 0x0d0, 0x0d1, 322 0x0d2, 0x0d3, 0x0d4, 0x0d5, 0x0d6, 0x0d7, 0x0d8, 0x0d9, 0x0da, 323 0x0db, 0x0dc, 0x0dd, 0x0de, 0x0df, 0x0e0, 0x0e1, 0x0e2, 0x0e3, 324 0x0e4, 0x0e5, 0x0e6, 0x0e7, 0x0e8, 0x0e9, 0x0ea, 0x0eb, 0x0ec, 325 0x0ed, 0x0ee, 0x0ef, 0x0f0, 0x0f1, 0x0f2, 0x0f3, 0x0f4, 0x0f5, 326 0x0f6, 0x0f7, 0x0f8, 0x0f9, 0x0fa, 0x0fb, 0x0fc, 0x0fd, 0x0fe, 327 0x0ff, 0x100, 0x103, 0x104, 0x105, 0x106, 0x107, 0x108, 0x109, 328 0x10a, 0x10b, 0x10c, 0x10d, 0x10e, 0x10f, 0x13c, 0x13d, 0x13e, 329 0x13f, 0x280, 0x281, 0x282, 0x283, 0x284, 0x285, 0x286, 0x287, 330 0x288, 0x289, 0x28a, 0x28b, 0x28c, 0x28d, 0x28e, 0x28f, 0x290, 331 0x291, 0x292, 0x293, 0x294, 0x295, 0x296, 0x297, 0x298, 0x299, 332 0x29a, 0x29b, 0x29d, 0x29e, 0x29f, 0x2c0, 0x2c1, 0x2c2, 0x2c3, 333 0x2c4, 0x2c5, 0x2c6, 0x2c7, 0x2c8, 0x2c9, 0x2ca, 0x2cb, 0x2cc, 334 0x2cd, 0x2ce, 0x2cf, 0x2d0, 0x2d1, 0x2d2, 0x2d3, 0x2d4, 0x2d5, 335 0x2d6, 0x2e2, 0x2e3, 0x2e4, 0x2e5, 0x2e6, 0x2e7, 0x2e8, 0x2e9, 336 0x2ea, 0x2eb, 0x2ec, 0x2ed, 0x2ee, 0x2ef, 0x2f0, 0x2f1, 0x2f2, 337 0x2f3, 0x2f4, 0x2f5, 0x2f6, 0x2f7, 0x2f8, 0x412, 0x448, 0x458, 338 0x683, 0x69b, 0x812, 0x848, 0x858, 0xa83, 0xa9b, 0xc19, 0xc57, 339 0xc5a, 0xc6f, 0xe9c, 0xed7, 0xed8, 0xed9, 0xeda, 0xedb, 0xedc, 340 0xedd, 0xede, 0xedf, 0xee0, 0xee1 341 }; 342 343 static const uint32_t ar5416_phy_vals_5ghz_20mhz[] = { 344 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 345 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 346 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 347 0x00200400, 0x206a002e, 0x1372161e, 0x001a6a65, 0x1284233c, 348 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 349 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 350 0x00000000, 0x000007d0, 0x00000118, 0x10000fff, 0x0510081c, 351 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 352 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 353 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 354 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 355 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 356 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 357 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 358 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 359 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 360 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 361 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 362 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 363 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 364 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 365 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 366 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 367 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 368 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 369 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 370 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 371 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 372 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 373 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 374 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 375 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 376 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 377 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 378 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 379 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 380 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 381 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 382 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 383 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 384 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 385 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 386 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 387 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 388 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 389 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 390 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 391 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 392 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 393 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 394 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 395 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 396 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 397 0xb51fa69f, 0xcb3fbd07, 0x0000d7bf, 0x00000000, 0x00000000, 398 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 399 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 400 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 401 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 402 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 403 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 404 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 405 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 406 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 407 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 408 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 409 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 410 }; 411 412 #ifdef notyet 413 static const uint32_t ar5416_phy_vals_5ghz_40mhz[] = { 414 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 415 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 416 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 417 0x00200400, 0x206a002e, 0x13721c1e, 0x001a6a65, 0x1284233c, 418 0x6c48b4e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd10, 419 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 420 0x00000000, 0x000007d0, 0x00000230, 0x10000fff, 0x0510081c, 421 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 422 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 423 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 424 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 425 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 426 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 427 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 428 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 429 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 430 0x00000000, 0x00000040, 0x00000080, 0x000001a1, 0x000001e1, 431 0x00000021, 0x00000061, 0x00000168, 0x000001a8, 0x000001e8, 432 0x00000028, 0x00000068, 0x00000189, 0x000001c9, 0x00000009, 433 0x00000049, 0x00000089, 0x00000170, 0x000001b0, 0x000001f0, 434 0x00000030, 0x00000070, 0x00000191, 0x000001d1, 0x00000011, 435 0x00000051, 0x00000091, 0x000001b8, 0x000001f8, 0x00000038, 436 0x00000078, 0x00000199, 0x000001d9, 0x00000019, 0x00000059, 437 0x00000099, 0x000000d9, 0x000000f9, 0x000000f9, 0x000000f9, 438 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 439 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 440 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 441 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 442 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 443 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 444 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 445 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 446 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 447 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 448 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 449 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 450 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 451 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 452 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 453 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 454 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 455 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 456 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 457 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 458 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 459 0x00000000, 0x00000008, 0x00000440, 0xd6be4788, 0x012e8160, 460 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 461 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 462 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 463 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 464 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a9caa, 465 0x1ce739ce, 0x051701ce, 0x18010000, 0x30032602, 0x48073e06, 466 0x560b4c0a, 0x641a600f, 0x7a4f6e1b, 0x8c5b7e5a, 0x9d0f96cf, 467 0xb51fa69f, 0xcb3fbcbf, 0x0000d7bf, 0x00000000, 0x00000000, 468 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 469 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 470 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 471 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 472 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 473 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 474 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a65, 0x0510001c, 475 0x00009b40, 0x012e8160, 0x09249126, 0x00180a65, 0x0510001c, 476 0x00009b40, 0x012e8160, 0x09249126, 0x0001c600, 0x004b6a8e, 477 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 478 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 479 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 480 }; 481 #endif 482 483 #ifdef notyet 484 static const uint32_t ar5416_phy_vals_2ghz_40mhz[] = { 485 0x00000007, 0x000003c4, 0x00000000, 0xad848e19, 0x7d14e000, 486 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 487 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 488 0x00200400, 0x206a002e, 0x13721c24, 0x00197a68, 0x1284233c, 489 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 490 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 491 0x00000000, 0x00000898, 0x00000268, 0x10000fff, 0x0510001c, 492 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 493 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 494 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 495 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 496 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 497 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 498 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 499 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 500 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 501 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 502 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 503 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 504 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 505 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 506 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 507 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 508 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 509 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 510 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 511 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 512 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 513 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 514 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 515 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 516 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 517 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 518 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 519 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 520 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 521 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 522 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 523 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 524 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 525 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 526 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 527 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 528 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 529 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 530 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 531 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 532 0x00000400, 0x000009b5, 0x00000000, 0x00000210, 0x3f3f3f3f, 533 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 534 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 535 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 536 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 537 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 538 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 539 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 540 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 541 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 542 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 543 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 544 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 545 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 546 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 547 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 548 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 549 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 550 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 551 }; 552 #endif 553 554 static const uint32_t ar5416_phy_vals_2ghz_20mhz[] = { 555 0x00000007, 0x00000300, 0x00000000, 0xad848e19, 0x7d14e000, 556 0x9c0a9f6b, 0x00000090, 0x00000000, 0x02020200, 0x00000e0e, 557 0x0a020001, 0x0000a000, 0x00000000, 0x00000e0e, 0x00000007, 558 0x00200400, 0x206a002e, 0x137216a4, 0x00197a68, 0x1284233c, 559 0x6c48b0e4, 0x00000859, 0x7ec80d2e, 0x31395c5e, 0x0004dd20, 560 0x409a4190, 0x050cb081, 0x00000000, 0x00000000, 0x00000000, 561 0x00000000, 0x00000898, 0x00000134, 0x10000fff, 0x0510001c, 562 0xd0058a15, 0x00000001, 0x00000004, 0x3f3f3f3f, 0x3f3f3f3f, 563 0x0000007f, 0xdfb81020, 0x9280b212, 0x00020028, 0x5d50e188, 564 0x00081fff, 0x00009b40, 0x00001120, 0x190fb515, 0x00000000, 565 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 566 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 567 0x00000000, 0x00000007, 0x001fff00, 0x006f00c4, 0x03051000, 568 0x00000820, 0x038919be, 0x06336f77, 0x60f6532c, 0x08f186c8, 569 0x00046384, 0x00000000, 0x00000000, 0x00000000, 0x00000200, 570 0x64646464, 0x3c787878, 0x000000aa, 0x00000000, 0x00001042, 571 0x00000000, 0x00000040, 0x00000080, 0x00000141, 0x00000181, 572 0x000001c1, 0x00000001, 0x00000041, 0x000001a8, 0x000001e8, 573 0x00000028, 0x00000068, 0x000000a8, 0x00000169, 0x000001a9, 574 0x000001e9, 0x00000029, 0x00000069, 0x00000190, 0x000001d0, 575 0x00000010, 0x00000050, 0x00000090, 0x00000151, 0x00000191, 576 0x000001d1, 0x00000011, 0x00000051, 0x00000198, 0x000001d8, 577 0x00000018, 0x00000058, 0x00000098, 0x00000159, 0x00000199, 578 0x000001d9, 0x00000019, 0x00000059, 0x00000099, 0x000000d9, 579 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 580 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 581 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 582 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 583 0x000000f9, 0x000000f9, 0x000000f9, 0x000000f9, 0x00000000, 584 0x00000001, 0x00000002, 0x00000003, 0x00000004, 0x00000005, 585 0x00000008, 0x00000009, 0x0000000a, 0x0000000b, 0x0000000c, 586 0x0000000d, 0x00000010, 0x00000011, 0x00000012, 0x00000013, 587 0x00000014, 0x00000015, 0x00000018, 0x00000019, 0x0000001a, 588 0x0000001b, 0x0000001c, 0x0000001d, 0x00000020, 0x00000021, 589 0x00000022, 0x00000023, 0x00000024, 0x00000025, 0x00000028, 590 0x00000029, 0x0000002a, 0x0000002b, 0x0000002c, 0x0000002d, 591 0x00000030, 0x00000031, 0x00000032, 0x00000033, 0x00000034, 592 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 593 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 594 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 595 0x00000035, 0x00000035, 0x00000035, 0x00000035, 0x00000035, 596 0x00000035, 0x00000010, 0x0000001a, 0x00000000, 0x00000000, 597 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 598 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 599 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 600 0x00000000, 0x0000000e, 0x00000440, 0xd03e4788, 0x012a8160, 601 0x40806333, 0x00106c10, 0x009c4060, 0x1883800a, 0x018830c6, 602 0x00000400, 0x000009b5, 0x00000000, 0x00000108, 0x3f3f3f3f, 603 0x3f3f3f3f, 0x13c889af, 0x38490a20, 0x00007bb6, 0x0fff3ffc, 604 0x00000001, 0x0000a000, 0x00000000, 0x0cc75380, 0x0f0f0f01, 605 0xdfa91f01, 0x00418a11, 0x00000000, 0x09249126, 0x0a1a7caa, 606 0x1ce739ce, 0x051701ce, 0x18010000, 0x2e032402, 0x4a0a3c06, 607 0x621a540b, 0x764f6c1b, 0x845b7a5a, 0x950f8ccf, 0xa5cf9b4f, 608 0xbddfaf1f, 0xd1ffc93f, 0x00000000, 0x00000000, 0x00000000, 609 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 610 0x3fffffff, 0x3fffffff, 0x3fffffff, 0x0003ffff, 0x79a8aa1f, 611 0x08000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x1ce739ce, 0x000001ce, 612 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 613 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 614 0x00000000, 0x00000000, 0x3f3f3f3f, 0x3f3f3f3f, 0x3f3f3f3f, 615 0x00000000, 0x1ce739ce, 0x000000c0, 0x00180a68, 0x0510001c, 616 0x00009b40, 0x012a8160, 0x09249126, 0x00180a68, 0x0510001c, 617 0x00009b40, 0x012a8160, 0x09249126, 0x0001c600, 0x004b6a8e, 618 0x000003ce, 0x00181400, 0x00820820, 0x066c420f, 0x0f282207, 619 0x17601685, 0x1f801104, 0x37a00c03, 0x3fc40883, 0x57c00803, 620 0x5fd80682, 0x7fe00482, 0x7f3c7bba, 0xf3307ff0 621 }; 622 623 /* NB: apply AR_PHY(). */ 624 static const uint8_t ar5416_banks_regs[] = { 625 0x2c, 0x38, 0x2c, 0x3b, 0x2c, 0x38, 0x3c, 0x2c, 0x3a, 0x2c, 0x39, 626 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 627 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 628 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 629 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 630 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x2c, 0x38, 0x2c, 0x2c, 631 0x2c, 0x3c 632 }; 633 634 static const uint32_t ar5416_banks_vals_5ghz[] = { 635 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 636 0x00000420, 0x01400018, 0x000001a1, 0x00000001, 0x00000013, 637 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 638 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 639 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 640 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 641 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 642 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 643 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 644 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 645 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 646 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 647 0x00000004, 0x00000015, 0x0000001f, 0x00000000, 0x000000a0, 648 0x00000000, 0x00000040, 0x0000001c 649 }; 650 651 static const uint32_t ar5416_banks_vals_2ghz[] = { 652 0x1e5795e5, 0x02008020, 0x02108421, 0x00000008, 0x0e73ff17, 653 0x00000420, 0x01c00018, 0x000001a1, 0x00000001, 0x00000013, 654 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 655 0x00000000, 0x00004000, 0x00006c00, 0x00002c00, 0x00004800, 656 0x00004000, 0x00006000, 0x00001000, 0x00004000, 0x00007c00, 657 0x00007c00, 0x00007c00, 0x00007c00, 0x00007c00, 0x00087c00, 658 0x00007c00, 0x00005400, 0x00000c00, 0x00001800, 0x00007c00, 659 0x00006c00, 0x00006c00, 0x00007c00, 0x00002c00, 0x00003c00, 660 0x00003800, 0x00001c00, 0x00000800, 0x00000408, 0x00004c15, 661 0x00004188, 0x0000201e, 0x00010408, 0x00000801, 0x00000c08, 662 0x0000181e, 0x00001016, 0x00002800, 0x00004010, 0x0000081c, 663 0x00000115, 0x00000015, 0x00000066, 0x0000001c, 0x00000000, 664 0x00000004, 0x00000015, 0x0000001f, 0x00000400, 0x000000a0, 665 0x00000000, 0x00000040, 0x0000001c 666 }; 667 668 /* 669 * EEPROM. 670 */ 671 /* Possible flags for opCapFlags. */ 672 #define AR5416_OPFLAGS_11A 0x01 673 #define AR5416_OPFLAGS_11G 0x02 674 #define AR5416_OPFLAGS_5G_HT40 0x04 675 #define AR5416_OPFLAGS_2G_HT40 0x08 676 #define AR5416_OPFLAGS_5G_HT20 0x10 677 #define AR5416_OPFLAGS_2G_HT20 0x20 678 679 #define AR5416_NUM_5G_CAL_PIERS 8 680 #define AR5416_NUM_2G_CAL_PIERS 4 681 #define AR5416_NUM_5G_20_TARGET_POWERS 8 682 #define AR5416_NUM_5G_40_TARGET_POWERS 8 683 #define AR5416_NUM_2G_CCK_TARGET_POWERS 3 684 #define AR5416_NUM_2G_20_TARGET_POWERS 4 685 #define AR5416_NUM_2G_40_TARGET_POWERS 4 686 #define AR5416_NUM_CTLS 24 687 #define AR5416_NUM_BAND_EDGES 8 688 #define AR5416_NUM_PD_GAINS 4 689 #define AR5416_PD_GAIN_ICEPTS 5 690 #define AR5416_EEPROM_MODAL_SPURS 5 691 #define AR5416_MAX_CHAINS 2 692 693 struct BaseEepHeader { 694 uint16_t length; 695 uint16_t checksum; 696 uint16_t version; 697 uint8_t opCapFlags; 698 uint8_t eepMisc; 699 uint16_t regDmn[2]; 700 uint8_t macAddr[6]; 701 uint8_t rxMask; 702 uint8_t txMask; 703 uint16_t rfSilent; 704 uint16_t blueToothOptions; 705 uint16_t deviceCap; 706 uint32_t binBuildNumber; 707 uint8_t deviceType; 708 uint8_t futureBase[33]; 709 } __packed; 710 711 struct spurChanStruct { 712 uint16_t spurChan; 713 uint8_t spurRangeLow; 714 uint8_t spurRangeHigh; 715 } __packed; 716 717 struct ModalEepHeader { 718 uint32_t antCtrlChain[AR5416_MAX_CHAINS]; 719 uint32_t antCtrlCommon; 720 int8_t antennaGainCh[AR5416_MAX_CHAINS]; 721 uint8_t switchSettling; 722 uint8_t txRxAttenCh[AR5416_MAX_CHAINS]; 723 uint8_t rxTxMarginCh[AR5416_MAX_CHAINS]; 724 uint8_t adcDesiredSize; 725 int8_t pgaDesiredSize; 726 uint8_t xlnaGainCh[AR5416_MAX_CHAINS]; 727 uint8_t txEndToXpaOff; 728 uint8_t txEndToRxOn; 729 uint8_t txFrameToXpaOn; 730 uint8_t thresh62; 731 uint8_t noiseFloorThreshCh[AR5416_MAX_CHAINS]; 732 uint8_t xpdGain; 733 uint8_t xpd; 734 int8_t iqCalICh[AR5416_MAX_CHAINS]; 735 int8_t iqCalQCh[AR5416_MAX_CHAINS]; 736 uint8_t pdGainOverlap; 737 uint8_t ob; 738 uint8_t db; 739 uint8_t xpaBiasLvl; 740 uint8_t pwrDecreaseFor2Chain; 741 uint8_t pwrDecreaseFor3Chain; 742 uint8_t txFrameToDataStart; 743 uint8_t txFrameToPaOn; 744 uint8_t ht40PowerIncForPdadc; 745 uint8_t bswAtten[AR5416_MAX_CHAINS]; 746 uint8_t bswMargin[AR5416_MAX_CHAINS]; 747 uint8_t swSettleHt40; 748 uint8_t futureModal[22]; 749 struct spurChanStruct spurChans[AR5416_EEPROM_MODAL_SPURS]; 750 } __packed; 751 752 struct calDataPerFreq { 753 uint8_t pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 754 uint8_t vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS]; 755 } __packed; 756 757 struct CalTargetPowerLegacy { 758 uint8_t bChannel; 759 uint8_t tPow2x[4]; 760 } __packed; 761 762 struct CalTargetPowerHt { 763 uint8_t bChannel; 764 uint8_t tPow2x[8]; 765 } __packed; 766 767 struct CalCtlEdges { 768 uint8_t bChannel; 769 uint8_t tPowerFlag; 770 } __packed; 771 772 struct CalCtlData { 773 struct CalCtlEdges ctlEdges[AR5416_MAX_CHAINS][AR5416_NUM_BAND_EDGES]; 774 } __packed; 775 776 struct ar5416eeprom { 777 struct BaseEepHeader baseEepHeader; 778 uint8_t custData[64]; 779 struct ModalEepHeader modalHeader[2]; 780 uint8_t calFreqPier5G[AR5416_NUM_5G_CAL_PIERS]; 781 uint8_t calFreqPier2G[AR5416_NUM_2G_CAL_PIERS]; 782 struct calDataPerFreq calPierData5G[AR5416_MAX_CHAINS] 783 [AR5416_NUM_5G_CAL_PIERS]; 784 struct calDataPerFreq calPierData2G[AR5416_MAX_CHAINS] 785 [AR5416_NUM_2G_CAL_PIERS]; 786 struct CalTargetPowerLegacy calTPow5G[AR5416_NUM_5G_20_TARGET_POWERS]; 787 struct CalTargetPowerHt calTPow5GHT20[AR5416_NUM_5G_20_TARGET_POWERS]; 788 struct CalTargetPowerHt calTPow5GHT40[AR5416_NUM_5G_40_TARGET_POWERS]; 789 struct CalTargetPowerLegacy calTPowCck[AR5416_NUM_2G_CCK_TARGET_POWERS]; 790 struct CalTargetPowerLegacy calTPow2G[AR5416_NUM_2G_20_TARGET_POWERS]; 791 struct CalTargetPowerHt calTPow2GHT20[AR5416_NUM_2G_20_TARGET_POWERS]; 792 struct CalTargetPowerHt calTPow2GHT40[AR5416_NUM_2G_40_TARGET_POWERS]; 793 uint8_t ctlIndex[AR5416_NUM_CTLS]; 794 struct CalCtlData ctlData[AR5416_NUM_CTLS]; 795 uint8_t padding; 796 } __packed; 797 798 799 #define OTUS_TX_DATA_LIST_COUNT 8 800 #define OTUS_RX_DATA_LIST_COUNT 1 801 802 #define OTUS_CMD_TIMEOUT 1000 803 #define OTUS_TX_TIMEOUT 1000 804 805 #define OTUS_UID(aid) (IEEE80211_AID(aid) + 4) 806 807 #define OTUS_MAX_TXCMDSZ 64 808 #define OTUS_RXBUFSZ (8 * 1024) 809 #define OTUS_TXBUFSZ (4 * 1024) 810 811 /* Default EDCA parameters for when QoS is disabled. */ 812 static const struct ieee80211_edca_ac_params otus_edca_def[EDCA_NUM_AC] = { 813 { 4, 10, 3, 0 }, 814 { 4, 10, 7, 0 }, 815 { 3, 4, 2, 94 }, 816 { 2, 3, 2, 47 } 817 }; 818 819 #define OTUS_RIDX_CCK1 0 820 #define OTUS_RIDX_OFDM6 4 821 #define OTUS_RIDX_OFDM24 8 822 #define OTUS_RIDX_MAX 11 823 static const struct otus_rate { 824 uint8_t rate; 825 uint8_t mcs; 826 } otus_rates[] = { 827 { 2, 0x0 }, 828 { 4, 0x1 }, 829 { 11, 0x2 }, 830 { 22, 0x3 }, 831 { 12, 0xb }, 832 { 18, 0xf }, 833 { 24, 0xa }, 834 { 36, 0xe }, 835 { 48, 0x9 }, 836 { 72, 0xd }, 837 { 96, 0x8 }, 838 { 108, 0xc } 839 }; 840 841 struct otus_rx_radiotap_header { 842 struct ieee80211_radiotap_header wr_ihdr; 843 uint8_t wr_flags; 844 uint8_t wr_rate; 845 uint16_t wr_chan_freq; 846 uint16_t wr_chan_flags; 847 uint8_t wr_antsignal; 848 } __packed; 849 850 #define OTUS_RX_RADIOTAP_PRESENT \ 851 (1 << IEEE80211_RADIOTAP_FLAGS | \ 852 1 << IEEE80211_RADIOTAP_RATE | \ 853 1 << IEEE80211_RADIOTAP_CHANNEL | \ 854 1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) 855 856 struct otus_tx_radiotap_header { 857 struct ieee80211_radiotap_header wt_ihdr; 858 uint8_t wt_flags; 859 uint8_t wt_rate; 860 uint16_t wt_chan_freq; 861 uint16_t wt_chan_flags; 862 } __packed; 863 864 #define OTUS_TX_RADIOTAP_PRESENT \ 865 (1 << IEEE80211_RADIOTAP_FLAGS | \ 866 1 << IEEE80211_RADIOTAP_RATE | \ 867 1 << IEEE80211_RADIOTAP_CHANNEL) 868 869 struct otus_softc; 870 871 struct otus_tx_cmd { 872 struct usbd_xfer *xfer; 873 uint8_t *buf; 874 void *odata; 875 uint16_t token; 876 uint8_t done; 877 }; 878 879 struct otus_rx_data { 880 struct otus_softc *sc; 881 struct usbd_xfer *xfer; 882 uint8_t *buf; 883 }; 884 885 struct otus_tx_data { 886 struct otus_softc *sc; 887 struct usbd_xfer *xfer; 888 uint8_t *buf; 889 }; 890 891 struct otus_host_cmd { 892 void (*cb)(struct otus_softc *, void *); 893 uint8_t data[256]; 894 }; 895 896 #define OTUS_HOST_CMD_RING_COUNT 32 897 struct otus_host_cmd_ring { 898 struct otus_host_cmd cmd[OTUS_HOST_CMD_RING_COUNT]; 899 int cur; 900 int next; 901 int queued; 902 }; 903 904 struct otus_node { 905 struct ieee80211_node ni; 906 struct ieee80211_amrr_node amn; 907 uint8_t ridx[IEEE80211_RATE_MAXSIZE]; 908 }; 909 910 struct otus_cmd_newstate { 911 enum ieee80211_state state; 912 int arg; 913 }; 914 915 struct otus_cmd_key { 916 struct ieee80211_key key; 917 uint16_t associd; 918 }; 919 920 struct otus_softc { 921 struct device sc_dev; 922 struct ieee80211com sc_ic; 923 int (*sc_newstate)(struct ieee80211com *, 924 enum ieee80211_state, int); 925 void (*sc_led_newstate)(struct otus_softc *); 926 927 struct usbd_device *sc_udev; 928 struct usbd_interface *sc_iface; 929 930 struct ar5416eeprom eeprom; 931 uint8_t capflags; 932 uint8_t rxmask; 933 uint8_t txmask; 934 935 struct usbd_pipe *data_tx_pipe; 936 struct usbd_pipe *data_rx_pipe; 937 struct usbd_pipe *cmd_tx_pipe; 938 struct usbd_pipe *cmd_rx_pipe; 939 uint8_t *ibuf; 940 941 int sc_if_flags; 942 int sc_tx_timer; 943 int fixed_ridx; 944 int bb_reset; 945 946 struct ieee80211_channel *sc_curchan; 947 948 struct usb_task sc_task; 949 struct timeout scan_to; 950 struct timeout calib_to; 951 struct ieee80211_amrr amrr; 952 953 int write_idx; 954 int tx_cur; 955 int tx_queued; 956 uint32_t led_state; 957 958 const uint32_t *phy_vals; 959 960 struct { 961 uint32_t reg; 962 uint32_t val; 963 } __packed write_buf[AR_MAX_WRITE_IDX + 1]; 964 965 struct otus_host_cmd_ring cmdq; 966 struct otus_tx_cmd tx_cmd; 967 struct otus_tx_data tx_data[OTUS_TX_DATA_LIST_COUNT]; 968 struct otus_rx_data rx_data[OTUS_RX_DATA_LIST_COUNT]; 969 970 #if NBPFILTER > 0 971 caddr_t sc_drvbpf; 972 973 union { 974 struct otus_rx_radiotap_header th; 975 uint8_t pad[64]; 976 } sc_rxtapu; 977 #define sc_rxtap sc_rxtapu.th 978 int sc_rxtap_len; 979 980 union { 981 struct otus_tx_radiotap_header th; 982 uint8_t pad[64]; 983 } sc_txtapu; 984 #define sc_txtap sc_txtapu.th 985 int sc_txtap_len; 986 #endif 987 }; 988