1 /* $OpenBSD: if_uath.c,v 1.40 2009/10/13 19:33:17 pirofti Exp $ */ 2 3 /*- 4 * Copyright (c) 2006 5 * Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /*- 21 * Driver for Atheros AR5005UG/AR5005UX chipsets. 22 * http://www.atheros.com/pt/bulletins/AR5005UGBulletin.pdf 23 * http://www.atheros.com/pt/bulletins/AR5005UXBulletin.pdf 24 * 25 * IMPORTANT NOTICE: 26 * This driver was written without any documentation or support from Atheros 27 * Communications. It is based on a black-box analysis of the Windows binary 28 * driver. It handles both pre and post-firmware devices. 29 */ 30 31 #include "bpfilter.h" 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/timeout.h> 41 #include <sys/conf.h> 42 #include <sys/device.h> 43 44 #include <machine/bus.h> 45 #include <machine/endian.h> 46 #include <machine/intr.h> 47 48 #if NBPFILTER > 0 49 #include <net/bpf.h> 50 #endif 51 #include <net/if.h> 52 #include <net/if_arp.h> 53 #include <net/if_dl.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/if_ether.h> 61 #include <netinet/ip.h> 62 63 #include <net80211/ieee80211_var.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/rndvar.h> 67 #include <crypto/arc4.h> 68 69 #include <dev/usb/usb.h> 70 #include <dev/usb/usbdi.h> 71 #include <dev/usb/usbdivar.h> /* needs_reattach() */ 72 #include <dev/usb/usbdi_util.h> 73 #include <dev/usb/usbdevs.h> 74 75 #include <dev/usb/if_uathreg.h> 76 #include <dev/usb/if_uathvar.h> 77 78 #ifdef USB_DEBUG 79 #define UATH_DEBUG 80 #endif 81 82 #ifdef UATH_DEBUG 83 #define DPRINTF(x) do { if (uath_debug) printf x; } while (0) 84 #define DPRINTFN(n, x) do { if (uath_debug >= (n)) printf x; } while (0) 85 int uath_debug = 1; 86 #else 87 #define DPRINTF(x) 88 #define DPRINTFN(n, x) 89 #endif 90 91 /*- 92 * Various supported device vendors/products. 93 * UB51: AR5005UG 802.11b/g, UB52: AR5005UX 802.11a/b/g 94 */ 95 #define UATH_DEV(v, p, f) \ 96 { { USB_VENDOR_##v, USB_PRODUCT_##v##_##p }, (f) }, \ 97 { { USB_VENDOR_##v, USB_PRODUCT_##v##_##p##_NF }, \ 98 (f) | UATH_FLAG_PRE_FIRMWARE } 99 #define UATH_DEV_UG(v, p) UATH_DEV(v, p, 0) 100 #define UATH_DEV_UX(v, p) UATH_DEV(v, p, UATH_FLAG_ABG) 101 static const struct uath_type { 102 struct usb_devno dev; 103 unsigned int flags; 104 #define UATH_FLAG_PRE_FIRMWARE (1 << 0) 105 #define UATH_FLAG_ABG (1 << 1) 106 } uath_devs[] = { 107 UATH_DEV_UG(ACCTON, SMCWUSBTG2), 108 UATH_DEV_UG(ATHEROS, AR5523), 109 UATH_DEV_UG(ATHEROS2, AR5523_1), 110 UATH_DEV_UG(ATHEROS2, AR5523_2), 111 UATH_DEV_UX(ATHEROS2, AR5523_3), 112 UATH_DEV_UG(CONCEPTRONIC, AR5523_1), 113 UATH_DEV_UX(CONCEPTRONIC, AR5523_2), 114 UATH_DEV_UX(DLINK, DWLAG122), 115 UATH_DEV_UX(DLINK, DWLAG132), 116 UATH_DEV_UG(DLINK, DWLG132), 117 UATH_DEV_UG(GIGASET, AR5523), 118 UATH_DEV_UG(GIGASET, SMCWUSBTG), 119 UATH_DEV_UG(GLOBALSUN, AR5523_1), 120 UATH_DEV_UX(GLOBALSUN, AR5523_2), 121 UATH_DEV_UG(IODATA, USBWNG54US), 122 UATH_DEV_UG(MELCO, WLIU2KAMG54), 123 UATH_DEV_UX(NETGEAR, WG111U), 124 UATH_DEV_UG(NETGEAR3, WG111T), 125 UATH_DEV_UG(NETGEAR3, WPN111), 126 UATH_DEV_UG(PHILIPS, SNU6500), 127 UATH_DEV_UX(UMEDIA, AR5523_2), 128 UATH_DEV_UG(UMEDIA, TEW444UBEU), 129 UATH_DEV_UG(WISTRONNEWEB, AR5523_1), 130 UATH_DEV_UX(WISTRONNEWEB, AR5523_2), 131 UATH_DEV_UG(ZCOM, AR5523) 132 }; 133 #define uath_lookup(v, p) \ 134 ((const struct uath_type *)usb_lookup(uath_devs, v, p)) 135 136 void uath_attachhook(void *); 137 int uath_open_pipes(struct uath_softc *); 138 void uath_close_pipes(struct uath_softc *); 139 int uath_alloc_tx_data_list(struct uath_softc *); 140 void uath_free_tx_data_list(struct uath_softc *); 141 int uath_alloc_rx_data_list(struct uath_softc *); 142 void uath_free_rx_data_list(struct uath_softc *); 143 int uath_alloc_tx_cmd_list(struct uath_softc *); 144 void uath_free_tx_cmd_list(struct uath_softc *); 145 int uath_alloc_rx_cmd_list(struct uath_softc *); 146 void uath_free_rx_cmd_list(struct uath_softc *); 147 int uath_media_change(struct ifnet *); 148 void uath_stat(void *); 149 void uath_next_scan(void *); 150 void uath_task(void *); 151 int uath_newstate(struct ieee80211com *, enum ieee80211_state, int); 152 #ifdef UATH_DEBUG 153 void uath_dump_cmd(const uint8_t *, int, char); 154 #endif 155 int uath_cmd(struct uath_softc *, uint32_t, const void *, int, void *, 156 int); 157 int uath_cmd_write(struct uath_softc *, uint32_t, const void *, int, int); 158 int uath_cmd_read(struct uath_softc *, uint32_t, const void *, int, void *, 159 int); 160 int uath_write_reg(struct uath_softc *, uint32_t, uint32_t); 161 int uath_write_multi(struct uath_softc *, uint32_t, const void *, int); 162 int uath_read_reg(struct uath_softc *, uint32_t, uint32_t *); 163 int uath_read_eeprom(struct uath_softc *, uint32_t, void *); 164 void uath_cmd_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status); 165 void uath_data_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status); 166 void uath_data_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status); 167 int uath_tx_null(struct uath_softc *); 168 int uath_tx_data(struct uath_softc *, struct mbuf *, 169 struct ieee80211_node *); 170 void uath_start(struct ifnet *); 171 void uath_watchdog(struct ifnet *); 172 int uath_ioctl(struct ifnet *, u_long, caddr_t); 173 int uath_query_eeprom(struct uath_softc *); 174 int uath_reset(struct uath_softc *); 175 int uath_reset_tx_queues(struct uath_softc *); 176 int uath_wme_init(struct uath_softc *); 177 int uath_set_chan(struct uath_softc *, struct ieee80211_channel *); 178 int uath_set_key(struct uath_softc *, const struct ieee80211_key *, int); 179 int uath_set_keys(struct uath_softc *); 180 int uath_set_rates(struct uath_softc *, const struct ieee80211_rateset *); 181 int uath_set_rxfilter(struct uath_softc *, uint32_t, uint32_t); 182 int uath_set_led(struct uath_softc *, int, int); 183 int uath_switch_channel(struct uath_softc *, struct ieee80211_channel *); 184 int uath_init(struct ifnet *); 185 void uath_stop(struct ifnet *, int); 186 int uath_loadfirmware(struct uath_softc *, const u_char *, int); 187 int uath_activate(struct device *, int); 188 189 int uath_match(struct device *, void *, void *); 190 void uath_attach(struct device *, struct device *, void *); 191 int uath_detach(struct device *, int); 192 int uath_activate(struct device *, int); 193 194 struct cfdriver uath_cd = { 195 NULL, "uath", DV_DULL 196 }; 197 198 const struct cfattach uath_ca = { 199 sizeof(struct uath_softc), 200 uath_match, 201 uath_attach, 202 uath_detach, 203 uath_activate, 204 }; 205 206 int 207 uath_match(struct device *parent, void *match, void *aux) 208 { 209 struct usb_attach_arg *uaa = aux; 210 211 if (uaa->iface != NULL) 212 return UMATCH_NONE; 213 214 return (uath_lookup(uaa->vendor, uaa->product) != NULL) ? 215 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 216 } 217 218 void 219 uath_attachhook(void *xsc) 220 { 221 struct uath_softc *sc = xsc; 222 u_char *fw; 223 size_t size; 224 int error; 225 226 if ((error = loadfirmware("uath-ar5523", &fw, &size)) != 0) { 227 printf("%s: error %d, could not read firmware %s\n", 228 sc->sc_dev.dv_xname, error, "uath-ar5523"); 229 return; 230 } 231 232 error = uath_loadfirmware(sc, fw, size); 233 free(fw, M_DEVBUF); 234 235 if (error == 0) { 236 usb_port_status_t status; 237 238 /* 239 * Hack alert: the device doesn't always gracefully detach 240 * from the bus after a firmware upload. We need to force 241 * a port reset and a re-exploration on the parent hub. 242 */ 243 usbd_reset_port(sc->sc_uhub, sc->sc_port, &status); 244 usb_needs_reattach(sc->sc_udev); 245 } else { 246 printf("%s: could not load firmware (error=%s)\n", 247 sc->sc_dev.dv_xname, usbd_errstr(error)); 248 } 249 } 250 251 void 252 uath_attach(struct device *parent, struct device *self, void *aux) 253 { 254 struct uath_softc *sc = (struct uath_softc *)self; 255 struct usb_attach_arg *uaa = aux; 256 struct ieee80211com *ic = &sc->sc_ic; 257 struct ifnet *ifp = &ic->ic_if; 258 usbd_status error; 259 int i; 260 261 sc->sc_udev = uaa->device; 262 sc->sc_uhub = uaa->device->myhub; 263 sc->sc_port = uaa->port; 264 265 sc->sc_flags = uath_lookup(uaa->vendor, uaa->product)->flags; 266 267 if (usbd_set_config_no(sc->sc_udev, UATH_CONFIG_NO, 0) != 0) { 268 printf("%s: could not set configuration no\n", 269 sc->sc_dev.dv_xname); 270 return; 271 } 272 273 /* get the first interface handle */ 274 error = usbd_device2interface_handle(sc->sc_udev, UATH_IFACE_INDEX, 275 &sc->sc_iface); 276 if (error != 0) { 277 printf("%s: could not get interface handle\n", 278 sc->sc_dev.dv_xname); 279 return; 280 } 281 282 /* 283 * We must open the pipes early because they're used to upload the 284 * firmware (pre-firmware devices) or to send firmware commands. 285 */ 286 if (uath_open_pipes(sc) != 0) { 287 printf("%s: could not open pipes\n", sc->sc_dev.dv_xname); 288 return; 289 } 290 291 if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) { 292 if (rootvp == NULL) 293 mountroothook_establish(uath_attachhook, sc); 294 else 295 uath_attachhook(sc); 296 return; 297 } 298 299 /* 300 * Only post-firmware devices here. 301 */ 302 usb_init_task(&sc->sc_task, uath_task, sc); 303 timeout_set(&sc->scan_to, uath_next_scan, sc); 304 timeout_set(&sc->stat_to, uath_stat, sc); 305 306 /* 307 * Allocate xfers for firmware commands. 308 */ 309 if (uath_alloc_tx_cmd_list(sc) != 0) { 310 printf("%s: could not allocate Tx command list\n", 311 sc->sc_dev.dv_xname); 312 goto fail1; 313 } 314 if (uath_alloc_rx_cmd_list(sc) != 0) { 315 printf("%s: could not allocate Rx command list\n", 316 sc->sc_dev.dv_xname); 317 goto fail2; 318 } 319 320 /* 321 * Queue Rx command xfers. 322 */ 323 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) { 324 struct uath_rx_cmd *cmd = &sc->rx_cmd[i]; 325 326 usbd_setup_xfer(cmd->xfer, sc->cmd_rx_pipe, cmd, cmd->buf, 327 UATH_MAX_RXCMDSZ, USBD_SHORT_XFER_OK | USBD_NO_COPY, 328 USBD_NO_TIMEOUT, uath_cmd_rxeof); 329 error = usbd_transfer(cmd->xfer); 330 if (error != USBD_IN_PROGRESS && error != 0) { 331 printf("%s: could not queue Rx command xfer\n", 332 sc->sc_dev.dv_xname); 333 goto fail3; 334 } 335 } 336 337 /* 338 * We're now ready to send/receive firmware commands. 339 */ 340 if (uath_reset(sc) != 0) { 341 printf("%s: could not initialize adapter\n", 342 sc->sc_dev.dv_xname); 343 goto fail3; 344 } 345 if (uath_query_eeprom(sc) != 0) { 346 printf("%s: could not read EEPROM\n", sc->sc_dev.dv_xname); 347 goto fail3; 348 } 349 350 printf("%s: MAC/BBP AR5523, RF AR%c112, address %s\n", 351 sc->sc_dev.dv_xname, (sc->sc_flags & UATH_FLAG_ABG) ? '5': '2', 352 ether_sprintf(ic->ic_myaddr)); 353 354 /* 355 * Allocate xfers for Tx/Rx data pipes. 356 */ 357 if (uath_alloc_tx_data_list(sc) != 0) { 358 printf("%s: could not allocate Tx data list\n", 359 sc->sc_dev.dv_xname); 360 goto fail3; 361 } 362 if (uath_alloc_rx_data_list(sc) != 0) { 363 printf("%s: could not allocate Rx data list\n", 364 sc->sc_dev.dv_xname); 365 goto fail4; 366 } 367 368 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 369 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 370 ic->ic_state = IEEE80211_S_INIT; 371 372 /* set device capabilities */ 373 ic->ic_caps = 374 IEEE80211_C_MONITOR | /* monitor mode supported */ 375 IEEE80211_C_TXPMGT | /* tx power management */ 376 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 377 IEEE80211_C_SHSLOT | /* short slot time supported */ 378 IEEE80211_C_WEP; /* h/w WEP */ 379 380 /* set supported .11b and .11g rates */ 381 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 382 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 383 384 /* set supported .11b and .11g channels (1 through 14) */ 385 for (i = 1; i <= 14; i++) { 386 ic->ic_channels[i].ic_freq = 387 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 388 ic->ic_channels[i].ic_flags = 389 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 390 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 391 } 392 393 ifp->if_softc = sc; 394 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 395 ifp->if_init = uath_init; 396 ifp->if_ioctl = uath_ioctl; 397 ifp->if_start = uath_start; 398 ifp->if_watchdog = uath_watchdog; 399 IFQ_SET_READY(&ifp->if_snd); 400 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 401 402 if_attach(ifp); 403 ieee80211_ifattach(ifp); 404 405 /* override state transition machine */ 406 sc->sc_newstate = ic->ic_newstate; 407 ic->ic_newstate = uath_newstate; 408 ieee80211_media_init(ifp, uath_media_change, ieee80211_media_status); 409 410 #if NBPFILTER > 0 411 bpfattach(&sc->sc_drvbpf, ifp, DLT_IEEE802_11_RADIO, 412 sizeof (struct ieee80211_frame) + IEEE80211_RADIOTAP_HDRLEN); 413 414 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 415 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 416 sc->sc_rxtap.wr_ihdr.it_present = htole32(UATH_RX_RADIOTAP_PRESENT); 417 418 sc->sc_txtap_len = sizeof sc->sc_txtapu; 419 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 420 sc->sc_txtap.wt_ihdr.it_present = htole32(UATH_TX_RADIOTAP_PRESENT); 421 #endif 422 423 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 424 &sc->sc_dev); 425 426 return; 427 428 fail4: uath_free_tx_data_list(sc); 429 fail3: uath_free_rx_cmd_list(sc); 430 fail2: uath_free_tx_cmd_list(sc); 431 fail1: uath_close_pipes(sc); 432 } 433 434 int 435 uath_detach(struct device *self, int flags) 436 { 437 struct uath_softc *sc = (struct uath_softc *)self; 438 struct ifnet *ifp = &sc->sc_ic.ic_if; 439 int s; 440 441 s = splnet(); 442 443 if (sc->sc_flags & UATH_FLAG_PRE_FIRMWARE) { 444 uath_close_pipes(sc); 445 splx(s); 446 return 0; 447 } 448 449 /* post-firmware device */ 450 451 usb_rem_task(sc->sc_udev, &sc->sc_task); 452 timeout_del(&sc->scan_to); 453 timeout_del(&sc->stat_to); 454 455 /* abort and free xfers */ 456 uath_free_tx_data_list(sc); 457 uath_free_rx_data_list(sc); 458 uath_free_tx_cmd_list(sc); 459 uath_free_rx_cmd_list(sc); 460 461 /* close Tx/Rx pipes */ 462 uath_close_pipes(sc); 463 464 ieee80211_ifdetach(ifp); /* free all nodes */ 465 if_detach(ifp); 466 467 splx(s); 468 469 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 470 &sc->sc_dev); 471 472 return 0; 473 } 474 475 int 476 uath_open_pipes(struct uath_softc *sc) 477 { 478 int error; 479 480 /* 481 * XXX pipes numbers are hardcoded because we don't have any way 482 * to distinguish the data pipes from the firmware command pipes 483 * (both are bulk pipes) using the endpoints descriptors. 484 */ 485 error = usbd_open_pipe(sc->sc_iface, 0x01, USBD_EXCLUSIVE_USE, 486 &sc->cmd_tx_pipe); 487 if (error != 0) { 488 printf("%s: could not open Tx command pipe: %s\n", 489 sc->sc_dev.dv_xname, usbd_errstr(error)); 490 goto fail; 491 } 492 493 error = usbd_open_pipe(sc->sc_iface, 0x02, USBD_EXCLUSIVE_USE, 494 &sc->data_tx_pipe); 495 if (error != 0) { 496 printf("%s: could not open Tx data pipe: %s\n", 497 sc->sc_dev.dv_xname, usbd_errstr(error)); 498 goto fail; 499 } 500 501 error = usbd_open_pipe(sc->sc_iface, 0x81, USBD_EXCLUSIVE_USE, 502 &sc->cmd_rx_pipe); 503 if (error != 0) { 504 printf("%s: could not open Rx command pipe: %s\n", 505 sc->sc_dev.dv_xname, usbd_errstr(error)); 506 goto fail; 507 } 508 509 error = usbd_open_pipe(sc->sc_iface, 0x82, USBD_EXCLUSIVE_USE, 510 &sc->data_rx_pipe); 511 if (error != 0) { 512 printf("%s: could not open Rx data pipe: %s\n", 513 sc->sc_dev.dv_xname, usbd_errstr(error)); 514 goto fail; 515 } 516 517 return 0; 518 519 fail: uath_close_pipes(sc); 520 return error; 521 } 522 523 void 524 uath_close_pipes(struct uath_softc *sc) 525 { 526 /* assumes no transfers are pending on the pipes */ 527 528 if (sc->data_tx_pipe != NULL) 529 usbd_close_pipe(sc->data_tx_pipe); 530 531 if (sc->data_rx_pipe != NULL) 532 usbd_close_pipe(sc->data_rx_pipe); 533 534 if (sc->cmd_tx_pipe != NULL) 535 usbd_close_pipe(sc->cmd_tx_pipe); 536 537 if (sc->cmd_rx_pipe != NULL) 538 usbd_close_pipe(sc->cmd_rx_pipe); 539 } 540 541 int 542 uath_alloc_tx_data_list(struct uath_softc *sc) 543 { 544 int i, error; 545 546 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) { 547 struct uath_tx_data *data = &sc->tx_data[i]; 548 549 data->sc = sc; /* backpointer for callbacks */ 550 551 data->xfer = usbd_alloc_xfer(sc->sc_udev); 552 if (data->xfer == NULL) { 553 printf("%s: could not allocate xfer\n", 554 sc->sc_dev.dv_xname); 555 error = ENOMEM; 556 goto fail; 557 } 558 data->buf = usbd_alloc_buffer(data->xfer, UATH_MAX_TXBUFSZ); 559 if (data->buf == NULL) { 560 printf("%s: could not allocate xfer buffer\n", 561 sc->sc_dev.dv_xname); 562 error = ENOMEM; 563 goto fail; 564 } 565 } 566 return 0; 567 568 fail: uath_free_tx_data_list(sc); 569 return error; 570 } 571 572 void 573 uath_free_tx_data_list(struct uath_softc *sc) 574 { 575 int i; 576 577 /* make sure no transfers are pending */ 578 usbd_abort_pipe(sc->data_tx_pipe); 579 580 for (i = 0; i < UATH_TX_DATA_LIST_COUNT; i++) 581 if (sc->tx_data[i].xfer != NULL) 582 usbd_free_xfer(sc->tx_data[i].xfer); 583 } 584 585 int 586 uath_alloc_rx_data_list(struct uath_softc *sc) 587 { 588 int i, error; 589 590 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 591 struct uath_rx_data *data = &sc->rx_data[i]; 592 593 data->sc = sc; /* backpointer for callbacks */ 594 595 data->xfer = usbd_alloc_xfer(sc->sc_udev); 596 if (data->xfer == NULL) { 597 printf("%s: could not allocate xfer\n", 598 sc->sc_dev.dv_xname); 599 error = ENOMEM; 600 goto fail; 601 } 602 if (usbd_alloc_buffer(data->xfer, sc->rxbufsz) == NULL) { 603 printf("%s: could not allocate xfer buffer\n", 604 sc->sc_dev.dv_xname); 605 error = ENOMEM; 606 goto fail; 607 } 608 609 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 610 if (data->m == NULL) { 611 printf("%s: could not allocate rx mbuf\n", 612 sc->sc_dev.dv_xname); 613 error = ENOMEM; 614 goto fail; 615 } 616 MCLGET(data->m, M_DONTWAIT); 617 if (!(data->m->m_flags & M_EXT)) { 618 printf("%s: could not allocate rx mbuf cluster\n", 619 sc->sc_dev.dv_xname); 620 error = ENOMEM; 621 goto fail; 622 } 623 624 data->buf = mtod(data->m, uint8_t *); 625 } 626 return 0; 627 628 fail: uath_free_rx_data_list(sc); 629 return error; 630 } 631 632 void 633 uath_free_rx_data_list(struct uath_softc *sc) 634 { 635 int i; 636 637 /* make sure no transfers are pending */ 638 usbd_abort_pipe(sc->data_rx_pipe); 639 640 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 641 struct uath_rx_data *data = &sc->rx_data[i]; 642 643 if (data->xfer != NULL) 644 usbd_free_xfer(data->xfer); 645 646 if (data->m != NULL) 647 m_freem(data->m); 648 } 649 } 650 651 int 652 uath_alloc_tx_cmd_list(struct uath_softc *sc) 653 { 654 int i, error; 655 656 for (i = 0; i < UATH_TX_CMD_LIST_COUNT; i++) { 657 struct uath_tx_cmd *cmd = &sc->tx_cmd[i]; 658 659 cmd->sc = sc; /* backpointer for callbacks */ 660 661 cmd->xfer = usbd_alloc_xfer(sc->sc_udev); 662 if (cmd->xfer == NULL) { 663 printf("%s: could not allocate xfer\n", 664 sc->sc_dev.dv_xname); 665 error = ENOMEM; 666 goto fail; 667 } 668 cmd->buf = usbd_alloc_buffer(cmd->xfer, UATH_MAX_TXCMDSZ); 669 if (cmd->buf == NULL) { 670 printf("%s: could not allocate xfer buffer\n", 671 sc->sc_dev.dv_xname); 672 error = ENOMEM; 673 goto fail; 674 } 675 } 676 return 0; 677 678 fail: uath_free_tx_cmd_list(sc); 679 return error; 680 } 681 682 void 683 uath_free_tx_cmd_list(struct uath_softc *sc) 684 { 685 int i; 686 687 /* make sure no transfers are pending */ 688 usbd_abort_pipe(sc->cmd_tx_pipe); 689 690 for (i = 0; i < UATH_TX_CMD_LIST_COUNT; i++) 691 if (sc->tx_cmd[i].xfer != NULL) 692 usbd_free_xfer(sc->tx_cmd[i].xfer); 693 } 694 695 int 696 uath_alloc_rx_cmd_list(struct uath_softc *sc) 697 { 698 int i, error; 699 700 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) { 701 struct uath_rx_cmd *cmd = &sc->rx_cmd[i]; 702 703 cmd->sc = sc; /* backpointer for callbacks */ 704 705 cmd->xfer = usbd_alloc_xfer(sc->sc_udev); 706 if (cmd->xfer == NULL) { 707 printf("%s: could not allocate xfer\n", 708 sc->sc_dev.dv_xname); 709 error = ENOMEM; 710 goto fail; 711 } 712 cmd->buf = usbd_alloc_buffer(cmd->xfer, UATH_MAX_RXCMDSZ); 713 if (cmd->buf == NULL) { 714 printf("%s: could not allocate xfer buffer\n", 715 sc->sc_dev.dv_xname); 716 error = ENOMEM; 717 goto fail; 718 } 719 } 720 return 0; 721 722 fail: uath_free_rx_cmd_list(sc); 723 return error; 724 } 725 726 void 727 uath_free_rx_cmd_list(struct uath_softc *sc) 728 { 729 int i; 730 731 /* make sure no transfers are pending */ 732 usbd_abort_pipe(sc->cmd_rx_pipe); 733 734 for (i = 0; i < UATH_RX_CMD_LIST_COUNT; i++) 735 if (sc->rx_cmd[i].xfer != NULL) 736 usbd_free_xfer(sc->rx_cmd[i].xfer); 737 } 738 739 int 740 uath_media_change(struct ifnet *ifp) 741 { 742 int error; 743 744 error = ieee80211_media_change(ifp); 745 if (error != ENETRESET) 746 return error; 747 748 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 749 uath_init(ifp); 750 751 return 0; 752 } 753 754 /* 755 * This function is called periodically (every second) when associated to 756 * query device statistics. 757 */ 758 void 759 uath_stat(void *arg) 760 { 761 struct uath_softc *sc = arg; 762 int error; 763 764 /* 765 * Send request for statistics asynchronously. The timer will be 766 * restarted when we'll get the stats notification. 767 */ 768 error = uath_cmd_write(sc, UATH_CMD_STATS, NULL, 0, 769 UATH_CMD_FLAG_ASYNC); 770 if (error != 0) { 771 printf("%s: could not query statistics (error=%d)\n", 772 sc->sc_dev.dv_xname, error); 773 } 774 } 775 776 /* 777 * This function is called periodically (every 250ms) during scanning to 778 * switch from one channel to another. 779 */ 780 void 781 uath_next_scan(void *arg) 782 { 783 struct uath_softc *sc = arg; 784 struct ieee80211com *ic = &sc->sc_ic; 785 struct ifnet *ifp = &ic->ic_if; 786 787 if (ic->ic_state == IEEE80211_S_SCAN) 788 ieee80211_next_scan(ifp); 789 } 790 791 void 792 uath_task(void *arg) 793 { 794 struct uath_softc *sc = arg; 795 struct ieee80211com *ic = &sc->sc_ic; 796 enum ieee80211_state ostate; 797 798 ostate = ic->ic_state; 799 800 switch (sc->sc_state) { 801 case IEEE80211_S_INIT: 802 if (ostate == IEEE80211_S_RUN) { 803 /* turn link and activity LEDs off */ 804 (void)uath_set_led(sc, UATH_LED_LINK, 0); 805 (void)uath_set_led(sc, UATH_LED_ACTIVITY, 0); 806 } 807 break; 808 809 case IEEE80211_S_SCAN: 810 if (uath_switch_channel(sc, ic->ic_bss->ni_chan) != 0) { 811 printf("%s: could not switch channel\n", 812 sc->sc_dev.dv_xname); 813 break; 814 } 815 timeout_add_msec(&sc->scan_to, 250); 816 break; 817 818 case IEEE80211_S_AUTH: 819 { 820 struct ieee80211_node *ni = ic->ic_bss; 821 struct uath_cmd_bssid bssid; 822 struct uath_cmd_0b cmd0b; 823 struct uath_cmd_0c cmd0c; 824 825 if (uath_switch_channel(sc, ni->ni_chan) != 0) { 826 printf("%s: could not switch channel\n", 827 sc->sc_dev.dv_xname); 828 break; 829 } 830 831 (void)uath_cmd_write(sc, UATH_CMD_24, NULL, 0, 0); 832 833 bzero(&bssid, sizeof bssid); 834 bssid.len = htobe32(IEEE80211_ADDR_LEN); 835 IEEE80211_ADDR_COPY(bssid.bssid, ni->ni_bssid); 836 (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid, 837 sizeof bssid, 0); 838 839 bzero(&cmd0b, sizeof cmd0b); 840 cmd0b.code = htobe32(2); 841 cmd0b.size = htobe32(sizeof (cmd0b.data)); 842 (void)uath_cmd_write(sc, UATH_CMD_0B, &cmd0b, sizeof cmd0b, 0); 843 844 bzero(&cmd0c, sizeof cmd0c); 845 cmd0c.magic1 = htobe32(2); 846 cmd0c.magic2 = htobe32(7); 847 cmd0c.magic3 = htobe32(1); 848 (void)uath_cmd_write(sc, UATH_CMD_0C, &cmd0c, sizeof cmd0c, 0); 849 850 if (uath_set_rates(sc, &ni->ni_rates) != 0) { 851 printf("%s: could not set negotiated rate set\n", 852 sc->sc_dev.dv_xname); 853 break; 854 } 855 break; 856 } 857 858 case IEEE80211_S_ASSOC: 859 break; 860 861 case IEEE80211_S_RUN: 862 { 863 struct ieee80211_node *ni = ic->ic_bss; 864 struct uath_cmd_bssid bssid; 865 struct uath_cmd_xled xled; 866 uint32_t val; 867 868 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 869 /* make both LEDs blink while monitoring */ 870 bzero(&xled, sizeof xled); 871 xled.which = htobe32(0); 872 xled.rate = htobe32(1); 873 xled.mode = htobe32(2); 874 (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, 875 sizeof xled, 0); 876 break; 877 } 878 879 /* 880 * Tx rate is controlled by firmware, report the maximum 881 * negotiated rate in ifconfig output. 882 */ 883 ni->ni_txrate = ni->ni_rates.rs_nrates - 1; 884 885 val = htobe32(1); 886 (void)uath_cmd_write(sc, UATH_CMD_2E, &val, sizeof val, 0); 887 888 bzero(&bssid, sizeof bssid); 889 bssid.flags1 = htobe32(0xc004); 890 bssid.flags2 = htobe32(0x003b); 891 bssid.len = htobe32(IEEE80211_ADDR_LEN); 892 IEEE80211_ADDR_COPY(bssid.bssid, ni->ni_bssid); 893 (void)uath_cmd_write(sc, UATH_CMD_SET_BSSID, &bssid, 894 sizeof bssid, 0); 895 896 /* turn link LED on */ 897 (void)uath_set_led(sc, UATH_LED_LINK, 1); 898 899 /* make activity LED blink */ 900 bzero(&xled, sizeof xled); 901 xled.which = htobe32(1); 902 xled.rate = htobe32(1); 903 xled.mode = htobe32(2); 904 (void)uath_cmd_write(sc, UATH_CMD_SET_XLED, &xled, sizeof xled, 905 0); 906 907 /* set state to associated */ 908 val = htobe32(1); 909 (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 910 0); 911 912 /* start statistics timer */ 913 timeout_add_sec(&sc->stat_to, 1); 914 break; 915 } 916 } 917 sc->sc_newstate(ic, sc->sc_state, sc->sc_arg); 918 } 919 920 int 921 uath_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 922 { 923 struct uath_softc *sc = ic->ic_softc; 924 925 usb_rem_task(sc->sc_udev, &sc->sc_task); 926 timeout_del(&sc->scan_to); 927 timeout_del(&sc->stat_to); 928 929 /* do it in a process context */ 930 sc->sc_state = nstate; 931 sc->sc_arg = arg; 932 usb_add_task(sc->sc_udev, &sc->sc_task); 933 return 0; 934 } 935 936 #ifdef UATH_DEBUG 937 void 938 uath_dump_cmd(const uint8_t *buf, int len, char prefix) 939 { 940 int i; 941 942 for (i = 0; i < len; i++) { 943 if ((i % 16) == 0) 944 printf("\n%c ", prefix); 945 else if ((i % 4) == 0) 946 printf(" "); 947 printf("%02x", buf[i]); 948 } 949 printf("\n"); 950 } 951 #endif 952 953 /* 954 * Low-level function to send read or write commands to the firmware. 955 */ 956 int 957 uath_cmd(struct uath_softc *sc, uint32_t code, const void *idata, int ilen, 958 void *odata, int flags) 959 { 960 struct uath_cmd_hdr *hdr; 961 struct uath_tx_cmd *cmd; 962 uint16_t xferflags; 963 int s, xferlen, error; 964 965 /* grab a xfer */ 966 cmd = &sc->tx_cmd[sc->cmd_idx]; 967 968 /* always bulk-out a multiple of 4 bytes */ 969 xferlen = (sizeof (struct uath_cmd_hdr) + ilen + 3) & ~3; 970 971 hdr = (struct uath_cmd_hdr *)cmd->buf; 972 bzero(hdr, sizeof (struct uath_cmd_hdr)); 973 hdr->len = htobe32(xferlen); 974 hdr->code = htobe32(code); 975 hdr->priv = sc->cmd_idx; /* don't care about endianness */ 976 hdr->magic = htobe32((flags & UATH_CMD_FLAG_MAGIC) ? 1 << 24 : 0); 977 bcopy(idata, (uint8_t *)(hdr + 1), ilen); 978 979 #ifdef UATH_DEBUG 980 if (uath_debug >= 5) { 981 printf("sending command code=0x%02x flags=0x%x index=%u", 982 code, flags, sc->cmd_idx); 983 uath_dump_cmd(cmd->buf, xferlen, '+'); 984 } 985 #endif 986 xferflags = USBD_FORCE_SHORT_XFER | USBD_NO_COPY; 987 if (!(flags & UATH_CMD_FLAG_READ)) { 988 if (!(flags & UATH_CMD_FLAG_ASYNC)) 989 xferflags |= USBD_SYNCHRONOUS; 990 } else 991 s = splusb(); 992 993 cmd->odata = odata; 994 995 usbd_setup_xfer(cmd->xfer, sc->cmd_tx_pipe, cmd, cmd->buf, xferlen, 996 xferflags, UATH_CMD_TIMEOUT, NULL); 997 error = usbd_transfer(cmd->xfer); 998 if (error != USBD_IN_PROGRESS && error != 0) { 999 if (flags & UATH_CMD_FLAG_READ) 1000 splx(s); 1001 printf("%s: could not send command 0x%x (error=%s)\n", 1002 sc->sc_dev.dv_xname, code, usbd_errstr(error)); 1003 return error; 1004 } 1005 sc->cmd_idx = (sc->cmd_idx + 1) % UATH_TX_CMD_LIST_COUNT; 1006 1007 if (!(flags & UATH_CMD_FLAG_READ)) 1008 return 0; /* write: don't wait for reply */ 1009 1010 /* wait at most two seconds for command reply */ 1011 error = tsleep(cmd, PCATCH, "uathcmd", 2 * hz); 1012 cmd->odata = NULL; /* in case answer is received too late */ 1013 splx(s); 1014 if (error != 0) { 1015 printf("%s: timeout waiting for command reply\n", 1016 sc->sc_dev.dv_xname); 1017 } 1018 return error; 1019 } 1020 1021 int 1022 uath_cmd_write(struct uath_softc *sc, uint32_t code, const void *data, int len, 1023 int flags) 1024 { 1025 flags &= ~UATH_CMD_FLAG_READ; 1026 return uath_cmd(sc, code, data, len, NULL, flags); 1027 } 1028 1029 int 1030 uath_cmd_read(struct uath_softc *sc, uint32_t code, const void *idata, 1031 int ilen, void *odata, int flags) 1032 { 1033 flags |= UATH_CMD_FLAG_READ; 1034 return uath_cmd(sc, code, idata, ilen, odata, flags); 1035 } 1036 1037 int 1038 uath_write_reg(struct uath_softc *sc, uint32_t reg, uint32_t val) 1039 { 1040 struct uath_write_mac write; 1041 int error; 1042 1043 write.reg = htobe32(reg); 1044 write.len = htobe32(0); /* 0 = single write */ 1045 *(uint32_t *)write.data = htobe32(val); 1046 1047 error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write, 1048 3 * sizeof (uint32_t), 0); 1049 if (error != 0) { 1050 printf("%s: could not write register 0x%02x\n", 1051 sc->sc_dev.dv_xname, reg); 1052 } 1053 return error; 1054 } 1055 1056 int 1057 uath_write_multi(struct uath_softc *sc, uint32_t reg, const void *data, 1058 int len) 1059 { 1060 struct uath_write_mac write; 1061 int error; 1062 1063 write.reg = htobe32(reg); 1064 write.len = htobe32(len); 1065 bcopy(data, write.data, len); 1066 1067 /* properly handle the case where len is zero (reset) */ 1068 error = uath_cmd_write(sc, UATH_CMD_WRITE_MAC, &write, 1069 (len == 0) ? sizeof (uint32_t) : 2 * sizeof (uint32_t) + len, 0); 1070 if (error != 0) { 1071 printf("%s: could not write %d bytes to register 0x%02x\n", 1072 sc->sc_dev.dv_xname, len, reg); 1073 } 1074 return error; 1075 } 1076 1077 int 1078 uath_read_reg(struct uath_softc *sc, uint32_t reg, uint32_t *val) 1079 { 1080 struct uath_read_mac read; 1081 int error; 1082 1083 reg = htobe32(reg); 1084 error = uath_cmd_read(sc, UATH_CMD_READ_MAC, ®, sizeof reg, &read, 1085 0); 1086 if (error != 0) { 1087 printf("%s: could not read register 0x%02x\n", 1088 sc->sc_dev.dv_xname, betoh32(reg)); 1089 return error; 1090 } 1091 *val = betoh32(*(uint32_t *)read.data); 1092 return error; 1093 } 1094 1095 int 1096 uath_read_eeprom(struct uath_softc *sc, uint32_t reg, void *odata) 1097 { 1098 struct uath_read_mac read; 1099 int len, error; 1100 1101 reg = htobe32(reg); 1102 error = uath_cmd_read(sc, UATH_CMD_READ_EEPROM, ®, sizeof reg, 1103 &read, 0); 1104 if (error != 0) { 1105 printf("%s: could not read EEPROM offset 0x%02x\n", 1106 sc->sc_dev.dv_xname, betoh32(reg)); 1107 return error; 1108 } 1109 len = betoh32(read.len); 1110 bcopy(read.data, odata, (len == 0) ? sizeof (uint32_t) : len); 1111 return error; 1112 } 1113 1114 void 1115 uath_cmd_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, 1116 usbd_status status) 1117 { 1118 struct uath_rx_cmd *cmd = priv; 1119 struct uath_softc *sc = cmd->sc; 1120 struct uath_cmd_hdr *hdr; 1121 1122 if (status != USBD_NORMAL_COMPLETION) { 1123 if (status == USBD_STALLED) 1124 usbd_clear_endpoint_stall_async(sc->cmd_rx_pipe); 1125 return; 1126 } 1127 1128 hdr = (struct uath_cmd_hdr *)cmd->buf; 1129 1130 #ifdef UATH_DEBUG 1131 if (uath_debug >= 5) { 1132 printf("received command code=0x%x index=%u len=%u", 1133 betoh32(hdr->code), hdr->priv, betoh32(hdr->len)); 1134 uath_dump_cmd(cmd->buf, betoh32(hdr->len), '-'); 1135 } 1136 #endif 1137 1138 switch (betoh32(hdr->code) & 0xff) { 1139 /* reply to a read command */ 1140 default: 1141 { 1142 struct uath_tx_cmd *txcmd = &sc->tx_cmd[hdr->priv]; 1143 1144 if (txcmd->odata != NULL) { 1145 /* copy answer into caller's supplied buffer */ 1146 bcopy((uint8_t *)(hdr + 1), txcmd->odata, 1147 betoh32(hdr->len) - sizeof (struct uath_cmd_hdr)); 1148 } 1149 wakeup(txcmd); /* wake up caller */ 1150 break; 1151 } 1152 /* spontaneous firmware notifications */ 1153 case UATH_NOTIF_READY: 1154 DPRINTF(("received device ready notification\n")); 1155 wakeup(UATH_COND_INIT(sc)); 1156 break; 1157 1158 case UATH_NOTIF_TX: 1159 /* this notification is sent when UATH_TX_NOTIFY is set */ 1160 DPRINTF(("received Tx notification\n")); 1161 break; 1162 1163 case UATH_NOTIF_STATS: 1164 DPRINTFN(2, ("received device statistics\n")); 1165 timeout_add_sec(&sc->stat_to, 1); 1166 break; 1167 } 1168 1169 /* setup a new transfer */ 1170 usbd_setup_xfer(xfer, sc->cmd_rx_pipe, cmd, cmd->buf, UATH_MAX_RXCMDSZ, 1171 USBD_SHORT_XFER_OK | USBD_NO_COPY, USBD_NO_TIMEOUT, 1172 uath_cmd_rxeof); 1173 (void)usbd_transfer(xfer); 1174 } 1175 1176 void 1177 uath_data_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, 1178 usbd_status status) 1179 { 1180 struct uath_rx_data *data = priv; 1181 struct uath_softc *sc = data->sc; 1182 struct ieee80211com *ic = &sc->sc_ic; 1183 struct ifnet *ifp = &ic->ic_if; 1184 struct ieee80211_frame *wh; 1185 struct ieee80211_rxinfo rxi; 1186 struct ieee80211_node *ni; 1187 struct uath_rx_desc *desc; 1188 struct mbuf *mnew, *m; 1189 uint32_t hdr; 1190 int s, len; 1191 1192 if (status != USBD_NORMAL_COMPLETION) { 1193 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1194 return; 1195 1196 if (status == USBD_STALLED) 1197 usbd_clear_endpoint_stall_async(sc->data_rx_pipe); 1198 1199 ifp->if_ierrors++; 1200 return; 1201 } 1202 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 1203 1204 if (len < UATH_MIN_RXBUFSZ) { 1205 DPRINTF(("wrong xfer size (len=%d)\n", len)); 1206 ifp->if_ierrors++; 1207 goto skip; 1208 } 1209 1210 hdr = betoh32(*(uint32_t *)data->buf); 1211 1212 /* Rx descriptor is located at the end, 32-bit aligned */ 1213 desc = (struct uath_rx_desc *) 1214 (data->buf + len - sizeof (struct uath_rx_desc)); 1215 1216 if (betoh32(desc->len) > sc->rxbufsz) { 1217 DPRINTF(("bad descriptor (len=%d)\n", betoh32(desc->len))); 1218 ifp->if_ierrors++; 1219 goto skip; 1220 } 1221 1222 /* there's probably a "bad CRC" flag somewhere in the descriptor.. */ 1223 1224 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1225 if (mnew == NULL) { 1226 printf("%s: could not allocate rx mbuf\n", 1227 sc->sc_dev.dv_xname); 1228 ifp->if_ierrors++; 1229 goto skip; 1230 } 1231 MCLGET(mnew, M_DONTWAIT); 1232 if (!(mnew->m_flags & M_EXT)) { 1233 printf("%s: could not allocate rx mbuf cluster\n", 1234 sc->sc_dev.dv_xname); 1235 m_freem(mnew); 1236 ifp->if_ierrors++; 1237 goto skip; 1238 } 1239 1240 m = data->m; 1241 data->m = mnew; 1242 1243 /* finalize mbuf */ 1244 m->m_pkthdr.rcvif = ifp; 1245 m->m_data = data->buf + sizeof (uint32_t); 1246 m->m_pkthdr.len = m->m_len = betoh32(desc->len) - 1247 sizeof (struct uath_rx_desc) - IEEE80211_CRC_LEN; 1248 1249 data->buf = mtod(data->m, uint8_t *); 1250 1251 wh = mtod(m, struct ieee80211_frame *); 1252 rxi.rxi_flags = 0; 1253 if ((wh->i_fc[1] & IEEE80211_FC1_WEP) && 1254 ic->ic_opmode != IEEE80211_M_MONITOR) { 1255 /* 1256 * Hardware decrypts the frame itself but leaves the WEP bit 1257 * set in the 802.11 header and doesn't remove the IV and CRC 1258 * fields. 1259 */ 1260 wh->i_fc[1] &= ~IEEE80211_FC1_WEP; 1261 ovbcopy(wh, (caddr_t)wh + IEEE80211_WEP_IVLEN + 1262 IEEE80211_WEP_KIDLEN, sizeof (struct ieee80211_frame)); 1263 m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN); 1264 m_adj(m, -IEEE80211_WEP_CRCLEN); 1265 wh = mtod(m, struct ieee80211_frame *); 1266 1267 rxi.rxi_flags |= IEEE80211_RXI_HWDEC; 1268 } 1269 1270 #if NBPFILTER > 0 1271 /* there are a lot more fields in the Rx descriptor */ 1272 if (sc->sc_drvbpf != NULL) { 1273 struct mbuf mb; 1274 struct uath_rx_radiotap_header *tap = &sc->sc_rxtap; 1275 1276 tap->wr_flags = 0; 1277 tap->wr_chan_freq = htole16(betoh32(desc->freq)); 1278 tap->wr_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); 1279 tap->wr_dbm_antsignal = (int8_t)betoh32(desc->rssi); 1280 1281 mb.m_data = (caddr_t)tap; 1282 mb.m_len = sc->sc_rxtap_len; 1283 mb.m_next = m; 1284 mb.m_nextpkt = NULL; 1285 mb.m_type = 0; 1286 mb.m_flags = 0; 1287 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_IN); 1288 } 1289 #endif 1290 1291 s = splnet(); 1292 ni = ieee80211_find_rxnode(ic, wh); 1293 rxi.rxi_rssi = (int)betoh32(desc->rssi); 1294 rxi.rxi_tstamp = 0; /* unused */ 1295 ieee80211_input(ifp, m, ni, &rxi); 1296 1297 /* node is no longer needed */ 1298 ieee80211_release_node(ic, ni); 1299 splx(s); 1300 1301 skip: /* setup a new transfer */ 1302 usbd_setup_xfer(xfer, sc->data_rx_pipe, data, data->buf, sc->rxbufsz, 1303 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, uath_data_rxeof); 1304 (void)usbd_transfer(data->xfer); 1305 } 1306 1307 int 1308 uath_tx_null(struct uath_softc *sc) 1309 { 1310 struct uath_tx_data *data; 1311 struct uath_tx_desc *desc; 1312 1313 data = &sc->tx_data[sc->data_idx]; 1314 1315 data->ni = NULL; 1316 1317 *(uint32_t *)data->buf = UATH_MAKECTL(1, sizeof (struct uath_tx_desc)); 1318 desc = (struct uath_tx_desc *)(data->buf + sizeof (uint32_t)); 1319 1320 bzero(desc, sizeof (struct uath_tx_desc)); 1321 desc->len = htobe32(sizeof (struct uath_tx_desc)); 1322 desc->type = htobe32(UATH_TX_NULL); 1323 1324 usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, 1325 sizeof (uint32_t) + sizeof (struct uath_tx_desc), USBD_NO_COPY | 1326 USBD_FORCE_SHORT_XFER, UATH_DATA_TIMEOUT, NULL); 1327 if (usbd_sync_transfer(data->xfer) != 0) 1328 return EIO; 1329 1330 sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT; 1331 1332 return uath_cmd_write(sc, UATH_CMD_0F, NULL, 0, UATH_CMD_FLAG_ASYNC); 1333 } 1334 1335 void 1336 uath_data_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 1337 usbd_status status) 1338 { 1339 struct uath_tx_data *data = priv; 1340 struct uath_softc *sc = data->sc; 1341 struct ieee80211com *ic = &sc->sc_ic; 1342 struct ifnet *ifp = &ic->ic_if; 1343 int s; 1344 1345 if (status != USBD_NORMAL_COMPLETION) { 1346 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 1347 return; 1348 1349 printf("%s: could not transmit buffer: %s\n", 1350 sc->sc_dev.dv_xname, usbd_errstr(status)); 1351 1352 if (status == USBD_STALLED) 1353 usbd_clear_endpoint_stall_async(sc->data_tx_pipe); 1354 1355 ifp->if_oerrors++; 1356 return; 1357 } 1358 1359 s = splnet(); 1360 1361 ieee80211_release_node(ic, data->ni); 1362 data->ni = NULL; 1363 1364 sc->tx_queued--; 1365 ifp->if_opackets++; 1366 1367 sc->sc_tx_timer = 0; 1368 ifp->if_flags &= ~IFF_OACTIVE; 1369 uath_start(ifp); 1370 1371 splx(s); 1372 } 1373 1374 int 1375 uath_tx_data(struct uath_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1376 { 1377 struct ieee80211com *ic = &sc->sc_ic; 1378 struct uath_tx_data *data; 1379 struct uath_tx_desc *desc; 1380 const struct ieee80211_frame *wh; 1381 int paylen, totlen, xferlen, error; 1382 1383 data = &sc->tx_data[sc->data_idx]; 1384 desc = (struct uath_tx_desc *)(data->buf + sizeof (uint32_t)); 1385 1386 data->ni = ni; 1387 1388 #if NBPFILTER > 0 1389 if (sc->sc_drvbpf != NULL) { 1390 struct mbuf mb; 1391 struct uath_tx_radiotap_header *tap = &sc->sc_txtap; 1392 1393 tap->wt_flags = 0; 1394 tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq); 1395 tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags); 1396 1397 mb.m_data = (caddr_t)tap; 1398 mb.m_len = sc->sc_txtap_len; 1399 mb.m_next = m0; 1400 mb.m_nextpkt = NULL; 1401 mb.m_type = 0; 1402 mb.m_flags = 0; 1403 bpf_mtap(sc->sc_drvbpf, &mb, BPF_DIRECTION_OUT); 1404 } 1405 #endif 1406 1407 paylen = m0->m_pkthdr.len; 1408 xferlen = sizeof (uint32_t) + sizeof (struct uath_tx_desc) + paylen; 1409 1410 wh = mtod(m0, struct ieee80211_frame *); 1411 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1412 uint8_t *frm = (uint8_t *)(desc + 1); 1413 uint32_t iv; 1414 1415 /* h/w WEP: it's up to the host to fill the IV field */ 1416 bcopy(wh, frm, sizeof (struct ieee80211_frame)); 1417 frm += sizeof (struct ieee80211_frame); 1418 1419 /* insert IV: code copied from net80211 */ 1420 iv = (ic->ic_iv != 0) ? ic->ic_iv : arc4random(); 1421 if (iv >= 0x03ff00 && (iv & 0xf8ff00) == 0x00ff00) 1422 iv += 0x000100; 1423 ic->ic_iv = iv + 1; 1424 1425 *frm++ = iv & 0xff; 1426 *frm++ = (iv >> 8) & 0xff; 1427 *frm++ = (iv >> 16) & 0xff; 1428 *frm++ = ic->ic_wep_txkey << 6; 1429 1430 m_copydata(m0, sizeof (struct ieee80211_frame), 1431 m0->m_pkthdr.len - sizeof (struct ieee80211_frame), frm); 1432 1433 paylen += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; 1434 xferlen += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; 1435 totlen = xferlen + IEEE80211_WEP_CRCLEN; 1436 } else { 1437 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(desc + 1)); 1438 totlen = xferlen; 1439 } 1440 1441 /* fill Tx descriptor */ 1442 *(uint32_t *)data->buf = UATH_MAKECTL(1, xferlen - sizeof (uint32_t)); 1443 1444 desc->len = htobe32(totlen); 1445 desc->priv = sc->data_idx; /* don't care about endianness */ 1446 desc->paylen = htobe32(paylen); 1447 desc->type = htobe32(UATH_TX_DATA); 1448 desc->flags = htobe32(0); 1449 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1450 desc->dest = htobe32(UATH_ID_BROADCAST); 1451 desc->magic = htobe32(3); 1452 } else { 1453 desc->dest = htobe32(UATH_ID_BSS); 1454 desc->magic = htobe32(1); 1455 } 1456 1457 m_freem(m0); /* mbuf is no longer needed */ 1458 1459 #ifdef UATH_DEBUG 1460 if (uath_debug >= 6) { 1461 printf("sending frame index=%u len=%d xferlen=%d", 1462 sc->data_idx, paylen, xferlen); 1463 uath_dump_cmd(data->buf, xferlen, '+'); 1464 } 1465 #endif 1466 usbd_setup_xfer(data->xfer, sc->data_tx_pipe, data, data->buf, xferlen, 1467 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, UATH_DATA_TIMEOUT, 1468 uath_data_txeof); 1469 error = usbd_transfer(data->xfer); 1470 if (error != USBD_IN_PROGRESS && error != 0) { 1471 ic->ic_if.if_oerrors++; 1472 return error; 1473 } 1474 sc->data_idx = (sc->data_idx + 1) % UATH_TX_DATA_LIST_COUNT; 1475 sc->tx_queued++; 1476 1477 return 0; 1478 } 1479 1480 void 1481 uath_start(struct ifnet *ifp) 1482 { 1483 struct uath_softc *sc = ifp->if_softc; 1484 struct ieee80211com *ic = &sc->sc_ic; 1485 struct ieee80211_node *ni; 1486 struct mbuf *m0; 1487 1488 /* 1489 * net80211 may still try to send management frames even if the 1490 * IFF_RUNNING flag is not set... 1491 */ 1492 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1493 return; 1494 1495 for (;;) { 1496 IF_POLL(&ic->ic_mgtq, m0); 1497 if (m0 != NULL) { 1498 if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) { 1499 ifp->if_flags |= IFF_OACTIVE; 1500 break; 1501 } 1502 IF_DEQUEUE(&ic->ic_mgtq, m0); 1503 1504 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1505 m0->m_pkthdr.rcvif = NULL; 1506 #if NBPFILTER > 0 1507 if (ic->ic_rawbpf != NULL) 1508 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1509 #endif 1510 if (uath_tx_data(sc, m0, ni) != 0) 1511 break; 1512 } else { 1513 if (ic->ic_state != IEEE80211_S_RUN) 1514 break; 1515 IFQ_POLL(&ifp->if_snd, m0); 1516 if (m0 == NULL) 1517 break; 1518 if (sc->tx_queued >= UATH_TX_DATA_LIST_COUNT) { 1519 ifp->if_flags |= IFF_OACTIVE; 1520 break; 1521 } 1522 IFQ_DEQUEUE(&ifp->if_snd, m0); 1523 #if NBPFILTER > 0 1524 if (ifp->if_bpf != NULL) 1525 bpf_mtap(ifp->if_bpf, m0, BPF_DIRECTION_OUT); 1526 #endif 1527 m0 = ieee80211_encap(ifp, m0, &ni); 1528 if (m0 == NULL) 1529 continue; 1530 #if NBPFILTER > 0 1531 if (ic->ic_rawbpf != NULL) 1532 bpf_mtap(ic->ic_rawbpf, m0, BPF_DIRECTION_OUT); 1533 #endif 1534 if (uath_tx_data(sc, m0, ni) != 0) { 1535 if (ni != NULL) 1536 ieee80211_release_node(ic, ni); 1537 ifp->if_oerrors++; 1538 break; 1539 } 1540 } 1541 1542 sc->sc_tx_timer = 5; 1543 ifp->if_timer = 1; 1544 } 1545 } 1546 1547 void 1548 uath_watchdog(struct ifnet *ifp) 1549 { 1550 struct uath_softc *sc = ifp->if_softc; 1551 1552 ifp->if_timer = 0; 1553 1554 if (sc->sc_tx_timer > 0) { 1555 if (--sc->sc_tx_timer == 0) { 1556 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 1557 /*uath_init(ifp); XXX needs a process context! */ 1558 ifp->if_oerrors++; 1559 return; 1560 } 1561 ifp->if_timer = 1; 1562 } 1563 1564 ieee80211_watchdog(ifp); 1565 } 1566 1567 int 1568 uath_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1569 { 1570 struct uath_softc *sc = ifp->if_softc; 1571 struct ieee80211com *ic = &sc->sc_ic; 1572 struct ifaddr *ifa; 1573 struct ifreq *ifr; 1574 int s, error = 0; 1575 1576 s = splnet(); 1577 1578 switch (cmd) { 1579 case SIOCSIFADDR: 1580 ifa = (struct ifaddr *)data; 1581 ifp->if_flags |= IFF_UP; 1582 #ifdef INET 1583 if (ifa->ifa_addr->sa_family == AF_INET) 1584 arp_ifinit(&ic->ic_ac, ifa); 1585 #endif 1586 /* FALLTHROUGH */ 1587 case SIOCSIFFLAGS: 1588 if (ifp->if_flags & IFF_UP) { 1589 if (!(ifp->if_flags & IFF_RUNNING)) 1590 uath_init(ifp); 1591 } else { 1592 if (ifp->if_flags & IFF_RUNNING) 1593 uath_stop(ifp, 1); 1594 } 1595 break; 1596 1597 case SIOCADDMULTI: 1598 case SIOCDELMULTI: 1599 ifr = (struct ifreq *)data; 1600 error = (cmd == SIOCADDMULTI) ? 1601 ether_addmulti(ifr, &ic->ic_ac) : 1602 ether_delmulti(ifr, &ic->ic_ac); 1603 if (error == ENETRESET) 1604 error = 0; 1605 break; 1606 1607 default: 1608 error = ieee80211_ioctl(ifp, cmd, data); 1609 } 1610 1611 if (error == ENETRESET) { 1612 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1613 (IFF_UP | IFF_RUNNING)) 1614 uath_init(ifp); 1615 error = 0; 1616 } 1617 1618 splx(s); 1619 1620 return error; 1621 } 1622 1623 int 1624 uath_query_eeprom(struct uath_softc *sc) 1625 { 1626 uint32_t tmp; 1627 int error; 1628 1629 /* retrieve MAC address */ 1630 error = uath_read_eeprom(sc, UATH_EEPROM_MACADDR, sc->sc_ic.ic_myaddr); 1631 if (error != 0) { 1632 printf("%s: could not read MAC address\n", 1633 sc->sc_dev.dv_xname); 1634 return error; 1635 } 1636 1637 /* retrieve the maximum frame size that the hardware can receive */ 1638 error = uath_read_eeprom(sc, UATH_EEPROM_RXBUFSZ, &tmp); 1639 if (error != 0) { 1640 printf("%s: could not read maximum Rx buffer size\n", 1641 sc->sc_dev.dv_xname); 1642 return error; 1643 } 1644 sc->rxbufsz = betoh32(tmp) & 0xfff; 1645 DPRINTF(("maximum Rx buffer size %d\n", sc->rxbufsz)); 1646 return 0; 1647 } 1648 1649 int 1650 uath_reset(struct uath_softc *sc) 1651 { 1652 struct uath_cmd_setup setup; 1653 uint32_t reg, val; 1654 int s, error; 1655 1656 /* init device with some voodoo incantations.. */ 1657 setup.magic1 = htobe32(1); 1658 setup.magic2 = htobe32(5); 1659 setup.magic3 = htobe32(200); 1660 setup.magic4 = htobe32(27); 1661 s = splusb(); 1662 error = uath_cmd_write(sc, UATH_CMD_SETUP, &setup, sizeof setup, 1663 UATH_CMD_FLAG_ASYNC); 1664 /* ..and wait until firmware notifies us that it is ready */ 1665 if (error == 0) 1666 error = tsleep(UATH_COND_INIT(sc), PCATCH, "uathinit", 5 * hz); 1667 splx(s); 1668 if (error != 0) 1669 return error; 1670 1671 /* read PHY registers */ 1672 for (reg = 0x09; reg <= 0x24; reg++) { 1673 if (reg == 0x0b || reg == 0x0c) 1674 continue; 1675 DELAY(100); 1676 if ((error = uath_read_reg(sc, reg, &val)) != 0) 1677 return error; 1678 DPRINTFN(2, ("reg 0x%02x=0x%08x\n", reg, val)); 1679 } 1680 return error; 1681 } 1682 1683 int 1684 uath_reset_tx_queues(struct uath_softc *sc) 1685 { 1686 int ac, error; 1687 1688 for (ac = 0; ac < 4; ac++) { 1689 const uint32_t qid = htobe32(UATH_AC_TO_QID(ac)); 1690 1691 DPRINTF(("resetting Tx queue %d\n", UATH_AC_TO_QID(ac))); 1692 error = uath_cmd_write(sc, UATH_CMD_RESET_QUEUE, &qid, 1693 sizeof qid, 0); 1694 if (error != 0) 1695 break; 1696 } 1697 return error; 1698 } 1699 1700 int 1701 uath_wme_init(struct uath_softc *sc) 1702 { 1703 struct uath_qinfo qinfo; 1704 int ac, error; 1705 static const struct uath_wme_settings uath_wme_11g[4] = { 1706 { 7, 4, 10, 0, 0 }, /* Background */ 1707 { 3, 4, 10, 0, 0 }, /* Best-Effort */ 1708 { 3, 3, 4, 26, 0 }, /* Video */ 1709 { 2, 2, 3, 47, 0 } /* Voice */ 1710 }; 1711 1712 bzero(&qinfo, sizeof qinfo); 1713 qinfo.size = htobe32(32); 1714 qinfo.magic1 = htobe32(1); /* XXX ack policy? */ 1715 qinfo.magic2 = htobe32(1); 1716 for (ac = 0; ac < 4; ac++) { 1717 qinfo.qid = htobe32(UATH_AC_TO_QID(ac)); 1718 qinfo.ac = htobe32(ac); 1719 qinfo.aifsn = htobe32(uath_wme_11g[ac].aifsn); 1720 qinfo.logcwmin = htobe32(uath_wme_11g[ac].logcwmin); 1721 qinfo.logcwmax = htobe32(uath_wme_11g[ac].logcwmax); 1722 qinfo.txop = htobe32(UATH_TXOP_TO_US( 1723 uath_wme_11g[ac].txop)); 1724 qinfo.acm = htobe32(uath_wme_11g[ac].acm); 1725 1726 DPRINTF(("setting up Tx queue %d\n", UATH_AC_TO_QID(ac))); 1727 error = uath_cmd_write(sc, UATH_CMD_SET_QUEUE, &qinfo, 1728 sizeof qinfo, 0); 1729 if (error != 0) 1730 break; 1731 } 1732 return error; 1733 } 1734 1735 int 1736 uath_set_chan(struct uath_softc *sc, struct ieee80211_channel *c) 1737 { 1738 struct uath_set_chan chan; 1739 1740 bzero(&chan, sizeof chan); 1741 chan.flags = htobe32(0x1400); 1742 chan.freq = htobe32(c->ic_freq); 1743 chan.magic1 = htobe32(20); 1744 chan.magic2 = htobe32(50); 1745 chan.magic3 = htobe32(1); 1746 1747 DPRINTF(("switching to channel %d\n", 1748 ieee80211_chan2ieee(&sc->sc_ic, c))); 1749 return uath_cmd_write(sc, UATH_CMD_SET_CHAN, &chan, sizeof chan, 0); 1750 } 1751 1752 int 1753 uath_set_key(struct uath_softc *sc, const struct ieee80211_key *k, int index) 1754 { 1755 struct uath_cmd_crypto crypto; 1756 int i; 1757 1758 bzero(&crypto, sizeof crypto); 1759 crypto.keyidx = htobe32(index); 1760 crypto.magic1 = htobe32(1); 1761 crypto.size = htobe32(368); 1762 crypto.mask = htobe32(0xffff); 1763 crypto.flags = htobe32(0x80000068); 1764 if (index != UATH_DEFAULT_KEY) 1765 crypto.flags |= htobe32(index << 16); 1766 memset(crypto.magic2, 0xff, sizeof crypto.magic2); 1767 1768 /* 1769 * Each byte of the key must be XOR'ed with 10101010 before being 1770 * transmitted to the firmware. 1771 */ 1772 for (i = 0; i < k->k_len; i++) 1773 crypto.key[i] = k->k_key[i] ^ 0xaa; 1774 1775 DPRINTF(("setting crypto key index=%d len=%d\n", index, k->k_len)); 1776 return uath_cmd_write(sc, UATH_CMD_CRYPTO, &crypto, sizeof crypto, 0); 1777 } 1778 1779 int 1780 uath_set_keys(struct uath_softc *sc) 1781 { 1782 const struct ieee80211com *ic = &sc->sc_ic; 1783 int i, error; 1784 1785 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 1786 const struct ieee80211_key *k = &ic->ic_nw_keys[i]; 1787 1788 if (k->k_len > 0 && (error = uath_set_key(sc, k, i)) != 0) 1789 return error; 1790 } 1791 return uath_set_key(sc, &ic->ic_nw_keys[ic->ic_wep_txkey], 1792 UATH_DEFAULT_KEY); 1793 } 1794 1795 int 1796 uath_set_rates(struct uath_softc *sc, const struct ieee80211_rateset *rs) 1797 { 1798 struct uath_cmd_rates rates; 1799 1800 bzero(&rates, sizeof rates); 1801 rates.magic1 = htobe32(0x02); 1802 rates.size = htobe32(1 + sizeof rates.rates); 1803 rates.nrates = rs->rs_nrates; 1804 bcopy(rs->rs_rates, rates.rates, rs->rs_nrates); 1805 1806 DPRINTF(("setting supported rates nrates=%d\n", rs->rs_nrates)); 1807 return uath_cmd_write(sc, UATH_CMD_SET_RATES, &rates, sizeof rates, 0); 1808 } 1809 1810 int 1811 uath_set_rxfilter(struct uath_softc *sc, uint32_t filter, uint32_t flags) 1812 { 1813 struct uath_cmd_filter rxfilter; 1814 1815 rxfilter.filter = htobe32(filter); 1816 rxfilter.flags = htobe32(flags); 1817 1818 DPRINTF(("setting Rx filter=0x%x flags=0x%x\n", filter, flags)); 1819 return uath_cmd_write(sc, UATH_CMD_SET_FILTER, &rxfilter, 1820 sizeof rxfilter, 0); 1821 } 1822 1823 int 1824 uath_set_led(struct uath_softc *sc, int which, int on) 1825 { 1826 struct uath_cmd_led led; 1827 1828 led.which = htobe32(which); 1829 led.state = htobe32(on ? UATH_LED_ON : UATH_LED_OFF); 1830 1831 DPRINTFN(2, ("switching %s led %s\n", 1832 (which == UATH_LED_LINK) ? "link" : "activity", 1833 on ? "on" : "off")); 1834 return uath_cmd_write(sc, UATH_CMD_SET_LED, &led, sizeof led, 0); 1835 } 1836 1837 int 1838 uath_switch_channel(struct uath_softc *sc, struct ieee80211_channel *c) 1839 { 1840 uint32_t val; 1841 int error; 1842 1843 /* set radio frequency */ 1844 if ((error = uath_set_chan(sc, c)) != 0) { 1845 printf("%s: could not set channel\n", sc->sc_dev.dv_xname); 1846 return error; 1847 } 1848 1849 /* reset Tx rings */ 1850 if ((error = uath_reset_tx_queues(sc)) != 0) { 1851 printf("%s: could not reset Tx queues\n", 1852 sc->sc_dev.dv_xname); 1853 return error; 1854 } 1855 1856 /* set Tx rings WME properties */ 1857 if ((error = uath_wme_init(sc)) != 0) { 1858 printf("%s: could not init Tx queues\n", 1859 sc->sc_dev.dv_xname); 1860 return error; 1861 } 1862 1863 val = htobe32(0); 1864 error = uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0); 1865 if (error != 0) { 1866 printf("%s: could not set state\n", sc->sc_dev.dv_xname); 1867 return error; 1868 } 1869 1870 return uath_tx_null(sc); 1871 } 1872 1873 int 1874 uath_init(struct ifnet *ifp) 1875 { 1876 struct uath_softc *sc = ifp->if_softc; 1877 struct ieee80211com *ic = &sc->sc_ic; 1878 struct uath_cmd_31 cmd31; 1879 uint32_t val; 1880 int i, error; 1881 1882 /* reset data and command rings */ 1883 sc->tx_queued = sc->data_idx = sc->cmd_idx = 0; 1884 1885 val = htobe32(0); 1886 (void)uath_cmd_write(sc, UATH_CMD_02, &val, sizeof val, 0); 1887 1888 /* set MAC address */ 1889 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 1890 (void)uath_write_multi(sc, 0x13, ic->ic_myaddr, IEEE80211_ADDR_LEN); 1891 1892 (void)uath_write_reg(sc, 0x02, 0x00000001); 1893 (void)uath_write_reg(sc, 0x0e, 0x0000003f); 1894 (void)uath_write_reg(sc, 0x10, 0x00000001); 1895 (void)uath_write_reg(sc, 0x06, 0x0000001e); 1896 1897 /* 1898 * Queue Rx data xfers. 1899 */ 1900 for (i = 0; i < UATH_RX_DATA_LIST_COUNT; i++) { 1901 struct uath_rx_data *data = &sc->rx_data[i]; 1902 1903 usbd_setup_xfer(data->xfer, sc->data_rx_pipe, data, data->buf, 1904 sc->rxbufsz, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, 1905 uath_data_rxeof); 1906 error = usbd_transfer(data->xfer); 1907 if (error != USBD_IN_PROGRESS && error != 0) { 1908 printf("%s: could not queue Rx transfer\n", 1909 sc->sc_dev.dv_xname); 1910 goto fail; 1911 } 1912 } 1913 1914 error = uath_cmd_read(sc, UATH_CMD_07, 0, NULL, &val, 1915 UATH_CMD_FLAG_MAGIC); 1916 if (error != 0) { 1917 printf("%s: could not send read command 07h\n", 1918 sc->sc_dev.dv_xname); 1919 goto fail; 1920 } 1921 DPRINTF(("command 07h return code: %x\n", betoh32(val))); 1922 1923 /* set default channel */ 1924 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 1925 if ((error = uath_set_chan(sc, ic->ic_bss->ni_chan)) != 0) { 1926 printf("%s: could not set channel\n", sc->sc_dev.dv_xname); 1927 goto fail; 1928 } 1929 1930 if ((error = uath_wme_init(sc)) != 0) { 1931 printf("%s: could not setup WME parameters\n", 1932 sc->sc_dev.dv_xname); 1933 goto fail; 1934 } 1935 1936 /* init MAC registers */ 1937 (void)uath_write_reg(sc, 0x19, 0x00000000); 1938 (void)uath_write_reg(sc, 0x1a, 0x0000003c); 1939 (void)uath_write_reg(sc, 0x1b, 0x0000003c); 1940 (void)uath_write_reg(sc, 0x1c, 0x00000000); 1941 (void)uath_write_reg(sc, 0x1e, 0x00000000); 1942 (void)uath_write_reg(sc, 0x1f, 0x00000003); 1943 (void)uath_write_reg(sc, 0x0c, 0x00000000); 1944 (void)uath_write_reg(sc, 0x0f, 0x00000002); 1945 (void)uath_write_reg(sc, 0x0a, 0x00000007); /* XXX retry? */ 1946 (void)uath_write_reg(sc, 0x09, ic->ic_rtsthreshold); 1947 1948 val = htobe32(4); 1949 (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0); 1950 (void)uath_cmd_write(sc, UATH_CMD_27, &val, sizeof val, 0); 1951 (void)uath_cmd_write(sc, UATH_CMD_1B, NULL, 0, 0); 1952 1953 if ((error = uath_set_keys(sc)) != 0) { 1954 printf("%s: could not set crypto keys\n", 1955 sc->sc_dev.dv_xname); 1956 goto fail; 1957 } 1958 1959 /* enable Rx */ 1960 (void)uath_set_rxfilter(sc, 0x0000, 4); 1961 (void)uath_set_rxfilter(sc, 0x0817, 1); 1962 1963 cmd31.magic1 = htobe32(0xffffffff); 1964 cmd31.magic2 = htobe32(0xffffffff); 1965 (void)uath_cmd_write(sc, UATH_CMD_31, &cmd31, sizeof cmd31, 0); 1966 1967 ifp->if_flags &= ~IFF_OACTIVE; 1968 ifp->if_flags |= IFF_RUNNING; 1969 1970 if (ic->ic_opmode == IEEE80211_M_MONITOR) 1971 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 1972 else 1973 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 1974 1975 return 0; 1976 1977 fail: uath_stop(ifp, 1); 1978 return error; 1979 } 1980 1981 void 1982 uath_stop(struct ifnet *ifp, int disable) 1983 { 1984 struct uath_softc *sc = ifp->if_softc; 1985 struct ieee80211com *ic = &sc->sc_ic; 1986 uint32_t val; 1987 int s; 1988 1989 s = splusb(); 1990 1991 sc->sc_tx_timer = 0; 1992 ifp->if_timer = 0; 1993 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 1994 1995 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 1996 1997 val = htobe32(0); 1998 (void)uath_cmd_write(sc, UATH_CMD_SET_STATE, &val, sizeof val, 0); 1999 (void)uath_cmd_write(sc, UATH_CMD_RESET, NULL, 0, 0); 2000 2001 val = htobe32(0); 2002 (void)uath_cmd_write(sc, UATH_CMD_15, &val, sizeof val, 0); 2003 2004 #if 0 2005 (void)uath_cmd_read(sc, UATH_CMD_SHUTDOWN, NULL, 0, NULL, 2006 UATH_CMD_FLAG_MAGIC); 2007 #endif 2008 2009 /* abort any pending transfers */ 2010 usbd_abort_pipe(sc->data_tx_pipe); 2011 usbd_abort_pipe(sc->data_rx_pipe); 2012 usbd_abort_pipe(sc->cmd_tx_pipe); 2013 2014 splx(s); 2015 } 2016 2017 /* 2018 * Load the MIPS R4000 microcode into the device. Once the image is loaded, 2019 * the device will detach itself from the bus and reattach later with a new 2020 * product Id (a la ezusb). XXX this could also be implemented in userland 2021 * through /dev/ugen. 2022 */ 2023 int 2024 uath_loadfirmware(struct uath_softc *sc, const u_char *fw, int len) 2025 { 2026 usbd_xfer_handle ctlxfer, txxfer, rxxfer; 2027 struct uath_fwblock *txblock, *rxblock; 2028 uint8_t *txdata; 2029 int error = 0; 2030 2031 if ((ctlxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2032 printf("%s: could not allocate Tx control xfer\n", 2033 sc->sc_dev.dv_xname); 2034 error = USBD_NOMEM; 2035 goto fail1; 2036 } 2037 txblock = usbd_alloc_buffer(ctlxfer, sizeof (struct uath_fwblock)); 2038 if (txblock == NULL) { 2039 printf("%s: could not allocate Tx control block\n", 2040 sc->sc_dev.dv_xname); 2041 error = USBD_NOMEM; 2042 goto fail2; 2043 } 2044 2045 if ((txxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2046 printf("%s: could not allocate Tx xfer\n", 2047 sc->sc_dev.dv_xname); 2048 error = USBD_NOMEM; 2049 goto fail2; 2050 } 2051 txdata = usbd_alloc_buffer(txxfer, UATH_MAX_FWBLOCK_SIZE); 2052 if (txdata == NULL) { 2053 printf("%s: could not allocate Tx buffer\n", 2054 sc->sc_dev.dv_xname); 2055 error = USBD_NOMEM; 2056 goto fail3; 2057 } 2058 2059 if ((rxxfer = usbd_alloc_xfer(sc->sc_udev)) == NULL) { 2060 printf("%s: could not allocate Rx control xfer\n", 2061 sc->sc_dev.dv_xname); 2062 error = USBD_NOMEM; 2063 goto fail3; 2064 } 2065 rxblock = usbd_alloc_buffer(rxxfer, sizeof (struct uath_fwblock)); 2066 if (rxblock == NULL) { 2067 printf("%s: could not allocate Rx control block\n", 2068 sc->sc_dev.dv_xname); 2069 error = USBD_NOMEM; 2070 goto fail4; 2071 } 2072 2073 bzero(txblock, sizeof (struct uath_fwblock)); 2074 txblock->flags = htobe32(UATH_WRITE_BLOCK); 2075 txblock->total = htobe32(len); 2076 2077 while (len > 0) { 2078 int mlen = min(len, UATH_MAX_FWBLOCK_SIZE); 2079 2080 txblock->remain = htobe32(len - mlen); 2081 txblock->len = htobe32(mlen); 2082 2083 DPRINTF(("sending firmware block: %d bytes remaining\n", 2084 len - mlen)); 2085 2086 /* send firmware block meta-data */ 2087 usbd_setup_xfer(ctlxfer, sc->cmd_tx_pipe, sc, txblock, 2088 sizeof (struct uath_fwblock), USBD_NO_COPY, 2089 UATH_CMD_TIMEOUT, NULL); 2090 if ((error = usbd_sync_transfer(ctlxfer)) != 0) { 2091 printf("%s: could not send firmware block info\n", 2092 sc->sc_dev.dv_xname); 2093 break; 2094 } 2095 2096 /* send firmware block data */ 2097 bcopy(fw, txdata, mlen); 2098 usbd_setup_xfer(txxfer, sc->data_tx_pipe, sc, txdata, mlen, 2099 USBD_NO_COPY, UATH_DATA_TIMEOUT, NULL); 2100 if ((error = usbd_sync_transfer(txxfer)) != 0) { 2101 printf("%s: could not send firmware block data\n", 2102 sc->sc_dev.dv_xname); 2103 break; 2104 } 2105 2106 /* wait for ack from firmware */ 2107 usbd_setup_xfer(rxxfer, sc->cmd_rx_pipe, sc, rxblock, 2108 sizeof (struct uath_fwblock), USBD_SHORT_XFER_OK | 2109 USBD_NO_COPY, UATH_CMD_TIMEOUT, NULL); 2110 if ((error = usbd_sync_transfer(rxxfer)) != 0) { 2111 printf("%s: could not read firmware answer\n", 2112 sc->sc_dev.dv_xname); 2113 break; 2114 } 2115 2116 DPRINTFN(2, ("rxblock flags=0x%x total=%d\n", 2117 betoh32(rxblock->flags), betoh32(rxblock->rxtotal))); 2118 fw += mlen; 2119 len -= mlen; 2120 } 2121 2122 fail4: usbd_free_xfer(rxxfer); 2123 fail3: usbd_free_xfer(txxfer); 2124 fail2: usbd_free_xfer(ctlxfer); 2125 fail1: return error; 2126 } 2127 2128 int 2129 uath_activate(struct device *self, int act) 2130 { 2131 switch (act) { 2132 case DVACT_ACTIVATE: 2133 break; 2134 2135 case DVACT_DEACTIVATE: 2136 break; 2137 } 2138 return 0; 2139 } 2140