1 /* $OpenBSD: ohci.c,v 1.143 2015/03/14 03:38:49 jsg Exp $ */ 2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/device.h> 39 #include <sys/queue.h> 40 #include <sys/timeout.h> 41 #include <sys/pool.h> 42 #include <sys/endian.h> 43 44 #include <machine/bus.h> 45 46 #include <dev/usb/usb.h> 47 #include <dev/usb/usbdi.h> 48 #include <dev/usb/usbdivar.h> 49 #include <dev/usb/usb_mem.h> 50 51 #include <dev/usb/ohcireg.h> 52 #include <dev/usb/ohcivar.h> 53 54 struct cfdriver ohci_cd = { 55 NULL, "ohci", DV_DULL 56 }; 57 58 #ifdef OHCI_DEBUG 59 #define DPRINTF(x) do { if (ohcidebug) printf x; } while (0) 60 #define DPRINTFN(n,x) do { if (ohcidebug>(n)) printf x; } while (0) 61 int ohcidebug = 0; 62 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 63 #else 64 #define DPRINTF(x) 65 #define DPRINTFN(n,x) 66 #endif 67 68 struct pool *ohcixfer; 69 70 struct ohci_pipe; 71 72 struct ohci_soft_ed *ohci_alloc_sed(struct ohci_softc *); 73 void ohci_free_sed(struct ohci_softc *, struct ohci_soft_ed *); 74 75 struct ohci_soft_td *ohci_alloc_std(struct ohci_softc *); 76 void ohci_free_std(struct ohci_softc *, struct ohci_soft_td *); 77 78 struct ohci_soft_itd *ohci_alloc_sitd(struct ohci_softc *); 79 void ohci_free_sitd(struct ohci_softc *, struct ohci_soft_itd *); 80 81 #if 0 82 void ohci_free_std_chain(struct ohci_softc *, struct ohci_soft_td *, 83 struct ohci_soft_td *); 84 #endif 85 usbd_status ohci_alloc_std_chain(struct ohci_softc *, u_int, 86 struct usbd_xfer *, struct ohci_soft_td *, 87 struct ohci_soft_td **); 88 89 usbd_status ohci_open(struct usbd_pipe *); 90 int ohci_setaddr(struct usbd_device *, int); 91 void ohci_poll(struct usbd_bus *); 92 void ohci_softintr(void *); 93 void ohci_waitintr(struct ohci_softc *, struct usbd_xfer *); 94 void ohci_add_done(struct ohci_softc *, ohci_physaddr_t); 95 void ohci_rhsc(struct ohci_softc *, struct usbd_xfer *); 96 97 usbd_status ohci_device_request(struct usbd_xfer *xfer); 98 void ohci_add_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 99 void ohci_rem_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 100 void ohci_hash_add_td(struct ohci_softc *, struct ohci_soft_td *); 101 struct ohci_soft_td *ohci_hash_find_td(struct ohci_softc *, ohci_physaddr_t); 102 void ohci_hash_add_itd(struct ohci_softc *, struct ohci_soft_itd *); 103 void ohci_hash_rem_itd(struct ohci_softc *, struct ohci_soft_itd *); 104 struct ohci_soft_itd *ohci_hash_find_itd(struct ohci_softc *, ohci_physaddr_t); 105 106 usbd_status ohci_setup_isoc(struct usbd_pipe *pipe); 107 void ohci_device_isoc_enter(struct usbd_xfer *); 108 109 struct usbd_xfer *ohci_allocx(struct usbd_bus *); 110 void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 111 112 usbd_status ohci_root_ctrl_transfer(struct usbd_xfer *); 113 usbd_status ohci_root_ctrl_start(struct usbd_xfer *); 114 void ohci_root_ctrl_abort(struct usbd_xfer *); 115 void ohci_root_ctrl_close(struct usbd_pipe *); 116 void ohci_root_ctrl_done(struct usbd_xfer *); 117 118 usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 119 usbd_status ohci_root_intr_start(struct usbd_xfer *); 120 void ohci_root_intr_abort(struct usbd_xfer *); 121 void ohci_root_intr_close(struct usbd_pipe *); 122 void ohci_root_intr_done(struct usbd_xfer *); 123 124 usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 125 usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 126 void ohci_device_ctrl_abort(struct usbd_xfer *); 127 void ohci_device_ctrl_close(struct usbd_pipe *); 128 void ohci_device_ctrl_done(struct usbd_xfer *); 129 130 usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 131 usbd_status ohci_device_bulk_start(struct usbd_xfer *); 132 void ohci_device_bulk_abort(struct usbd_xfer *); 133 void ohci_device_bulk_close(struct usbd_pipe *); 134 void ohci_device_bulk_done(struct usbd_xfer *); 135 136 usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 137 usbd_status ohci_device_intr_start(struct usbd_xfer *); 138 void ohci_device_intr_abort(struct usbd_xfer *); 139 void ohci_device_intr_close(struct usbd_pipe *); 140 void ohci_device_intr_done(struct usbd_xfer *); 141 142 usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 143 usbd_status ohci_device_isoc_start(struct usbd_xfer *); 144 void ohci_device_isoc_abort(struct usbd_xfer *); 145 void ohci_device_isoc_close(struct usbd_pipe *); 146 void ohci_device_isoc_done(struct usbd_xfer *); 147 148 usbd_status ohci_device_setintr(struct ohci_softc *sc, 149 struct ohci_pipe *pipe, int ival); 150 151 void ohci_timeout(void *); 152 void ohci_timeout_task(void *); 153 void ohci_rhsc_able(struct ohci_softc *, int); 154 void ohci_rhsc_enable(void *); 155 156 void ohci_close_pipe(struct usbd_pipe *, struct ohci_soft_ed *); 157 void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 158 159 void ohci_device_clear_toggle(struct usbd_pipe *pipe); 160 161 #ifdef OHCI_DEBUG 162 void ohci_dumpregs(struct ohci_softc *); 163 void ohci_dump_tds(struct ohci_soft_td *); 164 void ohci_dump_td(struct ohci_soft_td *); 165 void ohci_dump_ed(struct ohci_soft_ed *); 166 void ohci_dump_itd(struct ohci_soft_itd *); 167 void ohci_dump_itds(struct ohci_soft_itd *); 168 #endif 169 170 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 171 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 172 #define OWRITE1(sc, r, x) \ 173 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 174 #define OWRITE2(sc, r, x) \ 175 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 176 #define OWRITE4(sc, r, x) \ 177 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 178 179 __unused static __inline u_int8_t 180 OREAD1(struct ohci_softc *sc, bus_size_t r) 181 { 182 OBARR(sc); 183 return bus_space_read_1(sc->iot, sc->ioh, r); 184 } 185 186 __unused static __inline u_int16_t 187 OREAD2(struct ohci_softc *sc, bus_size_t r) 188 { 189 OBARR(sc); 190 return bus_space_read_2(sc->iot, sc->ioh, r); 191 } 192 193 __unused static __inline u_int32_t 194 OREAD4(struct ohci_softc *sc, bus_size_t r) 195 { 196 OBARR(sc); 197 return bus_space_read_4(sc->iot, sc->ioh, r); 198 } 199 200 /* Reverse the bits in a value 0 .. 31 */ 201 u_int8_t revbits[OHCI_NO_INTRS] = 202 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 203 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 204 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 205 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 206 207 struct ohci_pipe { 208 struct usbd_pipe pipe; 209 struct ohci_soft_ed *sed; 210 union { 211 struct ohci_soft_td *td; 212 struct ohci_soft_itd *itd; 213 } tail; 214 union { 215 /* Control pipe */ 216 struct { 217 struct usb_dma reqdma; 218 } ctl; 219 /* Interrupt pipe */ 220 struct { 221 int nslots; 222 int pos; 223 } intr; 224 /* Iso pipe */ 225 struct iso { 226 int next, inuse; 227 } iso; 228 } u; 229 }; 230 231 #define OHCI_INTR_ENDPT 1 232 233 struct usbd_bus_methods ohci_bus_methods = { 234 .open_pipe = ohci_open, 235 .dev_setaddr = ohci_setaddr, 236 .soft_intr = ohci_softintr, 237 .do_poll = ohci_poll, 238 .allocx = ohci_allocx, 239 .freex = ohci_freex, 240 }; 241 242 struct usbd_pipe_methods ohci_root_ctrl_methods = { 243 .transfer = ohci_root_ctrl_transfer, 244 .start = ohci_root_ctrl_start, 245 .abort = ohci_root_ctrl_abort, 246 .close = ohci_root_ctrl_close, 247 .done = ohci_root_ctrl_done, 248 }; 249 250 struct usbd_pipe_methods ohci_root_intr_methods = { 251 .transfer = ohci_root_intr_transfer, 252 .start = ohci_root_intr_start, 253 .abort = ohci_root_intr_abort, 254 .close = ohci_root_intr_close, 255 .done = ohci_root_intr_done, 256 }; 257 258 struct usbd_pipe_methods ohci_device_ctrl_methods = { 259 .transfer = ohci_device_ctrl_transfer, 260 .start = ohci_device_ctrl_start, 261 .abort = ohci_device_ctrl_abort, 262 .close = ohci_device_ctrl_close, 263 .done = ohci_device_ctrl_done, 264 }; 265 266 struct usbd_pipe_methods ohci_device_intr_methods = { 267 .transfer = ohci_device_intr_transfer, 268 .start = ohci_device_intr_start, 269 .abort = ohci_device_intr_abort, 270 .close = ohci_device_intr_close, 271 .cleartoggle = ohci_device_clear_toggle, 272 .done = ohci_device_intr_done, 273 }; 274 275 struct usbd_pipe_methods ohci_device_bulk_methods = { 276 .transfer = ohci_device_bulk_transfer, 277 .start = ohci_device_bulk_start, 278 .abort = ohci_device_bulk_abort, 279 .close = ohci_device_bulk_close, 280 .cleartoggle = ohci_device_clear_toggle, 281 .done = ohci_device_bulk_done, 282 }; 283 284 struct usbd_pipe_methods ohci_device_isoc_methods = { 285 .transfer = ohci_device_isoc_transfer, 286 .start = ohci_device_isoc_start, 287 .abort = ohci_device_isoc_abort, 288 .close = ohci_device_isoc_close, 289 .done = ohci_device_isoc_done, 290 }; 291 292 int 293 ohci_activate(struct device *self, int act) 294 { 295 struct ohci_softc *sc = (struct ohci_softc *)self; 296 u_int32_t reg; 297 int rv = 0; 298 299 switch (act) { 300 case DVACT_SUSPEND: 301 rv = config_activate_children(self, act); 302 sc->sc_bus.use_polling++; 303 reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 304 if (sc->sc_control == 0) { 305 /* 306 * Preserve register values, in case that APM BIOS 307 * does not recover them. 308 */ 309 sc->sc_control = reg; 310 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 311 sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc, 312 OHCI_FM_INTERVAL)); 313 } 314 reg |= OHCI_HCFS_SUSPEND; 315 OWRITE4(sc, OHCI_CONTROL, reg); 316 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 317 sc->sc_bus.use_polling--; 318 break; 319 case DVACT_RESUME: 320 sc->sc_bus.use_polling++; 321 322 /* Some broken BIOSes do not recover these values */ 323 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 324 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 325 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 326 if (sc->sc_intre) 327 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 328 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 329 if (sc->sc_control) 330 reg = sc->sc_control; 331 else 332 reg = OREAD4(sc, OHCI_CONTROL); 333 reg |= OHCI_HCFS_RESUME; 334 OWRITE4(sc, OHCI_CONTROL, reg); 335 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 336 reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 337 OWRITE4(sc, OHCI_CONTROL, reg); 338 339 reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 340 reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival; 341 OWRITE4(sc, OHCI_FM_INTERVAL, reg); 342 OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival)); 343 344 /* Fiddle the No OverCurrent Protection to avoid a chip bug */ 345 reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 346 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP); 347 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 348 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 349 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg); 350 351 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 352 sc->sc_control = sc->sc_intre = sc->sc_ival = 0; 353 sc->sc_bus.use_polling--; 354 rv = config_activate_children(self, act); 355 break; 356 case DVACT_POWERDOWN: 357 rv = config_activate_children(self, act); 358 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 359 break; 360 default: 361 rv = config_activate_children(self, act); 362 break; 363 } 364 return (rv); 365 } 366 367 int 368 ohci_detach(struct device *self, int flags) 369 { 370 struct ohci_softc *sc = (struct ohci_softc *)self; 371 int rv; 372 373 rv = config_detach_children(self, flags); 374 if (rv != 0) 375 return (rv); 376 377 timeout_del(&sc->sc_tmo_rhsc); 378 379 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 380 381 /* free data structures XXX */ 382 383 return (rv); 384 } 385 386 struct ohci_soft_ed * 387 ohci_alloc_sed(struct ohci_softc *sc) 388 { 389 struct ohci_soft_ed *sed = NULL; 390 usbd_status err; 391 int i, offs; 392 struct usb_dma dma; 393 int s; 394 395 s = splusb(); 396 if (sc->sc_freeeds == NULL) { 397 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 398 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 399 OHCI_ED_ALIGN, &dma); 400 if (err) 401 goto out; 402 for (i = 0; i < OHCI_SED_CHUNK; i++) { 403 offs = i * OHCI_SED_SIZE; 404 sed = KERNADDR(&dma, offs); 405 sed->physaddr = DMAADDR(&dma, offs); 406 sed->next = sc->sc_freeeds; 407 sc->sc_freeeds = sed; 408 } 409 } 410 sed = sc->sc_freeeds; 411 sc->sc_freeeds = sed->next; 412 memset(&sed->ed, 0, sizeof(struct ohci_ed)); 413 sed->next = NULL; 414 415 out: 416 splx(s); 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(struct ohci_softc *sc, struct ohci_soft_ed *sed) 422 { 423 int s; 424 425 s = splusb(); 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 splx(s); 429 } 430 431 struct ohci_soft_td * 432 ohci_alloc_std(struct ohci_softc *sc) 433 { 434 struct ohci_soft_td *std = NULL; 435 usbd_status err; 436 int i, offs; 437 struct usb_dma dma; 438 int s; 439 440 s = splusb(); 441 if (sc->sc_freetds == NULL) { 442 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 443 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 444 OHCI_TD_ALIGN, &dma); 445 if (err) 446 goto out; 447 for (i = 0; i < OHCI_STD_CHUNK; i++) { 448 offs = i * OHCI_STD_SIZE; 449 std = KERNADDR(&dma, offs); 450 std->physaddr = DMAADDR(&dma, offs); 451 std->nexttd = sc->sc_freetds; 452 sc->sc_freetds = std; 453 } 454 } 455 456 std = sc->sc_freetds; 457 sc->sc_freetds = std->nexttd; 458 memset(&std->td, 0, sizeof(struct ohci_td)); 459 std->nexttd = NULL; 460 std->xfer = NULL; 461 ohci_hash_add_td(sc, std); 462 463 out: 464 splx(s); 465 return (std); 466 } 467 468 void 469 ohci_free_std(struct ohci_softc *sc, struct ohci_soft_td *std) 470 { 471 int s; 472 473 s = splusb(); 474 LIST_REMOVE(std, hnext); 475 std->nexttd = sc->sc_freetds; 476 sc->sc_freetds = std; 477 splx(s); 478 } 479 480 usbd_status 481 ohci_alloc_std_chain(struct ohci_softc *sc, u_int alen, struct usbd_xfer *xfer, 482 struct ohci_soft_td *sp, struct ohci_soft_td **ep) 483 { 484 struct ohci_soft_td *next, *cur, *end; 485 ohci_physaddr_t dataphys, dataphysend; 486 u_int32_t tdflags; 487 u_int len, curlen; 488 int mps; 489 int rd = usbd_xfer_isread(xfer); 490 struct usb_dma *dma = &xfer->dmabuf; 491 u_int16_t flags = xfer->flags; 492 493 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%u\n", alen)); 494 495 len = alen; 496 cur = sp; 497 end = NULL; 498 499 dataphys = DMAADDR(dma, 0); 500 dataphysend = OHCI_PAGE(dataphys + len - 1); 501 tdflags = htole32( 502 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 503 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 504 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 505 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 506 507 while (len > 0) { 508 next = ohci_alloc_std(sc); 509 if (next == NULL) 510 goto nomem; 511 512 /* The OHCI hardware can handle at most one page crossing. */ 513 if (OHCI_PAGE(dataphys) == dataphysend || 514 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 515 /* we can handle it in this TD */ 516 curlen = len; 517 } else { 518 /* must use multiple TDs, fill as much as possible. */ 519 curlen = 2 * OHCI_PAGE_SIZE - 520 (dataphys & (OHCI_PAGE_SIZE-1)); 521 /* the length must be a multiple of the max size */ 522 curlen -= curlen % mps; 523 #ifdef DIAGNOSTIC 524 if (curlen == 0) 525 panic("ohci_alloc_std: curlen == 0"); 526 #endif 527 } 528 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 529 "dataphysend=0x%08x len=%u curlen=%u\n", 530 dataphys, dataphysend, 531 len, curlen)); 532 len -= curlen; 533 534 cur->td.td_flags = tdflags; 535 cur->td.td_cbp = htole32(dataphys); 536 cur->nexttd = next; 537 cur->td.td_nexttd = htole32(next->physaddr); 538 cur->td.td_be = htole32(dataphys + curlen - 1); 539 cur->len = curlen; 540 cur->flags = OHCI_ADD_LEN; 541 cur->xfer = xfer; 542 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 543 dataphys, dataphys + curlen - 1)); 544 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 545 dataphys += curlen; 546 end = cur; 547 cur = next; 548 } 549 if (!rd && ((flags & USBD_FORCE_SHORT_XFER) || alen == 0) && 550 alen % mps == 0) { 551 /* Force a 0 length transfer at the end. */ 552 553 next = ohci_alloc_std(sc); 554 if (next == NULL) 555 goto nomem; 556 557 cur->td.td_flags = tdflags; 558 cur->td.td_cbp = 0; /* indicate 0 length packet */ 559 cur->nexttd = next; 560 cur->td.td_nexttd = htole32(next->physaddr); 561 cur->td.td_be = ~0; 562 cur->len = 0; 563 cur->flags = 0; 564 cur->xfer = xfer; 565 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 566 end = cur; 567 } 568 *ep = end; 569 570 return (USBD_NORMAL_COMPLETION); 571 572 nomem: 573 /* XXX free chain */ 574 return (USBD_NOMEM); 575 } 576 577 #if 0 578 void 579 ohci_free_std_chain(struct ohci_softc *sc, struct ohci_soft_td *std, 580 struct ohci_soft_td *stdend) 581 { 582 struct ohci_soft_td *p; 583 584 for (; std != stdend; std = p) { 585 p = std->nexttd; 586 ohci_free_std(sc, std); 587 } 588 } 589 #endif 590 591 struct ohci_soft_itd * 592 ohci_alloc_sitd(struct ohci_softc *sc) 593 { 594 struct ohci_soft_itd *sitd; 595 usbd_status err; 596 int i, s, offs; 597 struct usb_dma dma; 598 599 if (sc->sc_freeitds == NULL) { 600 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 601 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 602 OHCI_ITD_ALIGN, &dma); 603 if (err) 604 return (NULL); 605 s = splusb(); 606 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 607 offs = i * OHCI_SITD_SIZE; 608 sitd = KERNADDR(&dma, offs); 609 sitd->physaddr = DMAADDR(&dma, offs); 610 sitd->nextitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd; 612 } 613 splx(s); 614 } 615 616 s = splusb(); 617 sitd = sc->sc_freeitds; 618 sc->sc_freeitds = sitd->nextitd; 619 memset(&sitd->itd, 0, sizeof(struct ohci_itd)); 620 sitd->nextitd = NULL; 621 sitd->xfer = NULL; 622 ohci_hash_add_itd(sc, sitd); 623 splx(s); 624 625 #ifdef DIAGNOSTIC 626 sitd->isdone = 0; 627 #endif 628 629 return (sitd); 630 } 631 632 void 633 ohci_free_sitd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 634 { 635 int s; 636 637 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 638 639 #ifdef DIAGNOSTIC 640 if (!sitd->isdone) { 641 panic("ohci_free_sitd: sitd=%p not done", sitd); 642 return; 643 } 644 /* Warn double free */ 645 sitd->isdone = 0; 646 #endif 647 648 s = splusb(); 649 ohci_hash_rem_itd(sc, sitd); 650 sitd->nextitd = sc->sc_freeitds; 651 sc->sc_freeitds = sitd; 652 splx(s); 653 } 654 655 usbd_status 656 ohci_checkrev(struct ohci_softc *sc) 657 { 658 u_int32_t rev; 659 660 printf(","); 661 rev = OREAD4(sc, OHCI_REVISION); 662 printf(" version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 663 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 664 665 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 666 printf("%s: unsupported OHCI revision\n", 667 sc->sc_bus.bdev.dv_xname); 668 sc->sc_bus.usbrev = USBREV_UNKNOWN; 669 return (USBD_INVAL); 670 } 671 sc->sc_bus.usbrev = USBREV_1_0; 672 673 return (USBD_NORMAL_COMPLETION); 674 } 675 676 usbd_status 677 ohci_handover(struct ohci_softc *sc) 678 { 679 u_int32_t s, ctl; 680 int i; 681 682 ctl = OREAD4(sc, OHCI_CONTROL); 683 if (ctl & OHCI_IR) { 684 /* SMM active, request change */ 685 DPRINTF(("ohci_handover: SMM active, request owner change\n")); 686 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 687 (OHCI_OC | OHCI_MIE)) 688 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 689 s = OREAD4(sc, OHCI_COMMAND_STATUS); 690 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 691 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 692 usb_delay_ms(&sc->sc_bus, 1); 693 ctl = OREAD4(sc, OHCI_CONTROL); 694 } 695 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 696 if (ctl & OHCI_IR) { 697 printf("%s: SMM does not respond, will reset\n", 698 sc->sc_bus.bdev.dv_xname); 699 } 700 } 701 702 return (USBD_NORMAL_COMPLETION); 703 } 704 705 usbd_status 706 ohci_init(struct ohci_softc *sc) 707 { 708 struct ohci_soft_ed *sed, *psed; 709 usbd_status err; 710 int i; 711 u_int32_t ctl, rwc, ival, hcr, fm, per, desca, descb; 712 713 DPRINTF(("ohci_init: start\n")); 714 715 for (i = 0; i < OHCI_HASH_SIZE; i++) 716 LIST_INIT(&sc->sc_hash_tds[i]); 717 for (i = 0; i < OHCI_HASH_SIZE; i++) 718 LIST_INIT(&sc->sc_hash_itds[i]); 719 720 if (ohcixfer == NULL) { 721 ohcixfer = malloc(sizeof(struct pool), M_DEVBUF, M_NOWAIT); 722 if (ohcixfer == NULL) { 723 printf("%s: unable to allocate pool descriptor\n", 724 sc->sc_bus.bdev.dv_xname); 725 return (ENOMEM); 726 } 727 pool_init(ohcixfer, sizeof(struct ohci_xfer), 0, 0, 0, 728 "ohcixfer", NULL); 729 pool_setipl(ohcixfer, IPL_SOFTUSB); 730 } 731 732 /* XXX determine alignment by R/W */ 733 /* Allocate the HCCA area. */ 734 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 735 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 736 if (err) 737 return (err); 738 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 739 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 740 741 sc->sc_eintrs = OHCI_NORMAL_INTRS; 742 743 /* Allocate dummy ED that starts the control list. */ 744 sc->sc_ctrl_head = ohci_alloc_sed(sc); 745 if (sc->sc_ctrl_head == NULL) { 746 err = USBD_NOMEM; 747 goto bad1; 748 } 749 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 750 751 /* Allocate dummy ED that starts the bulk list. */ 752 sc->sc_bulk_head = ohci_alloc_sed(sc); 753 if (sc->sc_bulk_head == NULL) { 754 err = USBD_NOMEM; 755 goto bad2; 756 } 757 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 758 759 /* Allocate dummy ED that starts the isochronous list. */ 760 sc->sc_isoc_head = ohci_alloc_sed(sc); 761 if (sc->sc_isoc_head == NULL) { 762 err = USBD_NOMEM; 763 goto bad3; 764 } 765 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 766 767 /* Allocate all the dummy EDs that make up the interrupt tree. */ 768 for (i = 0; i < OHCI_NO_EDS; i++) { 769 sed = ohci_alloc_sed(sc); 770 if (sed == NULL) { 771 while (--i >= 0) 772 ohci_free_sed(sc, sc->sc_eds[i]); 773 err = USBD_NOMEM; 774 goto bad4; 775 } 776 /* All ED fields are set to 0. */ 777 sc->sc_eds[i] = sed; 778 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 779 if (i != 0) 780 psed = sc->sc_eds[(i-1) / 2]; 781 else 782 psed= sc->sc_isoc_head; 783 sed->next = psed; 784 sed->ed.ed_nexted = htole32(psed->physaddr); 785 } 786 /* 787 * Fill HCCA interrupt table. The bit reversal is to get 788 * the tree set up properly to spread the interrupts. 789 */ 790 for (i = 0; i < OHCI_NO_INTRS; i++) 791 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 792 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 793 794 #ifdef OHCI_DEBUG 795 if (ohcidebug > 15) { 796 for (i = 0; i < OHCI_NO_EDS; i++) { 797 printf("ed#%d ", i); 798 ohci_dump_ed(sc->sc_eds[i]); 799 } 800 printf("iso "); 801 ohci_dump_ed(sc->sc_isoc_head); 802 } 803 #endif 804 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 805 ctl = OREAD4(sc, OHCI_CONTROL); 806 rwc = ctl & OHCI_RWC; 807 fm = OREAD4(sc, OHCI_FM_INTERVAL); 808 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 809 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 810 811 /* Determine in what context we are running. */ 812 if (ctl & OHCI_IR) { 813 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 814 goto reset; 815 #if 0 816 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 817 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 818 /* BIOS started controller. */ 819 DPRINTF(("ohci_init: BIOS active\n")); 820 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 821 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 822 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 823 } 824 #endif 825 } else { 826 DPRINTF(("ohci_init: cold started\n")); 827 reset: 828 /* Controller was cold started. */ 829 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 830 } 831 832 /* 833 * This reset should not be necessary according to the OHCI spec, but 834 * without it some controllers do not start. 835 */ 836 DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname)); 837 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 838 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 839 840 /* We now own the host controller and the bus has been reset. */ 841 842 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 843 /* Nominal time for a reset is 10 us. */ 844 for (i = 0; i < 10; i++) { 845 delay(10); 846 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 847 if (!hcr) 848 break; 849 } 850 if (hcr) { 851 printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname); 852 err = USBD_IOERROR; 853 goto bad5; 854 } 855 #ifdef OHCI_DEBUG 856 if (ohcidebug > 15) 857 ohci_dumpregs(sc); 858 #endif 859 860 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 861 862 /* Set up HC registers. */ 863 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 864 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 865 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 866 /* disable all interrupts and then switch on all desired interrupts */ 867 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 868 /* switch on desired functional features */ 869 ctl = OREAD4(sc, OHCI_CONTROL); 870 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 871 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 872 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 873 /* And finally start it! */ 874 OWRITE4(sc, OHCI_CONTROL, ctl); 875 876 /* 877 * The controller is now OPERATIONAL. Set a some final 878 * registers that should be set earlier, but that the 879 * controller ignores when in the SUSPEND state. 880 */ 881 ival = OHCI_GET_IVAL(fm); 882 fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 883 fm |= OHCI_FSMPS(ival) | ival; 884 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 885 per = OHCI_PERIODIC(ival); /* 90% periodic */ 886 OWRITE4(sc, OHCI_PERIODIC_START, per); 887 888 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 889 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 890 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 891 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 892 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 893 OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb); 894 usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR); 895 896 /* 897 * The AMD756 requires a delay before re-reading the register, 898 * otherwise it will occasionally report 0 ports. 899 */ 900 sc->sc_noport = 0; 901 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 902 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 903 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 904 } 905 906 #ifdef OHCI_DEBUG 907 if (ohcidebug > 5) 908 ohci_dumpregs(sc); 909 #endif 910 911 /* Set up the bus struct. */ 912 sc->sc_bus.methods = &ohci_bus_methods; 913 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 914 915 sc->sc_control = sc->sc_intre = 0; 916 917 timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 918 919 /* Finally, turn on interrupts. */ 920 DPRINTFN(1,("ohci_init: enabling\n")); 921 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 922 923 return (USBD_NORMAL_COMPLETION); 924 925 bad5: 926 for (i = 0; i < OHCI_NO_EDS; i++) 927 ohci_free_sed(sc, sc->sc_eds[i]); 928 bad4: 929 ohci_free_sed(sc, sc->sc_isoc_head); 930 bad3: 931 ohci_free_sed(sc, sc->sc_bulk_head); 932 bad2: 933 ohci_free_sed(sc, sc->sc_ctrl_head); 934 bad1: 935 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 936 return (err); 937 } 938 939 struct usbd_xfer * 940 ohci_allocx(struct usbd_bus *bus) 941 { 942 return (pool_get(ohcixfer, PR_NOWAIT | PR_ZERO)); 943 } 944 945 void 946 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 947 { 948 pool_put(ohcixfer, xfer); 949 } 950 951 #ifdef OHCI_DEBUG 952 void 953 ohci_dumpregs(struct ohci_softc *sc) 954 { 955 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 956 OREAD4(sc, OHCI_REVISION), 957 OREAD4(sc, OHCI_CONTROL), 958 OREAD4(sc, OHCI_COMMAND_STATUS))); 959 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 960 OREAD4(sc, OHCI_INTERRUPT_STATUS), 961 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 962 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 963 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 964 OREAD4(sc, OHCI_HCCA), 965 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 966 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 967 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 968 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 969 OREAD4(sc, OHCI_BULK_HEAD_ED), 970 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 971 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 972 OREAD4(sc, OHCI_DONE_HEAD), 973 OREAD4(sc, OHCI_FM_INTERVAL), 974 OREAD4(sc, OHCI_FM_REMAINING))); 975 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 976 OREAD4(sc, OHCI_FM_NUMBER), 977 OREAD4(sc, OHCI_PERIODIC_START), 978 OREAD4(sc, OHCI_LS_THRESHOLD))); 979 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 980 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 981 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 982 OREAD4(sc, OHCI_RH_STATUS))); 983 DPRINTF((" port1=0x%08x port2=0x%08x\n", 984 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 985 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 986 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 987 letoh32(sc->sc_hcca->hcca_frame_number), 988 letoh32(sc->sc_hcca->hcca_done_head))); 989 } 990 #endif 991 992 int ohci_intr1(struct ohci_softc *); 993 994 int 995 ohci_intr(void *p) 996 { 997 struct ohci_softc *sc = p; 998 999 if (sc == NULL || sc->sc_bus.dying) 1000 return (0); 1001 1002 /* If we get an interrupt while polling, then just ignore it. */ 1003 if (sc->sc_bus.use_polling) { 1004 #ifdef DIAGNOSTIC 1005 static struct timeval ohci_intr_tv; 1006 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) && 1007 usbd_ratecheck(&ohci_intr_tv)) 1008 DPRINTFN(16, 1009 ("ohci_intr: ignored interrupt while polling\n")); 1010 #endif 1011 return (0); 1012 } 1013 1014 return (ohci_intr1(sc)); 1015 } 1016 1017 int 1018 ohci_intr1(struct ohci_softc *sc) 1019 { 1020 u_int32_t intrs, eintrs; 1021 ohci_physaddr_t done; 1022 1023 DPRINTFN(14,("ohci_intr1: enter\n")); 1024 1025 /* In case the interrupt occurs before initialization has completed. */ 1026 if (sc == NULL || sc->sc_hcca == NULL) { 1027 #ifdef DIAGNOSTIC 1028 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1029 #endif 1030 return (0); 1031 } 1032 1033 intrs = 0; 1034 done = letoh32(sc->sc_hcca->hcca_done_head); 1035 if (done != 0) { 1036 if (done & ~OHCI_DONE_INTRS) 1037 intrs = OHCI_WDH; 1038 if (done & OHCI_DONE_INTRS) 1039 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1040 sc->sc_hcca->hcca_done_head = 0; 1041 } else { 1042 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1043 /* If we've flushed out a WDH then reread */ 1044 if (intrs & OHCI_WDH) { 1045 done = letoh32(sc->sc_hcca->hcca_done_head); 1046 sc->sc_hcca->hcca_done_head = 0; 1047 } 1048 } 1049 1050 if (intrs == 0xffffffff) { 1051 sc->sc_bus.dying = 1; 1052 return (0); 1053 } 1054 1055 if (!intrs) 1056 return (0); 1057 1058 intrs &= ~OHCI_MIE; 1059 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1060 eintrs = intrs & sc->sc_eintrs; 1061 if (!eintrs) 1062 return (0); 1063 1064 sc->sc_bus.intr_context++; 1065 sc->sc_bus.no_intrs++; 1066 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1067 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1068 (u_int)eintrs)); 1069 1070 if (eintrs & OHCI_SO) { 1071 sc->sc_overrun_cnt++; 1072 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1073 printf("%s: %u scheduling overruns\n", 1074 sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt); 1075 sc->sc_overrun_cnt = 0; 1076 } 1077 /* XXX do what */ 1078 eintrs &= ~OHCI_SO; 1079 } 1080 if (eintrs & OHCI_WDH) { 1081 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1082 usb_schedsoftintr(&sc->sc_bus); 1083 eintrs &= ~OHCI_WDH; 1084 } 1085 if (eintrs & OHCI_RD) { 1086 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1087 /* XXX process resume detect */ 1088 } 1089 if (eintrs & OHCI_UE) { 1090 printf("%s: unrecoverable error, controller halted\n", 1091 sc->sc_bus.bdev.dv_xname); 1092 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1093 /* XXX what else */ 1094 } 1095 if (eintrs & OHCI_RHSC) { 1096 ohci_rhsc(sc, sc->sc_intrxfer); 1097 /* 1098 * Disable RHSC interrupt for now, because it will be 1099 * on until the port has been reset. 1100 */ 1101 ohci_rhsc_able(sc, 0); 1102 DPRINTFN(2, ("%s: rhsc interrupt disabled\n", 1103 sc->sc_bus.bdev.dv_xname)); 1104 1105 /* Do not allow RHSC interrupts > 1 per second */ 1106 timeout_add_sec(&sc->sc_tmo_rhsc, 1); 1107 eintrs &= ~OHCI_RHSC; 1108 } 1109 1110 sc->sc_bus.intr_context--; 1111 1112 if (eintrs != 0) { 1113 /* Block unprocessed interrupts. XXX */ 1114 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1115 sc->sc_eintrs &= ~eintrs; 1116 printf("%s: blocking intrs 0x%x\n", 1117 sc->sc_bus.bdev.dv_xname, eintrs); 1118 } 1119 1120 return (1); 1121 } 1122 1123 void 1124 ohci_rhsc_able(struct ohci_softc *sc, int on) 1125 { 1126 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1127 if (on) { 1128 sc->sc_eintrs |= OHCI_RHSC; 1129 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1130 } else { 1131 sc->sc_eintrs &= ~OHCI_RHSC; 1132 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1133 } 1134 } 1135 1136 void 1137 ohci_rhsc_enable(void *v_sc) 1138 { 1139 struct ohci_softc *sc = v_sc; 1140 int s; 1141 1142 if (sc->sc_bus.dying) 1143 return; 1144 1145 s = splhardusb(); 1146 ohci_rhsc(sc, sc->sc_intrxfer); 1147 DPRINTFN(2, ("%s: rhsc interrupt enabled\n", 1148 sc->sc_bus.bdev.dv_xname)); 1149 1150 ohci_rhsc_able(sc, 1); 1151 splx(s); 1152 } 1153 1154 #ifdef OHCI_DEBUG 1155 char *ohci_cc_strs[] = { 1156 "NO_ERROR", 1157 "CRC", 1158 "BIT_STUFFING", 1159 "DATA_TOGGLE_MISMATCH", 1160 "STALL", 1161 "DEVICE_NOT_RESPONDING", 1162 "PID_CHECK_FAILURE", 1163 "UNEXPECTED_PID", 1164 "DATA_OVERRUN", 1165 "DATA_UNDERRUN", 1166 "BUFFER_OVERRUN", 1167 "BUFFER_UNDERRUN", 1168 "reserved", 1169 "reserved", 1170 "NOT_ACCESSED", 1171 "NOT_ACCESSED", 1172 }; 1173 #endif 1174 1175 void 1176 ohci_add_done(struct ohci_softc *sc, ohci_physaddr_t done) 1177 { 1178 struct ohci_soft_itd *sitd, *sidone, **ip; 1179 struct ohci_soft_td *std, *sdone, **p; 1180 1181 /* Reverse the done list. */ 1182 for (sdone = NULL, sidone = NULL; done != 0; ) { 1183 std = ohci_hash_find_td(sc, done); 1184 if (std != NULL) { 1185 std->dnext = sdone; 1186 done = letoh32(std->td.td_nexttd); 1187 sdone = std; 1188 DPRINTFN(10,("add TD %p\n", std)); 1189 continue; 1190 } 1191 sitd = ohci_hash_find_itd(sc, done); 1192 if (sitd != NULL) { 1193 sitd->dnext = sidone; 1194 done = letoh32(sitd->itd.itd_nextitd); 1195 sidone = sitd; 1196 DPRINTFN(5,("add ITD %p\n", sitd)); 1197 continue; 1198 } 1199 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1200 } 1201 1202 /* sdone & sidone now hold the done lists. */ 1203 /* Put them on the already processed lists. */ 1204 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1205 ; 1206 *p = sdone; 1207 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1208 ; 1209 *ip = sidone; 1210 } 1211 1212 void 1213 ohci_softintr(void *v) 1214 { 1215 struct ohci_softc *sc = v; 1216 struct ohci_soft_itd *sitd, *sidone, *sitdnext; 1217 struct ohci_soft_td *std, *sdone, *stdnext; 1218 struct usbd_xfer *xfer; 1219 struct ohci_pipe *opipe; 1220 int len, cc, s; 1221 int i, j, actlen, iframes, uedir; 1222 1223 DPRINTFN(10,("ohci_softintr: enter\n")); 1224 1225 if (sc->sc_bus.dying) 1226 return; 1227 1228 sc->sc_bus.intr_context++; 1229 1230 s = splhardusb(); 1231 sdone = sc->sc_sdone; 1232 sc->sc_sdone = NULL; 1233 sidone = sc->sc_sidone; 1234 sc->sc_sidone = NULL; 1235 splx(s); 1236 1237 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1238 1239 #ifdef OHCI_DEBUG 1240 if (ohcidebug > 10) { 1241 DPRINTF(("ohci_process_done: TD done:\n")); 1242 ohci_dump_tds(sdone); 1243 } 1244 #endif 1245 1246 for (std = sdone; std; std = stdnext) { 1247 xfer = std->xfer; 1248 stdnext = std->dnext; 1249 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1250 std, xfer, xfer ? xfer->hcpriv : 0)); 1251 if (xfer == NULL) { 1252 /* 1253 * xfer == NULL: There seems to be no xfer associated 1254 * with this TD. It is tailp that happened to end up on 1255 * the done queue. 1256 * Shouldn't happen, but some chips are broken(?). 1257 */ 1258 continue; 1259 } 1260 if (xfer->status == USBD_CANCELLED || 1261 xfer->status == USBD_TIMEOUT) { 1262 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1263 xfer)); 1264 /* Handled by abort routine. */ 1265 continue; 1266 } 1267 timeout_del(&xfer->timeout_handle); 1268 usb_rem_task(xfer->device, &xfer->abort_task); 1269 1270 len = std->len; 1271 if (std->td.td_cbp != 0) 1272 len -= letoh32(std->td.td_be) - 1273 letoh32(std->td.td_cbp) + 1; 1274 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1275 std->flags)); 1276 if (std->flags & OHCI_ADD_LEN) 1277 xfer->actlen += len; 1278 1279 cc = OHCI_TD_GET_CC(letoh32(std->td.td_flags)); 1280 if (cc == OHCI_CC_NO_ERROR) { 1281 if (std->flags & OHCI_CALL_DONE) { 1282 xfer->status = USBD_NORMAL_COMPLETION; 1283 s = splusb(); 1284 usb_transfer_complete(xfer); 1285 splx(s); 1286 } 1287 ohci_free_std(sc, std); 1288 } else { 1289 /* 1290 * Endpoint is halted. First unlink all the TDs 1291 * belonging to the failed transfer, and then restart 1292 * the endpoint. 1293 */ 1294 struct ohci_soft_td *p, *n; 1295 opipe = (struct ohci_pipe *)xfer->pipe; 1296 1297 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1298 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1299 ohci_cc_strs[OHCI_TD_GET_CC(letoh32(std->td.td_flags))])); 1300 1301 /* remove TDs */ 1302 for (p = std; p->xfer == xfer; p = n) { 1303 n = p->nexttd; 1304 ohci_free_std(sc, p); 1305 } 1306 1307 /* clear halt */ 1308 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1309 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1310 1311 if (cc == OHCI_CC_STALL) 1312 xfer->status = USBD_STALLED; 1313 else if (cc == OHCI_CC_DATA_UNDERRUN) 1314 xfer->status = USBD_NORMAL_COMPLETION; 1315 else 1316 xfer->status = USBD_IOERROR; 1317 s = splusb(); 1318 usb_transfer_complete(xfer); 1319 splx(s); 1320 } 1321 } 1322 1323 #ifdef OHCI_DEBUG 1324 if (ohcidebug > 10) { 1325 DPRINTF(("ohci_softintr: ITD done:\n")); 1326 ohci_dump_itds(sidone); 1327 } 1328 #endif 1329 1330 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1331 xfer = sitd->xfer; 1332 sitdnext = sitd->dnext; 1333 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1334 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1335 if (xfer == NULL) 1336 continue; 1337 if (xfer->status == USBD_CANCELLED || 1338 xfer->status == USBD_TIMEOUT) { 1339 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1340 xfer)); 1341 /* Handled by abort routine. */ 1342 continue; 1343 } 1344 #ifdef DIAGNOSTIC 1345 if (sitd->isdone) 1346 printf("ohci_softintr: sitd=%p is done\n", sitd); 1347 sitd->isdone = 1; 1348 #endif 1349 if (sitd->flags & OHCI_CALL_DONE) { 1350 struct ohci_soft_itd *next; 1351 1352 opipe = (struct ohci_pipe *)xfer->pipe; 1353 opipe->u.iso.inuse -= xfer->nframes; 1354 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1355 bEndpointAddress); 1356 xfer->status = USBD_NORMAL_COMPLETION; 1357 actlen = 0; 1358 for (i = 0, sitd = xfer->hcpriv; ; 1359 sitd = next) { 1360 next = sitd->nextitd; 1361 if (OHCI_ITD_GET_CC(letoh32(sitd-> 1362 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1363 xfer->status = USBD_IOERROR; 1364 /* For input, update frlengths with actual */ 1365 /* XXX anything necessary for output? */ 1366 if (uedir == UE_DIR_IN && 1367 xfer->status == USBD_NORMAL_COMPLETION) { 1368 iframes = OHCI_ITD_GET_FC(letoh32( 1369 sitd->itd.itd_flags)); 1370 for (j = 0; j < iframes; i++, j++) { 1371 len = letoh16(sitd-> 1372 itd.itd_offset[j]); 1373 if ((OHCI_ITD_PSW_GET_CC(len) & 1374 OHCI_CC_NOT_ACCESSED_MASK) 1375 == OHCI_CC_NOT_ACCESSED) 1376 len = 0; 1377 else 1378 len = OHCI_ITD_PSW_LENGTH(len); 1379 xfer->frlengths[i] = len; 1380 actlen += len; 1381 } 1382 } 1383 if (sitd->flags & OHCI_CALL_DONE) 1384 break; 1385 ohci_free_sitd(sc, sitd); 1386 } 1387 ohci_free_sitd(sc, sitd); 1388 if (uedir == UE_DIR_IN && 1389 xfer->status == USBD_NORMAL_COMPLETION) 1390 xfer->actlen = actlen; 1391 xfer->hcpriv = NULL; 1392 1393 s = splusb(); 1394 usb_transfer_complete(xfer); 1395 splx(s); 1396 } 1397 } 1398 1399 if (sc->sc_softwake) { 1400 sc->sc_softwake = 0; 1401 wakeup(&sc->sc_softwake); 1402 } 1403 1404 sc->sc_bus.intr_context--; 1405 DPRINTFN(10,("ohci_softintr: done:\n")); 1406 } 1407 1408 void 1409 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1410 { 1411 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1412 1413 #ifdef DIAGNOSTIC 1414 if (!(xfer->rqflags & URQ_REQUEST)) { 1415 panic("ohci_device_ctrl_done: not a request"); 1416 } 1417 #endif 1418 } 1419 1420 void 1421 ohci_device_intr_done(struct usbd_xfer *xfer) 1422 { 1423 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1424 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1425 struct ohci_soft_ed *sed = opipe->sed; 1426 struct ohci_soft_td *data, *tail; 1427 1428 1429 DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer, 1430 xfer->actlen)); 1431 1432 if (xfer->pipe->repeat) { 1433 data = opipe->tail.td; 1434 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1435 if (tail == NULL) { 1436 xfer->status = USBD_NOMEM; 1437 return; 1438 } 1439 tail->xfer = NULL; 1440 1441 data->td.td_flags = htole32( 1442 OHCI_TD_IN | OHCI_TD_NOCC | 1443 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1444 if (xfer->flags & USBD_SHORT_XFER_OK) 1445 data->td.td_flags |= htole32(OHCI_TD_R); 1446 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1447 data->nexttd = tail; 1448 data->td.td_nexttd = htole32(tail->physaddr); 1449 data->td.td_be = htole32(letoh32(data->td.td_cbp) + 1450 xfer->length - 1); 1451 data->len = xfer->length; 1452 data->xfer = xfer; 1453 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1454 xfer->hcpriv = data; 1455 xfer->actlen = 0; 1456 1457 sed->ed.ed_tailp = htole32(tail->physaddr); 1458 opipe->tail.td = tail; 1459 } 1460 } 1461 1462 void 1463 ohci_device_bulk_done(struct usbd_xfer *xfer) 1464 { 1465 DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer, 1466 xfer->actlen)); 1467 } 1468 1469 void 1470 ohci_rhsc(struct ohci_softc *sc, struct usbd_xfer *xfer) 1471 { 1472 u_char *p; 1473 int i, m; 1474 int hstatus; 1475 1476 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1477 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1478 sc, xfer, hstatus)); 1479 1480 if (xfer == NULL) { 1481 /* Just ignore the change. */ 1482 return; 1483 } 1484 1485 p = KERNADDR(&xfer->dmabuf, 0); 1486 m = min(sc->sc_noport, xfer->length * 8 - 1); 1487 memset(p, 0, xfer->length); 1488 for (i = 1; i <= m; i++) { 1489 /* Pick out CHANGE bits from the status reg. */ 1490 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1491 p[i/8] |= 1 << (i%8); 1492 } 1493 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1494 xfer->actlen = xfer->length; 1495 xfer->status = USBD_NORMAL_COMPLETION; 1496 1497 usb_transfer_complete(xfer); 1498 } 1499 1500 void 1501 ohci_root_intr_done(struct usbd_xfer *xfer) 1502 { 1503 } 1504 1505 void 1506 ohci_root_ctrl_done(struct usbd_xfer *xfer) 1507 { 1508 } 1509 1510 /* 1511 * Wait here until controller claims to have an interrupt. 1512 * Then call ohci_intr and return. Use timeout to avoid waiting 1513 * too long. 1514 */ 1515 void 1516 ohci_waitintr(struct ohci_softc *sc, struct usbd_xfer *xfer) 1517 { 1518 int timo; 1519 u_int32_t intrs; 1520 1521 xfer->status = USBD_IN_PROGRESS; 1522 for (timo = xfer->timeout; timo >= 0; timo--) { 1523 usb_delay_ms(&sc->sc_bus, 1); 1524 if (sc->sc_bus.dying) 1525 break; 1526 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1527 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1528 #ifdef OHCI_DEBUG 1529 if (ohcidebug > 15) 1530 ohci_dumpregs(sc); 1531 #endif 1532 if (intrs) { 1533 ohci_intr1(sc); 1534 if (xfer->status != USBD_IN_PROGRESS) 1535 return; 1536 } 1537 } 1538 1539 /* Timeout */ 1540 DPRINTF(("ohci_waitintr: timeout\n")); 1541 xfer->status = USBD_TIMEOUT; 1542 usb_transfer_complete(xfer); 1543 /* XXX should free TD */ 1544 } 1545 1546 void 1547 ohci_poll(struct usbd_bus *bus) 1548 { 1549 struct ohci_softc *sc = (struct ohci_softc *)bus; 1550 #ifdef OHCI_DEBUG 1551 static int last; 1552 int new; 1553 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1554 if (new != last) { 1555 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1556 last = new; 1557 } 1558 #endif 1559 1560 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1561 ohci_intr1(sc); 1562 } 1563 1564 usbd_status 1565 ohci_device_request(struct usbd_xfer *xfer) 1566 { 1567 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1568 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1569 usb_device_request_t *req = &xfer->request; 1570 struct ohci_soft_td *setup, *stat, *next, *tail; 1571 struct ohci_soft_ed *sed; 1572 u_int len; 1573 usbd_status err; 1574 int s; 1575 1576 len = UGETW(req->wLength); 1577 1578 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1579 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 1580 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1581 UGETW(req->wIndex), len, xfer->device->address, 1582 xfer->pipe->endpoint->edesc->bEndpointAddress)); 1583 1584 setup = opipe->tail.td; 1585 stat = ohci_alloc_std(sc); 1586 if (stat == NULL) { 1587 err = USBD_NOMEM; 1588 goto bad1; 1589 } 1590 tail = ohci_alloc_std(sc); 1591 if (tail == NULL) { 1592 err = USBD_NOMEM; 1593 goto bad2; 1594 } 1595 tail->xfer = NULL; 1596 1597 sed = opipe->sed; 1598 1599 next = stat; 1600 1601 /* Set up data transaction */ 1602 if (len != 0) { 1603 struct ohci_soft_td *std = stat; 1604 1605 err = ohci_alloc_std_chain(sc, len, xfer, std, &stat); 1606 stat = stat->nexttd; /* point at free TD */ 1607 if (err) 1608 goto bad3; 1609 /* Start toggle at 1 and then use the carried toggle. */ 1610 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1611 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1612 } 1613 1614 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1615 1616 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1617 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1618 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1619 setup->nexttd = next; 1620 setup->td.td_nexttd = htole32(next->physaddr); 1621 setup->td.td_be = htole32(letoh32(setup->td.td_cbp) + sizeof *req - 1); 1622 setup->len = 0; 1623 setup->xfer = xfer; 1624 setup->flags = 0; 1625 xfer->hcpriv = setup; 1626 1627 stat->td.td_flags = htole32( 1628 (usbd_xfer_isread(xfer) ? OHCI_TD_OUT : OHCI_TD_IN) | 1629 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1630 stat->td.td_cbp = 0; 1631 stat->nexttd = tail; 1632 stat->td.td_nexttd = htole32(tail->physaddr); 1633 stat->td.td_be = 0; 1634 stat->flags = OHCI_CALL_DONE; 1635 stat->len = 0; 1636 stat->xfer = xfer; 1637 1638 #ifdef OHCI_DEBUG 1639 if (ohcidebug > 5) { 1640 DPRINTF(("ohci_device_request:\n")); 1641 ohci_dump_ed(sed); 1642 ohci_dump_tds(setup); 1643 } 1644 #endif 1645 1646 /* Insert ED in schedule */ 1647 s = splusb(); 1648 sed->ed.ed_tailp = htole32(tail->physaddr); 1649 opipe->tail.td = tail; 1650 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1651 if (xfer->timeout && !sc->sc_bus.use_polling) { 1652 timeout_del(&xfer->timeout_handle); 1653 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 1654 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1655 } 1656 splx(s); 1657 1658 #ifdef OHCI_DEBUG 1659 if (ohcidebug > 20) { 1660 delay(10000); 1661 DPRINTF(("ohci_device_request: status=%x\n", 1662 OREAD4(sc, OHCI_COMMAND_STATUS))); 1663 ohci_dumpregs(sc); 1664 printf("ctrl head:\n"); 1665 ohci_dump_ed(sc->sc_ctrl_head); 1666 printf("sed:\n"); 1667 ohci_dump_ed(sed); 1668 ohci_dump_tds(setup); 1669 } 1670 #endif 1671 1672 return (USBD_NORMAL_COMPLETION); 1673 1674 bad3: 1675 ohci_free_std(sc, tail); 1676 bad2: 1677 ohci_free_std(sc, stat); 1678 bad1: 1679 return (err); 1680 } 1681 1682 /* 1683 * Add an ED to the schedule. Called at splusb(). 1684 */ 1685 void 1686 ohci_add_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1687 { 1688 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1689 1690 SPLUSBCHECK; 1691 sed->next = head->next; 1692 sed->ed.ed_nexted = head->ed.ed_nexted; 1693 head->next = sed; 1694 head->ed.ed_nexted = htole32(sed->physaddr); 1695 } 1696 1697 /* 1698 * Remove an ED from the schedule. Called at splusb(). 1699 */ 1700 void 1701 ohci_rem_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1702 { 1703 struct ohci_soft_ed *p; 1704 1705 SPLUSBCHECK; 1706 1707 /* XXX */ 1708 for (p = head; p != NULL && p->next != sed; p = p->next) 1709 ; 1710 if (p == NULL) 1711 panic("ohci_rem_ed: ED not found"); 1712 p->next = sed->next; 1713 p->ed.ed_nexted = sed->ed.ed_nexted; 1714 } 1715 1716 /* 1717 * When a transfer is completed the TD is added to the done queue by 1718 * the host controller. This queue is the processed by software. 1719 * Unfortunately the queue contains the physical address of the TD 1720 * and we have no simple way to translate this back to a kernel address. 1721 * To make the translation possible (and fast) we use a hash table of 1722 * TDs currently in the schedule. The physical address is used as the 1723 * hash value. 1724 */ 1725 1726 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1727 /* Called at splusb() */ 1728 void 1729 ohci_hash_add_td(struct ohci_softc *sc, struct ohci_soft_td *std) 1730 { 1731 int h = HASH(std->physaddr); 1732 1733 SPLUSBCHECK; 1734 1735 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1736 } 1737 1738 struct ohci_soft_td * 1739 ohci_hash_find_td(struct ohci_softc *sc, ohci_physaddr_t a) 1740 { 1741 int h = HASH(a); 1742 struct ohci_soft_td *std; 1743 1744 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1745 std != NULL; 1746 std = LIST_NEXT(std, hnext)) 1747 if (std->physaddr == a) 1748 return (std); 1749 return (NULL); 1750 } 1751 1752 /* Called at splusb() */ 1753 void 1754 ohci_hash_add_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1755 { 1756 int h = HASH(sitd->physaddr); 1757 1758 SPLUSBCHECK; 1759 1760 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1761 sitd, (u_long)sitd->physaddr)); 1762 1763 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1764 } 1765 1766 /* Called at splusb() */ 1767 void 1768 ohci_hash_rem_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1769 { 1770 SPLUSBCHECK; 1771 1772 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1773 sitd, (u_long)sitd->physaddr)); 1774 1775 LIST_REMOVE(sitd, hnext); 1776 } 1777 1778 struct ohci_soft_itd * 1779 ohci_hash_find_itd(struct ohci_softc *sc, ohci_physaddr_t a) 1780 { 1781 int h = HASH(a); 1782 struct ohci_soft_itd *sitd; 1783 1784 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1785 sitd != NULL; 1786 sitd = LIST_NEXT(sitd, hnext)) 1787 if (sitd->physaddr == a) 1788 return (sitd); 1789 return (NULL); 1790 } 1791 1792 void 1793 ohci_timeout(void *addr) 1794 { 1795 struct usbd_xfer *xfer = addr; 1796 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1797 1798 if (sc->sc_bus.dying) { 1799 ohci_timeout_task(addr); 1800 return; 1801 } 1802 1803 usb_init_task(&xfer->abort_task, ohci_timeout_task, addr, 1804 USB_TASK_TYPE_ABORT); 1805 usb_add_task(xfer->device, &xfer->abort_task); 1806 } 1807 1808 void 1809 ohci_timeout_task(void *addr) 1810 { 1811 struct usbd_xfer *xfer = addr; 1812 int s; 1813 1814 DPRINTF(("%s: xfer=%p\n", __func__, xfer)); 1815 1816 s = splusb(); 1817 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1818 splx(s); 1819 } 1820 1821 #ifdef OHCI_DEBUG 1822 void 1823 ohci_dump_tds(struct ohci_soft_td *std) 1824 { 1825 for (; std; std = std->nexttd) 1826 ohci_dump_td(std); 1827 } 1828 1829 void 1830 ohci_dump_td(struct ohci_soft_td *std) 1831 { 1832 char sbuf[128]; 1833 1834 bitmask_snprintf((u_int32_t)letoh32(std->td.td_flags), 1835 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1836 sbuf, sizeof(sbuf)); 1837 1838 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1839 "nexttd=0x%08lx be=0x%08lx\n", 1840 std, (u_long)std->physaddr, sbuf, 1841 OHCI_TD_GET_DI(letoh32(std->td.td_flags)), 1842 OHCI_TD_GET_EC(letoh32(std->td.td_flags)), 1843 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1844 (u_long)letoh32(std->td.td_cbp), 1845 (u_long)letoh32(std->td.td_nexttd), 1846 (u_long)letoh32(std->td.td_be)); 1847 } 1848 1849 void 1850 ohci_dump_itd(struct ohci_soft_itd *sitd) 1851 { 1852 int i; 1853 1854 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1855 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1856 sitd, (u_long)sitd->physaddr, 1857 OHCI_ITD_GET_SF(letoh32(sitd->itd.itd_flags)), 1858 OHCI_ITD_GET_DI(letoh32(sitd->itd.itd_flags)), 1859 OHCI_ITD_GET_FC(letoh32(sitd->itd.itd_flags)), 1860 OHCI_ITD_GET_CC(letoh32(sitd->itd.itd_flags)), 1861 (u_long)letoh32(sitd->itd.itd_bp0), 1862 (u_long)letoh32(sitd->itd.itd_nextitd), 1863 (u_long)letoh32(sitd->itd.itd_be)); 1864 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1865 printf("offs[%d]=0x%04x ", i, 1866 (u_int)letoh16(sitd->itd.itd_offset[i])); 1867 printf("\n"); 1868 } 1869 1870 void 1871 ohci_dump_itds(struct ohci_soft_itd *sitd) 1872 { 1873 for (; sitd; sitd = sitd->nextitd) 1874 ohci_dump_itd(sitd); 1875 } 1876 1877 void 1878 ohci_dump_ed(struct ohci_soft_ed *sed) 1879 { 1880 char sbuf[128], sbuf2[128]; 1881 1882 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_flags), 1883 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1884 sbuf, sizeof(sbuf)); 1885 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_headp), 1886 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1887 1888 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n" 1889 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1890 sed, (u_long)sed->physaddr, 1891 OHCI_ED_GET_FA(letoh32(sed->ed.ed_flags)), 1892 OHCI_ED_GET_EN(letoh32(sed->ed.ed_flags)), 1893 OHCI_ED_GET_MAXP(letoh32(sed->ed.ed_flags)), sbuf, 1894 (u_long)letoh32(sed->ed.ed_tailp), sbuf2, 1895 (u_long)letoh32(sed->ed.ed_headp), 1896 (u_long)letoh32(sed->ed.ed_nexted)); 1897 } 1898 #endif 1899 1900 usbd_status 1901 ohci_open(struct usbd_pipe *pipe) 1902 { 1903 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 1904 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1905 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1906 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1907 struct ohci_soft_ed *sed = NULL; 1908 struct ohci_soft_td *std = NULL; 1909 struct ohci_soft_itd *sitd; 1910 ohci_physaddr_t tdphys; 1911 u_int32_t fmt; 1912 usbd_status err; 1913 int s; 1914 int ival; 1915 1916 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d\n", 1917 pipe, pipe->device->address, ed->bEndpointAddress)); 1918 1919 if (sc->sc_bus.dying) 1920 return (USBD_IOERROR); 1921 1922 /* Root Hub */ 1923 if (pipe->device->depth == 0) { 1924 switch (ed->bEndpointAddress) { 1925 case USB_CONTROL_ENDPOINT: 1926 pipe->methods = &ohci_root_ctrl_methods; 1927 break; 1928 case UE_DIR_IN | OHCI_INTR_ENDPT: 1929 pipe->methods = &ohci_root_intr_methods; 1930 break; 1931 default: 1932 return (USBD_INVAL); 1933 } 1934 } else { 1935 sed = ohci_alloc_sed(sc); 1936 if (sed == NULL) 1937 goto bad0; 1938 opipe->sed = sed; 1939 if (xfertype == UE_ISOCHRONOUS) { 1940 sitd = ohci_alloc_sitd(sc); 1941 if (sitd == NULL) 1942 goto bad1; 1943 opipe->tail.itd = sitd; 1944 tdphys = sitd->physaddr; 1945 fmt = OHCI_ED_FORMAT_ISO; 1946 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1947 fmt |= OHCI_ED_DIR_IN; 1948 else 1949 fmt |= OHCI_ED_DIR_OUT; 1950 } else { 1951 std = ohci_alloc_std(sc); 1952 if (std == NULL) 1953 goto bad1; 1954 opipe->tail.td = std; 1955 tdphys = std->physaddr; 1956 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1957 } 1958 sed->ed.ed_flags = htole32( 1959 OHCI_ED_SET_FA(pipe->device->address) | 1960 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 1961 (pipe->device->speed == USB_SPEED_LOW ? 1962 OHCI_ED_SPEED : 0) | 1963 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1964 sed->ed.ed_headp = htole32(tdphys | 1965 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0)); 1966 sed->ed.ed_tailp = htole32(tdphys); 1967 1968 switch (xfertype) { 1969 case UE_CONTROL: 1970 pipe->methods = &ohci_device_ctrl_methods; 1971 err = usb_allocmem(&sc->sc_bus, 1972 sizeof(usb_device_request_t), 1973 0, &opipe->u.ctl.reqdma); 1974 if (err) 1975 goto bad; 1976 s = splusb(); 1977 ohci_add_ed(sed, sc->sc_ctrl_head); 1978 splx(s); 1979 break; 1980 case UE_INTERRUPT: 1981 pipe->methods = &ohci_device_intr_methods; 1982 ival = pipe->interval; 1983 if (ival == USBD_DEFAULT_INTERVAL) 1984 ival = ed->bInterval; 1985 return (ohci_device_setintr(sc, opipe, ival)); 1986 case UE_ISOCHRONOUS: 1987 pipe->methods = &ohci_device_isoc_methods; 1988 return (ohci_setup_isoc(pipe)); 1989 case UE_BULK: 1990 pipe->methods = &ohci_device_bulk_methods; 1991 s = splusb(); 1992 ohci_add_ed(sed, sc->sc_bulk_head); 1993 splx(s); 1994 break; 1995 } 1996 } 1997 return (USBD_NORMAL_COMPLETION); 1998 1999 bad: 2000 if (std != NULL) 2001 ohci_free_std(sc, std); 2002 bad1: 2003 if (sed != NULL) 2004 ohci_free_sed(sc, sed); 2005 bad0: 2006 return (USBD_NOMEM); 2007 2008 } 2009 2010 /* 2011 * Work around the half configured control (default) pipe when setting 2012 * the address of a device. 2013 * 2014 * Because a single ED is setup per endpoint in ohci_open(), and the 2015 * control pipe is configured before we could have set the address 2016 * of the device or read the wMaxPacketSize of the endpoint, we have 2017 * to re-open the pipe twice here. 2018 */ 2019 int 2020 ohci_setaddr(struct usbd_device *dev, int addr) 2021 { 2022 /* Root Hub */ 2023 if (dev->depth == 0) 2024 return (0); 2025 2026 /* Re-establish the default pipe with the new max packet size. */ 2027 ohci_device_ctrl_close(dev->default_pipe); 2028 if (ohci_open(dev->default_pipe)) 2029 return (EINVAL); 2030 2031 if (usbd_set_address(dev, addr)) 2032 return (1); 2033 2034 dev->address = addr; 2035 2036 /* Re-establish the default pipe with the new address. */ 2037 ohci_device_ctrl_close(dev->default_pipe); 2038 if (ohci_open(dev->default_pipe)) 2039 return (EINVAL); 2040 2041 return (0); 2042 } 2043 2044 /* 2045 * Close a reqular pipe. 2046 * Assumes that there are no pending transactions. 2047 */ 2048 void 2049 ohci_close_pipe(struct usbd_pipe *pipe, struct ohci_soft_ed *head) 2050 { 2051 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2052 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2053 struct ohci_soft_ed *sed = opipe->sed; 2054 int s; 2055 2056 s = splusb(); 2057 #ifdef DIAGNOSTIC 2058 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2059 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2060 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2061 struct ohci_soft_td *std; 2062 std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp)); 2063 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2064 "tl=0x%x pipe=%p, std=%p\n", sed, 2065 (int)letoh32(sed->ed.ed_headp), 2066 (int)letoh32(sed->ed.ed_tailp), 2067 pipe, std); 2068 #ifdef USB_DEBUG 2069 usbd_dump_pipe(pipe); 2070 #endif 2071 #ifdef OHCI_DEBUG 2072 ohci_dump_ed(sed); 2073 if (std) 2074 ohci_dump_td(std); 2075 #endif 2076 usb_delay_ms(&sc->sc_bus, 2); 2077 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2078 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2079 printf("ohci_close_pipe: pipe still not empty\n"); 2080 } 2081 #endif 2082 ohci_rem_ed(sed, head); 2083 /* Make sure the host controller is not touching this ED */ 2084 usb_delay_ms(&sc->sc_bus, 1); 2085 splx(s); 2086 pipe->endpoint->savedtoggle = 2087 (letoh32(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2088 ohci_free_sed(sc, opipe->sed); 2089 } 2090 2091 /* 2092 * Abort a device request. 2093 * If this routine is called at splusb() it guarantees that the request 2094 * will be removed from the hardware scheduling and that the callback 2095 * for it will be called with USBD_CANCELLED status. 2096 * It's impossible to guarantee that the requested transfer will not 2097 * have happened since the hardware runs concurrently. 2098 * If the transaction has already happened we rely on the ordinary 2099 * interrupt processing to process it. 2100 */ 2101 void 2102 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2103 { 2104 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2105 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2106 struct ohci_soft_ed *sed = opipe->sed; 2107 struct ohci_soft_td *p, *n; 2108 ohci_physaddr_t headp; 2109 int s, hit; 2110 2111 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe, 2112 sed)); 2113 2114 if (sc->sc_bus.dying) { 2115 /* If we're dying, just do the software part. */ 2116 s = splusb(); 2117 xfer->status = status; /* make software ignore it */ 2118 timeout_del(&xfer->timeout_handle); 2119 usb_rem_task(xfer->device, &xfer->abort_task); 2120 usb_transfer_complete(xfer); 2121 splx(s); 2122 return; 2123 } 2124 2125 if (xfer->device->bus->intr_context || !curproc) 2126 panic("ohci_abort_xfer: not in process context"); 2127 2128 /* 2129 * Step 1: Make interrupt routine and hardware ignore xfer. 2130 */ 2131 s = splusb(); 2132 xfer->status = status; /* make software ignore it */ 2133 timeout_del(&xfer->timeout_handle); 2134 usb_rem_task(xfer->device, &xfer->abort_task); 2135 splx(s); 2136 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2137 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2138 2139 /* 2140 * Step 2: Wait until we know hardware has finished any possible 2141 * use of the xfer. Also make sure the soft interrupt routine 2142 * has run. 2143 */ 2144 usb_delay_ms(xfer->device->bus, 20); /* Hardware finishes in 1ms */ 2145 s = splusb(); 2146 sc->sc_softwake = 1; 2147 usb_schedsoftintr(&sc->sc_bus); 2148 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2149 splx(s); 2150 2151 /* 2152 * Step 3: Remove any vestiges of the xfer from the hardware. 2153 * The complication here is that the hardware may have executed 2154 * beyond the xfer we're trying to abort. So as we're scanning 2155 * the TDs of this xfer we check if the hardware points to 2156 * any of them. 2157 */ 2158 s = splusb(); /* XXX why? */ 2159 p = xfer->hcpriv; 2160 #ifdef DIAGNOSTIC 2161 if (p == NULL) { 2162 splx(s); 2163 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2164 return; 2165 } 2166 #endif 2167 #ifdef OHCI_DEBUG 2168 if (ohcidebug > 1) { 2169 DPRINTF(("ohci_abort_xfer: sed=\n")); 2170 ohci_dump_ed(sed); 2171 ohci_dump_tds(p); 2172 } 2173 #endif 2174 headp = letoh32(sed->ed.ed_headp) & OHCI_HEADMASK; 2175 hit = 0; 2176 for (; p->xfer == xfer; p = n) { 2177 hit |= headp == p->physaddr; 2178 n = p->nexttd; 2179 if (OHCI_TD_GET_CC(letoh32(p->td.td_flags)) == 2180 OHCI_CC_NOT_ACCESSED) 2181 ohci_free_std(sc, p); 2182 } 2183 /* Zap headp register if hardware pointed inside the xfer. */ 2184 if (hit) { 2185 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2186 (int)p->physaddr, (int)letoh32(sed->ed.ed_tailp))); 2187 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2188 } else { 2189 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2190 } 2191 2192 /* 2193 * Step 4: Turn on hardware again. 2194 */ 2195 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2196 2197 /* 2198 * Step 5: Execute callback. 2199 */ 2200 usb_transfer_complete(xfer); 2201 2202 splx(s); 2203 } 2204 2205 /* 2206 * Data structures and routines to emulate the root hub. 2207 */ 2208 usb_device_descriptor_t ohci_devd = { 2209 USB_DEVICE_DESCRIPTOR_SIZE, 2210 UDESC_DEVICE, /* type */ 2211 {0x00, 0x01}, /* USB version */ 2212 UDCLASS_HUB, /* class */ 2213 UDSUBCLASS_HUB, /* subclass */ 2214 UDPROTO_FSHUB, 2215 64, /* max packet */ 2216 {0},{0},{0x00,0x01}, /* device id */ 2217 1,2,0, /* string indices */ 2218 1 /* # of configurations */ 2219 }; 2220 2221 usb_config_descriptor_t ohci_confd = { 2222 USB_CONFIG_DESCRIPTOR_SIZE, 2223 UDESC_CONFIG, 2224 {USB_CONFIG_DESCRIPTOR_SIZE + 2225 USB_INTERFACE_DESCRIPTOR_SIZE + 2226 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2227 1, 2228 1, 2229 0, 2230 UC_SELF_POWERED, 2231 0 /* max power */ 2232 }; 2233 2234 usb_interface_descriptor_t ohci_ifcd = { 2235 USB_INTERFACE_DESCRIPTOR_SIZE, 2236 UDESC_INTERFACE, 2237 0, 2238 0, 2239 1, 2240 UICLASS_HUB, 2241 UISUBCLASS_HUB, 2242 UIPROTO_FSHUB, 2243 0 2244 }; 2245 2246 usb_endpoint_descriptor_t ohci_endpd = { 2247 USB_ENDPOINT_DESCRIPTOR_SIZE, 2248 UDESC_ENDPOINT, 2249 UE_DIR_IN | OHCI_INTR_ENDPT, 2250 UE_INTERRUPT, 2251 {8, 0}, /* max packet */ 2252 255 2253 }; 2254 2255 usb_hub_descriptor_t ohci_hubd = { 2256 USB_HUB_DESCRIPTOR_SIZE, 2257 UDESC_HUB, 2258 0, 2259 {0,0}, 2260 0, 2261 0, 2262 {0}, 2263 }; 2264 2265 /* 2266 * Simulate a hardware hub by handling all the necessary requests. 2267 */ 2268 usbd_status 2269 ohci_root_ctrl_transfer(struct usbd_xfer *xfer) 2270 { 2271 usbd_status err; 2272 2273 /* Insert last in queue. */ 2274 err = usb_insert_transfer(xfer); 2275 if (err) 2276 return (err); 2277 2278 /* Pipe isn't running, start first */ 2279 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2280 } 2281 2282 usbd_status 2283 ohci_root_ctrl_start(struct usbd_xfer *xfer) 2284 { 2285 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2286 usb_device_request_t *req; 2287 void *buf = NULL; 2288 int port, i; 2289 int s, len, value, index, l, totlen = 0; 2290 usb_port_status_t ps; 2291 usb_hub_descriptor_t hubd; 2292 usbd_status err; 2293 u_int32_t v; 2294 2295 if (sc->sc_bus.dying) 2296 return (USBD_IOERROR); 2297 2298 #ifdef DIAGNOSTIC 2299 if (!(xfer->rqflags & URQ_REQUEST)) 2300 /* XXX panic */ 2301 return (USBD_INVAL); 2302 #endif 2303 req = &xfer->request; 2304 2305 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2306 req->bmRequestType, req->bRequest)); 2307 2308 len = UGETW(req->wLength); 2309 value = UGETW(req->wValue); 2310 index = UGETW(req->wIndex); 2311 2312 if (len != 0) 2313 buf = KERNADDR(&xfer->dmabuf, 0); 2314 2315 #define C(x,y) ((x) | ((y) << 8)) 2316 switch(C(req->bRequest, req->bmRequestType)) { 2317 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2318 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2319 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2320 /* 2321 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2322 * for the integrated root hub. 2323 */ 2324 break; 2325 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2326 if (len > 0) { 2327 *(u_int8_t *)buf = sc->sc_conf; 2328 totlen = 1; 2329 } 2330 break; 2331 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2332 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2333 switch(value >> 8) { 2334 case UDESC_DEVICE: 2335 if ((value & 0xff) != 0) { 2336 err = USBD_IOERROR; 2337 goto ret; 2338 } 2339 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2340 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2341 memcpy(buf, &ohci_devd, l); 2342 break; 2343 case UDESC_CONFIG: 2344 if ((value & 0xff) != 0) { 2345 err = USBD_IOERROR; 2346 goto ret; 2347 } 2348 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2349 memcpy(buf, &ohci_confd, l); 2350 buf = (char *)buf + l; 2351 len -= l; 2352 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2353 totlen += l; 2354 memcpy(buf, &ohci_ifcd, l); 2355 buf = (char *)buf + l; 2356 len -= l; 2357 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2358 totlen += l; 2359 memcpy(buf, &ohci_endpd, l); 2360 break; 2361 case UDESC_STRING: 2362 if (len == 0) 2363 break; 2364 *(u_int8_t *)buf = 0; 2365 totlen = 1; 2366 switch (value & 0xff) { 2367 case 0: /* Language table */ 2368 totlen = usbd_str(buf, len, "\001"); 2369 break; 2370 case 1: /* Vendor */ 2371 totlen = usbd_str(buf, len, sc->sc_vendor); 2372 break; 2373 case 2: /* Product */ 2374 totlen = usbd_str(buf, len, "OHCI root hub"); 2375 break; 2376 } 2377 break; 2378 default: 2379 err = USBD_IOERROR; 2380 goto ret; 2381 } 2382 break; 2383 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2384 if (len > 0) { 2385 *(u_int8_t *)buf = 0; 2386 totlen = 1; 2387 } 2388 break; 2389 case C(UR_GET_STATUS, UT_READ_DEVICE): 2390 if (len > 1) { 2391 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2392 totlen = 2; 2393 } 2394 break; 2395 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2396 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2397 if (len > 1) { 2398 USETW(((usb_status_t *)buf)->wStatus, 0); 2399 totlen = 2; 2400 } 2401 break; 2402 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2403 if (value >= USB_MAX_DEVICES) { 2404 err = USBD_IOERROR; 2405 goto ret; 2406 } 2407 break; 2408 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2409 if (value != 0 && value != 1) { 2410 err = USBD_IOERROR; 2411 goto ret; 2412 } 2413 sc->sc_conf = value; 2414 break; 2415 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2416 break; 2417 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2418 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2419 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2420 err = USBD_IOERROR; 2421 goto ret; 2422 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2423 break; 2424 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2425 break; 2426 /* Hub requests */ 2427 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2428 break; 2429 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2430 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2431 "port=%d feature=%d\n", 2432 index, value)); 2433 if (index < 1 || index > sc->sc_noport) { 2434 err = USBD_IOERROR; 2435 goto ret; 2436 } 2437 port = OHCI_RH_PORT_STATUS(index); 2438 switch(value) { 2439 case UHF_PORT_ENABLE: 2440 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2441 break; 2442 case UHF_PORT_SUSPEND: 2443 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2444 break; 2445 case UHF_PORT_POWER: 2446 /* Yes, writing to the LOW_SPEED bit clears power. */ 2447 OWRITE4(sc, port, UPS_LOW_SPEED); 2448 break; 2449 case UHF_C_PORT_CONNECTION: 2450 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2451 break; 2452 case UHF_C_PORT_ENABLE: 2453 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2454 break; 2455 case UHF_C_PORT_SUSPEND: 2456 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2457 break; 2458 case UHF_C_PORT_OVER_CURRENT: 2459 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2460 break; 2461 case UHF_C_PORT_RESET: 2462 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2463 break; 2464 default: 2465 err = USBD_IOERROR; 2466 goto ret; 2467 } 2468 switch(value) { 2469 case UHF_C_PORT_CONNECTION: 2470 case UHF_C_PORT_ENABLE: 2471 case UHF_C_PORT_SUSPEND: 2472 case UHF_C_PORT_OVER_CURRENT: 2473 case UHF_C_PORT_RESET: 2474 /* Enable RHSC interrupt if condition is cleared. */ 2475 if ((OREAD4(sc, port) >> 16) == 0) 2476 ohci_rhsc_able(sc, 1); 2477 break; 2478 default: 2479 break; 2480 } 2481 break; 2482 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2483 if ((value & 0xff) != 0) { 2484 err = USBD_IOERROR; 2485 goto ret; 2486 } 2487 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2488 hubd = ohci_hubd; 2489 hubd.bNbrPorts = sc->sc_noport; 2490 USETW(hubd.wHubCharacteristics, 2491 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2492 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2493 /* XXX overcurrent */ 2494 ); 2495 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2496 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2497 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2498 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2499 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2500 l = min(len, hubd.bDescLength); 2501 totlen = l; 2502 memcpy(buf, &hubd, l); 2503 break; 2504 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2505 if (len != 4) { 2506 err = USBD_IOERROR; 2507 goto ret; 2508 } 2509 memset(buf, 0, len); /* ? XXX */ 2510 totlen = len; 2511 break; 2512 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2513 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2514 index)); 2515 if (index < 1 || index > sc->sc_noport) { 2516 err = USBD_IOERROR; 2517 goto ret; 2518 } 2519 if (len != 4) { 2520 err = USBD_IOERROR; 2521 goto ret; 2522 } 2523 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2524 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2525 v)); 2526 USETW(ps.wPortStatus, v); 2527 USETW(ps.wPortChange, v >> 16); 2528 l = min(len, sizeof ps); 2529 memcpy(buf, &ps, l); 2530 totlen = l; 2531 break; 2532 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2533 err = USBD_IOERROR; 2534 goto ret; 2535 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2536 break; 2537 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2538 if (index < 1 || index > sc->sc_noport) { 2539 err = USBD_IOERROR; 2540 goto ret; 2541 } 2542 port = OHCI_RH_PORT_STATUS(index); 2543 switch(value) { 2544 case UHF_PORT_ENABLE: 2545 OWRITE4(sc, port, UPS_PORT_ENABLED); 2546 break; 2547 case UHF_PORT_SUSPEND: 2548 OWRITE4(sc, port, UPS_SUSPEND); 2549 break; 2550 case UHF_PORT_RESET: 2551 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2552 index)); 2553 OWRITE4(sc, port, UPS_RESET); 2554 for (i = 0; i < 5; i++) { 2555 usb_delay_ms(&sc->sc_bus, 2556 USB_PORT_ROOT_RESET_DELAY); 2557 if (sc->sc_bus.dying) { 2558 err = USBD_IOERROR; 2559 goto ret; 2560 } 2561 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2562 break; 2563 } 2564 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2565 index, OREAD4(sc, port))); 2566 break; 2567 case UHF_PORT_POWER: 2568 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2569 "%d\n", index)); 2570 OWRITE4(sc, port, UPS_PORT_POWER); 2571 break; 2572 case UHF_PORT_DISOWN_TO_1_1: 2573 /* accept, but do nothing */ 2574 break; 2575 default: 2576 err = USBD_IOERROR; 2577 goto ret; 2578 } 2579 break; 2580 default: 2581 err = USBD_IOERROR; 2582 goto ret; 2583 } 2584 xfer->actlen = totlen; 2585 err = USBD_NORMAL_COMPLETION; 2586 ret: 2587 xfer->status = err; 2588 s = splusb(); 2589 usb_transfer_complete(xfer); 2590 splx(s); 2591 return (USBD_IN_PROGRESS); 2592 } 2593 2594 /* Abort a root control request. */ 2595 void 2596 ohci_root_ctrl_abort(struct usbd_xfer *xfer) 2597 { 2598 /* Nothing to do, all transfers are synchronous. */ 2599 } 2600 2601 /* Close the root pipe. */ 2602 void 2603 ohci_root_ctrl_close(struct usbd_pipe *pipe) 2604 { 2605 DPRINTF(("ohci_root_ctrl_close\n")); 2606 /* Nothing to do. */ 2607 } 2608 2609 usbd_status 2610 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2611 { 2612 usbd_status err; 2613 2614 /* Insert last in queue. */ 2615 err = usb_insert_transfer(xfer); 2616 if (err) 2617 return (err); 2618 2619 /* Pipe isn't running, start first */ 2620 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2621 } 2622 2623 usbd_status 2624 ohci_root_intr_start(struct usbd_xfer *xfer) 2625 { 2626 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2627 2628 if (sc->sc_bus.dying) 2629 return (USBD_IOERROR); 2630 2631 sc->sc_intrxfer = xfer; 2632 2633 return (USBD_IN_PROGRESS); 2634 } 2635 2636 void 2637 ohci_root_intr_abort(struct usbd_xfer *xfer) 2638 { 2639 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2640 int s; 2641 2642 sc->sc_intrxfer = NULL; 2643 2644 xfer->status = USBD_CANCELLED; 2645 s = splusb(); 2646 usb_transfer_complete(xfer); 2647 splx(s); 2648 } 2649 2650 void 2651 ohci_root_intr_close(struct usbd_pipe *pipe) 2652 { 2653 } 2654 2655 usbd_status 2656 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2657 { 2658 usbd_status err; 2659 2660 /* Insert last in queue. */ 2661 err = usb_insert_transfer(xfer); 2662 if (err) 2663 return (err); 2664 2665 /* Pipe isn't running, start first */ 2666 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2667 } 2668 2669 usbd_status 2670 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2671 { 2672 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2673 usbd_status err; 2674 2675 if (sc->sc_bus.dying) 2676 return (USBD_IOERROR); 2677 2678 #ifdef DIAGNOSTIC 2679 if (!(xfer->rqflags & URQ_REQUEST)) { 2680 /* XXX panic */ 2681 printf("ohci_device_ctrl_transfer: not a request\n"); 2682 return (USBD_INVAL); 2683 } 2684 #endif 2685 2686 err = ohci_device_request(xfer); 2687 if (err) 2688 return (err); 2689 2690 if (sc->sc_bus.use_polling) 2691 ohci_waitintr(sc, xfer); 2692 2693 return (USBD_IN_PROGRESS); 2694 } 2695 2696 /* Abort a device control request. */ 2697 void 2698 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2699 { 2700 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2701 ohci_abort_xfer(xfer, USBD_CANCELLED); 2702 } 2703 2704 /* Close a device control pipe. */ 2705 void 2706 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2707 { 2708 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2709 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2710 2711 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2712 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2713 ohci_free_std(sc, opipe->tail.td); 2714 } 2715 2716 /************************/ 2717 2718 void 2719 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2720 { 2721 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2722 2723 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2724 } 2725 2726 usbd_status 2727 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2728 { 2729 usbd_status err; 2730 2731 /* Insert last in queue. */ 2732 err = usb_insert_transfer(xfer); 2733 if (err) 2734 return (err); 2735 2736 /* Pipe isn't running, start first */ 2737 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2738 } 2739 2740 usbd_status 2741 ohci_device_bulk_start(struct usbd_xfer *xfer) 2742 { 2743 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2744 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2745 struct ohci_soft_td *data, *tail, *tdp; 2746 struct ohci_soft_ed *sed; 2747 u_int len; 2748 int s, endpt; 2749 usbd_status err; 2750 2751 if (sc->sc_bus.dying) 2752 return (USBD_IOERROR); 2753 2754 #ifdef DIAGNOSTIC 2755 if (xfer->rqflags & URQ_REQUEST) { 2756 /* XXX panic */ 2757 printf("ohci_device_bulk_start: a request\n"); 2758 return (USBD_INVAL); 2759 } 2760 #endif 2761 2762 len = xfer->length; 2763 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2764 sed = opipe->sed; 2765 2766 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%u " 2767 "flags=%d endpt=%d\n", xfer, len, xfer->flags, endpt)); 2768 2769 /* Update device address */ 2770 sed->ed.ed_flags = htole32( 2771 (letoh32(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2772 OHCI_ED_SET_FA(xfer->device->address)); 2773 2774 /* Allocate a chain of new TDs (including a new tail). */ 2775 data = opipe->tail.td; 2776 err = ohci_alloc_std_chain(sc, len, xfer, data, &tail); 2777 /* We want interrupt at the end of the transfer. */ 2778 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2779 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2780 tail->flags |= OHCI_CALL_DONE; 2781 tail = tail->nexttd; /* point at sentinel */ 2782 if (err) 2783 return (err); 2784 2785 tail->xfer = NULL; 2786 xfer->hcpriv = data; 2787 2788 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2789 "td_cbp=0x%08x td_be=0x%08x\n", 2790 (int)letoh32(sed->ed.ed_flags), 2791 (int)letoh32(data->td.td_flags), 2792 (int)letoh32(data->td.td_cbp), 2793 (int)letoh32(data->td.td_be))); 2794 2795 #ifdef OHCI_DEBUG 2796 if (ohcidebug > 5) { 2797 ohci_dump_ed(sed); 2798 ohci_dump_tds(data); 2799 } 2800 #endif 2801 2802 /* Insert ED in schedule */ 2803 s = splusb(); 2804 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2805 tdp->xfer = xfer; 2806 } 2807 sed->ed.ed_tailp = htole32(tail->physaddr); 2808 opipe->tail.td = tail; 2809 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2810 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2811 if (xfer->timeout && !sc->sc_bus.use_polling) { 2812 timeout_del(&xfer->timeout_handle); 2813 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 2814 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2815 } 2816 2817 #if 0 2818 /* This goes wrong if we are too slow. */ 2819 if (ohcidebug > 10) { 2820 delay(10000); 2821 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2822 OREAD4(sc, OHCI_COMMAND_STATUS))); 2823 ohci_dump_ed(sed); 2824 ohci_dump_tds(data); 2825 } 2826 #endif 2827 2828 splx(s); 2829 2830 if (sc->sc_bus.use_polling) 2831 ohci_waitintr(sc, xfer); 2832 2833 return (USBD_IN_PROGRESS); 2834 } 2835 2836 void 2837 ohci_device_bulk_abort(struct usbd_xfer *xfer) 2838 { 2839 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2840 ohci_abort_xfer(xfer, USBD_CANCELLED); 2841 } 2842 2843 /* 2844 * Close a device bulk pipe. 2845 */ 2846 void 2847 ohci_device_bulk_close(struct usbd_pipe *pipe) 2848 { 2849 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2850 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2851 2852 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2853 ohci_close_pipe(pipe, sc->sc_bulk_head); 2854 ohci_free_std(sc, opipe->tail.td); 2855 } 2856 2857 /************************/ 2858 2859 usbd_status 2860 ohci_device_intr_transfer(struct usbd_xfer *xfer) 2861 { 2862 usbd_status err; 2863 2864 /* Insert last in queue. */ 2865 err = usb_insert_transfer(xfer); 2866 if (err) 2867 return (err); 2868 2869 /* Pipe isn't running, start first */ 2870 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2871 } 2872 2873 usbd_status 2874 ohci_device_intr_start(struct usbd_xfer *xfer) 2875 { 2876 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2877 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2878 struct ohci_soft_ed *sed = opipe->sed; 2879 struct ohci_soft_td *data, *tail; 2880 int s, len, endpt; 2881 2882 if (sc->sc_bus.dying) 2883 return (USBD_IOERROR); 2884 2885 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%u " 2886 "flags=%d priv=%p\n", 2887 xfer, xfer->length, xfer->flags, xfer->priv)); 2888 2889 #ifdef DIAGNOSTIC 2890 if (xfer->rqflags & URQ_REQUEST) 2891 panic("ohci_device_intr_transfer: a request"); 2892 #endif 2893 2894 len = xfer->length; 2895 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2896 2897 data = opipe->tail.td; 2898 tail = ohci_alloc_std(sc); 2899 if (tail == NULL) 2900 return (USBD_NOMEM); 2901 tail->xfer = NULL; 2902 2903 data->td.td_flags = htole32( 2904 usbd_xfer_isread(xfer) ? OHCI_TD_IN : OHCI_TD_OUT | 2905 OHCI_TD_NOCC | 2906 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2907 if (xfer->flags & USBD_SHORT_XFER_OK) 2908 data->td.td_flags |= htole32(OHCI_TD_R); 2909 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2910 data->nexttd = tail; 2911 data->td.td_nexttd = htole32(tail->physaddr); 2912 data->td.td_be = htole32(letoh32(data->td.td_cbp) + len - 1); 2913 data->len = len; 2914 data->xfer = xfer; 2915 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2916 xfer->hcpriv = data; 2917 2918 #ifdef OHCI_DEBUG 2919 if (ohcidebug > 5) { 2920 DPRINTF(("ohci_device_intr_transfer:\n")); 2921 ohci_dump_ed(sed); 2922 ohci_dump_tds(data); 2923 } 2924 #endif 2925 2926 /* Insert ED in schedule */ 2927 s = splusb(); 2928 sed->ed.ed_tailp = htole32(tail->physaddr); 2929 opipe->tail.td = tail; 2930 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2931 2932 #if 0 2933 /* 2934 * This goes horribly wrong, printing thousands of descriptors, 2935 * because false references are followed due to the fact that the 2936 * TD is gone. 2937 */ 2938 if (ohcidebug > 5) { 2939 usb_delay_ms(&sc->sc_bus, 5); 2940 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2941 OREAD4(sc, OHCI_COMMAND_STATUS))); 2942 ohci_dump_ed(sed); 2943 ohci_dump_tds(data); 2944 } 2945 #endif 2946 splx(s); 2947 2948 if (sc->sc_bus.use_polling) 2949 ohci_waitintr(sc, xfer); 2950 2951 return (USBD_IN_PROGRESS); 2952 } 2953 2954 void 2955 ohci_device_intr_abort(struct usbd_xfer *xfer) 2956 { 2957 KASSERT(!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer); 2958 2959 ohci_abort_xfer(xfer, USBD_CANCELLED); 2960 } 2961 2962 /* Close a device interrupt pipe. */ 2963 void 2964 ohci_device_intr_close(struct usbd_pipe *pipe) 2965 { 2966 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2967 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2968 int nslots = opipe->u.intr.nslots; 2969 int pos = opipe->u.intr.pos; 2970 int j; 2971 struct ohci_soft_ed *p, *sed = opipe->sed; 2972 int s; 2973 2974 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2975 pipe, nslots, pos)); 2976 s = splusb(); 2977 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2978 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2979 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2980 usb_delay_ms(&sc->sc_bus, 2); 2981 2982 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2983 ; 2984 #ifdef DIAGNOSTIC 2985 if (p == NULL) 2986 panic("ohci_device_intr_close: ED not found"); 2987 #endif 2988 p->next = sed->next; 2989 p->ed.ed_nexted = sed->ed.ed_nexted; 2990 splx(s); 2991 2992 for (j = 0; j < nslots; j++) 2993 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2994 2995 ohci_free_std(sc, opipe->tail.td); 2996 ohci_free_sed(sc, opipe->sed); 2997 } 2998 2999 usbd_status 3000 ohci_device_setintr(struct ohci_softc *sc, struct ohci_pipe *opipe, int ival) 3001 { 3002 int i, j, s, best; 3003 u_int npoll, slow, shigh, nslots; 3004 u_int bestbw, bw; 3005 struct ohci_soft_ed *hsed, *sed = opipe->sed; 3006 3007 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3008 if (ival == 0) { 3009 printf("ohci_setintr: 0 interval\n"); 3010 return (USBD_INVAL); 3011 } 3012 3013 npoll = OHCI_NO_INTRS; 3014 while (npoll > ival) 3015 npoll /= 2; 3016 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3017 3018 /* 3019 * We now know which level in the tree the ED must go into. 3020 * Figure out which slot has most bandwidth left over. 3021 * Slots to examine: 3022 * npoll 3023 * 1 0 3024 * 2 1 2 3025 * 4 3 4 5 6 3026 * 8 7 8 9 10 11 12 13 14 3027 * N (N-1) .. (N-1+N-1) 3028 */ 3029 slow = npoll-1; 3030 shigh = slow + npoll; 3031 nslots = OHCI_NO_INTRS / npoll; 3032 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3033 bw = 0; 3034 for (j = 0; j < nslots; j++) 3035 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3036 if (bw < bestbw) { 3037 best = i; 3038 bestbw = bw; 3039 } 3040 } 3041 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3042 best, slow, shigh, bestbw)); 3043 3044 s = splusb(); 3045 hsed = sc->sc_eds[best]; 3046 sed->next = hsed->next; 3047 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3048 hsed->next = sed; 3049 hsed->ed.ed_nexted = htole32(sed->physaddr); 3050 splx(s); 3051 3052 for (j = 0; j < nslots; j++) 3053 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3054 opipe->u.intr.nslots = nslots; 3055 opipe->u.intr.pos = best; 3056 3057 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3058 return (USBD_NORMAL_COMPLETION); 3059 } 3060 3061 /***********************/ 3062 3063 usbd_status 3064 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3065 { 3066 usbd_status err; 3067 3068 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3069 3070 /* Put it on our queue, */ 3071 err = usb_insert_transfer(xfer); 3072 3073 /* bail out on error, */ 3074 if (err && err != USBD_IN_PROGRESS) 3075 return (err); 3076 3077 /* XXX should check inuse here */ 3078 3079 /* insert into schedule, */ 3080 ohci_device_isoc_enter(xfer); 3081 3082 /* and start if the pipe wasn't running */ 3083 if (!err) 3084 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3085 3086 return (err); 3087 } 3088 3089 void 3090 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3091 { 3092 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3093 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3094 struct ohci_soft_ed *sed = opipe->sed; 3095 struct iso *iso = &opipe->u.iso; 3096 struct ohci_soft_itd *sitd, *nsitd; 3097 ohci_physaddr_t buf, offs, noffs, bp0; 3098 int i, ncur, nframes; 3099 int s; 3100 3101 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3102 "nframes=%d\n", 3103 iso->inuse, iso->next, xfer, xfer->nframes)); 3104 3105 if (sc->sc_bus.dying) 3106 return; 3107 3108 if (iso->next == -1) { 3109 /* Not in use yet, schedule it a few frames ahead. */ 3110 iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5; 3111 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3112 iso->next)); 3113 } 3114 3115 sitd = opipe->tail.itd; 3116 buf = DMAADDR(&xfer->dmabuf, 0); 3117 bp0 = OHCI_PAGE(buf); 3118 offs = OHCI_PAGE_OFFSET(buf); 3119 nframes = xfer->nframes; 3120 xfer->hcpriv = sitd; 3121 for (i = ncur = 0; i < nframes; i++, ncur++) { 3122 noffs = offs + xfer->frlengths[i]; 3123 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3124 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3125 3126 /* Allocate next ITD */ 3127 nsitd = ohci_alloc_sitd(sc); 3128 if (nsitd == NULL) { 3129 /* XXX what now? */ 3130 printf("%s: isoc TD alloc failed\n", 3131 sc->sc_bus.bdev.dv_xname); 3132 return; 3133 } 3134 3135 /* Fill current ITD */ 3136 sitd->itd.itd_flags = htole32( 3137 OHCI_ITD_NOCC | 3138 OHCI_ITD_SET_SF(iso->next) | 3139 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3140 OHCI_ITD_SET_FC(ncur)); 3141 sitd->itd.itd_bp0 = htole32(bp0); 3142 sitd->nextitd = nsitd; 3143 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3144 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3145 sitd->xfer = xfer; 3146 sitd->flags = 0; 3147 3148 sitd = nsitd; 3149 iso->next = iso->next + ncur; 3150 bp0 = OHCI_PAGE(buf + offs); 3151 ncur = 0; 3152 } 3153 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3154 offs = noffs; 3155 } 3156 nsitd = ohci_alloc_sitd(sc); 3157 if (nsitd == NULL) { 3158 /* XXX what now? */ 3159 printf("%s: isoc TD alloc failed\n", 3160 sc->sc_bus.bdev.dv_xname); 3161 return; 3162 } 3163 /* Fixup last used ITD */ 3164 sitd->itd.itd_flags = htole32( 3165 OHCI_ITD_NOCC | 3166 OHCI_ITD_SET_SF(iso->next) | 3167 OHCI_ITD_SET_DI(0) | 3168 OHCI_ITD_SET_FC(ncur)); 3169 sitd->itd.itd_bp0 = htole32(bp0); 3170 sitd->nextitd = nsitd; 3171 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3172 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3173 sitd->xfer = xfer; 3174 sitd->flags = OHCI_CALL_DONE; 3175 3176 iso->next = iso->next + ncur; 3177 iso->inuse += nframes; 3178 3179 xfer->actlen = offs; /* XXX pretend we did it all */ 3180 3181 xfer->status = USBD_IN_PROGRESS; 3182 3183 #ifdef OHCI_DEBUG 3184 if (ohcidebug > 5) { 3185 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3186 letoh32(sc->sc_hcca->hcca_frame_number))); 3187 ohci_dump_itds(xfer->hcpriv); 3188 ohci_dump_ed(sed); 3189 } 3190 #endif 3191 3192 s = splusb(); 3193 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3194 opipe->tail.itd = nsitd; 3195 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3196 splx(s); 3197 3198 #ifdef OHCI_DEBUG 3199 if (ohcidebug > 5) { 3200 delay(150000); 3201 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3202 letoh32(sc->sc_hcca->hcca_frame_number))); 3203 ohci_dump_itds(xfer->hcpriv); 3204 ohci_dump_ed(sed); 3205 } 3206 #endif 3207 } 3208 3209 usbd_status 3210 ohci_device_isoc_start(struct usbd_xfer *xfer) 3211 { 3212 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3213 3214 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3215 3216 if (sc->sc_bus.dying) 3217 return (USBD_IOERROR); 3218 3219 #ifdef DIAGNOSTIC 3220 if (xfer->status != USBD_IN_PROGRESS) 3221 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3222 #endif 3223 3224 /* XXX anything to do? */ 3225 3226 if (sc->sc_bus.use_polling) { 3227 DPRINTF(("Starting ohci isoc xfer with polling. Bad idea?\n")); 3228 ohci_waitintr(sc, xfer); 3229 } 3230 3231 return (USBD_IN_PROGRESS); 3232 } 3233 3234 void 3235 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3236 { 3237 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3238 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3239 struct ohci_soft_ed *sed; 3240 struct ohci_soft_itd *sitd; 3241 int s; 3242 3243 s = splusb(); 3244 3245 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3246 3247 /* Transfer is already done. */ 3248 if (xfer->status != USBD_NOT_STARTED && 3249 xfer->status != USBD_IN_PROGRESS) { 3250 splx(s); 3251 printf("ohci_device_isoc_abort: early return\n"); 3252 return; 3253 } 3254 3255 /* Give xfer the requested abort code. */ 3256 xfer->status = USBD_CANCELLED; 3257 3258 sed = opipe->sed; 3259 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3260 3261 sitd = xfer->hcpriv; 3262 #ifdef DIAGNOSTIC 3263 if (sitd == NULL) { 3264 splx(s); 3265 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3266 return; 3267 } 3268 #endif 3269 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3270 #ifdef DIAGNOSTIC 3271 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3272 sitd->isdone = 1; 3273 #endif 3274 } 3275 3276 splx(s); 3277 3278 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3279 3280 s = splusb(); 3281 3282 /* Run callback. */ 3283 usb_transfer_complete(xfer); 3284 3285 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3286 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3287 3288 splx(s); 3289 } 3290 3291 void 3292 ohci_device_isoc_done(struct usbd_xfer *xfer) 3293 { 3294 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3295 } 3296 3297 usbd_status 3298 ohci_setup_isoc(struct usbd_pipe *pipe) 3299 { 3300 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3301 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3302 struct iso *iso = &opipe->u.iso; 3303 int s; 3304 3305 iso->next = -1; 3306 iso->inuse = 0; 3307 3308 s = splusb(); 3309 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3310 splx(s); 3311 3312 return (USBD_NORMAL_COMPLETION); 3313 } 3314 3315 void 3316 ohci_device_isoc_close(struct usbd_pipe *pipe) 3317 { 3318 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3319 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3320 3321 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3322 ohci_close_pipe(pipe, sc->sc_isoc_head); 3323 #ifdef DIAGNOSTIC 3324 opipe->tail.itd->isdone = 1; 3325 #endif 3326 ohci_free_sitd(sc, opipe->tail.itd); 3327 } 3328