1 /* $OpenBSD: ohci.c,v 1.147 2016/09/15 02:00:17 dlg Exp $ */ 2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */ 3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 4 5 /* 6 * Copyright (c) 1998 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Lennart Augustsson (lennart@augustsson.net) at 11 * Carlstedt Research & Technology. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/device.h> 39 #include <sys/queue.h> 40 #include <sys/timeout.h> 41 #include <sys/pool.h> 42 #include <sys/endian.h> 43 44 #include <machine/bus.h> 45 46 #include <dev/usb/usb.h> 47 #include <dev/usb/usbdi.h> 48 #include <dev/usb/usbdivar.h> 49 #include <dev/usb/usb_mem.h> 50 51 #include <dev/usb/ohcireg.h> 52 #include <dev/usb/ohcivar.h> 53 54 struct cfdriver ohci_cd = { 55 NULL, "ohci", DV_DULL 56 }; 57 58 #ifdef OHCI_DEBUG 59 #define DPRINTF(x) do { if (ohcidebug) printf x; } while (0) 60 #define DPRINTFN(n,x) do { if (ohcidebug>(n)) printf x; } while (0) 61 int ohcidebug = 0; 62 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 63 #else 64 #define DPRINTF(x) 65 #define DPRINTFN(n,x) 66 #endif 67 68 struct pool *ohcixfer; 69 70 struct ohci_pipe; 71 72 struct ohci_soft_ed *ohci_alloc_sed(struct ohci_softc *); 73 void ohci_free_sed(struct ohci_softc *, struct ohci_soft_ed *); 74 75 struct ohci_soft_td *ohci_alloc_std(struct ohci_softc *); 76 void ohci_free_std(struct ohci_softc *, struct ohci_soft_td *); 77 78 struct ohci_soft_itd *ohci_alloc_sitd(struct ohci_softc *); 79 void ohci_free_sitd(struct ohci_softc *, struct ohci_soft_itd *); 80 81 #if 0 82 void ohci_free_std_chain(struct ohci_softc *, struct ohci_soft_td *, 83 struct ohci_soft_td *); 84 #endif 85 usbd_status ohci_alloc_std_chain(struct ohci_softc *, u_int, 86 struct usbd_xfer *, struct ohci_soft_td *, 87 struct ohci_soft_td **); 88 89 usbd_status ohci_open(struct usbd_pipe *); 90 int ohci_setaddr(struct usbd_device *, int); 91 void ohci_poll(struct usbd_bus *); 92 void ohci_softintr(void *); 93 void ohci_waitintr(struct ohci_softc *, struct usbd_xfer *); 94 void ohci_add_done(struct ohci_softc *, ohci_physaddr_t); 95 void ohci_rhsc(struct ohci_softc *, struct usbd_xfer *); 96 97 usbd_status ohci_device_request(struct usbd_xfer *xfer); 98 void ohci_add_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 99 void ohci_rem_ed(struct ohci_soft_ed *, struct ohci_soft_ed *); 100 void ohci_hash_add_td(struct ohci_softc *, struct ohci_soft_td *); 101 struct ohci_soft_td *ohci_hash_find_td(struct ohci_softc *, ohci_physaddr_t); 102 void ohci_hash_add_itd(struct ohci_softc *, struct ohci_soft_itd *); 103 void ohci_hash_rem_itd(struct ohci_softc *, struct ohci_soft_itd *); 104 struct ohci_soft_itd *ohci_hash_find_itd(struct ohci_softc *, ohci_physaddr_t); 105 106 usbd_status ohci_setup_isoc(struct usbd_pipe *pipe); 107 void ohci_device_isoc_enter(struct usbd_xfer *); 108 109 struct usbd_xfer *ohci_allocx(struct usbd_bus *); 110 void ohci_freex(struct usbd_bus *, struct usbd_xfer *); 111 112 usbd_status ohci_root_ctrl_transfer(struct usbd_xfer *); 113 usbd_status ohci_root_ctrl_start(struct usbd_xfer *); 114 void ohci_root_ctrl_abort(struct usbd_xfer *); 115 void ohci_root_ctrl_close(struct usbd_pipe *); 116 void ohci_root_ctrl_done(struct usbd_xfer *); 117 118 usbd_status ohci_root_intr_transfer(struct usbd_xfer *); 119 usbd_status ohci_root_intr_start(struct usbd_xfer *); 120 void ohci_root_intr_abort(struct usbd_xfer *); 121 void ohci_root_intr_close(struct usbd_pipe *); 122 void ohci_root_intr_done(struct usbd_xfer *); 123 124 usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *); 125 usbd_status ohci_device_ctrl_start(struct usbd_xfer *); 126 void ohci_device_ctrl_abort(struct usbd_xfer *); 127 void ohci_device_ctrl_close(struct usbd_pipe *); 128 void ohci_device_ctrl_done(struct usbd_xfer *); 129 130 usbd_status ohci_device_bulk_transfer(struct usbd_xfer *); 131 usbd_status ohci_device_bulk_start(struct usbd_xfer *); 132 void ohci_device_bulk_abort(struct usbd_xfer *); 133 void ohci_device_bulk_close(struct usbd_pipe *); 134 void ohci_device_bulk_done(struct usbd_xfer *); 135 136 usbd_status ohci_device_intr_transfer(struct usbd_xfer *); 137 usbd_status ohci_device_intr_start(struct usbd_xfer *); 138 void ohci_device_intr_abort(struct usbd_xfer *); 139 void ohci_device_intr_close(struct usbd_pipe *); 140 void ohci_device_intr_done(struct usbd_xfer *); 141 142 usbd_status ohci_device_isoc_transfer(struct usbd_xfer *); 143 usbd_status ohci_device_isoc_start(struct usbd_xfer *); 144 void ohci_device_isoc_abort(struct usbd_xfer *); 145 void ohci_device_isoc_close(struct usbd_pipe *); 146 void ohci_device_isoc_done(struct usbd_xfer *); 147 148 usbd_status ohci_device_setintr(struct ohci_softc *sc, 149 struct ohci_pipe *pipe, int ival); 150 151 void ohci_timeout(void *); 152 void ohci_timeout_task(void *); 153 void ohci_rhsc_able(struct ohci_softc *, int); 154 void ohci_rhsc_enable(void *); 155 156 void ohci_close_pipe(struct usbd_pipe *, struct ohci_soft_ed *); 157 void ohci_abort_xfer(struct usbd_xfer *, usbd_status); 158 159 void ohci_device_clear_toggle(struct usbd_pipe *pipe); 160 161 #ifdef OHCI_DEBUG 162 void ohci_dumpregs(struct ohci_softc *); 163 void ohci_dump_tds(struct ohci_soft_td *); 164 void ohci_dump_td(struct ohci_soft_td *); 165 void ohci_dump_ed(struct ohci_soft_ed *); 166 void ohci_dump_itd(struct ohci_soft_itd *); 167 void ohci_dump_itds(struct ohci_soft_itd *); 168 #endif 169 170 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 171 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 172 #define OWRITE1(sc, r, x) \ 173 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 174 #define OWRITE2(sc, r, x) \ 175 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 176 #define OWRITE4(sc, r, x) \ 177 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 178 179 __unused static __inline u_int8_t 180 OREAD1(struct ohci_softc *sc, bus_size_t r) 181 { 182 OBARR(sc); 183 return bus_space_read_1(sc->iot, sc->ioh, r); 184 } 185 186 __unused static __inline u_int16_t 187 OREAD2(struct ohci_softc *sc, bus_size_t r) 188 { 189 OBARR(sc); 190 return bus_space_read_2(sc->iot, sc->ioh, r); 191 } 192 193 __unused static __inline u_int32_t 194 OREAD4(struct ohci_softc *sc, bus_size_t r) 195 { 196 OBARR(sc); 197 return bus_space_read_4(sc->iot, sc->ioh, r); 198 } 199 200 /* Reverse the bits in a value 0 .. 31 */ 201 u_int8_t revbits[OHCI_NO_INTRS] = 202 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 203 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 204 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 205 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 206 207 struct ohci_pipe { 208 struct usbd_pipe pipe; 209 struct ohci_soft_ed *sed; 210 union { 211 struct ohci_soft_td *td; 212 struct ohci_soft_itd *itd; 213 } tail; 214 union { 215 /* Control pipe */ 216 struct { 217 struct usb_dma reqdma; 218 } ctl; 219 /* Interrupt pipe */ 220 struct { 221 int nslots; 222 int pos; 223 } intr; 224 /* Iso pipe */ 225 struct iso { 226 int next, inuse; 227 } iso; 228 } u; 229 }; 230 231 #define OHCI_INTR_ENDPT 1 232 233 struct usbd_bus_methods ohci_bus_methods = { 234 .open_pipe = ohci_open, 235 .dev_setaddr = ohci_setaddr, 236 .soft_intr = ohci_softintr, 237 .do_poll = ohci_poll, 238 .allocx = ohci_allocx, 239 .freex = ohci_freex, 240 }; 241 242 struct usbd_pipe_methods ohci_root_ctrl_methods = { 243 .transfer = ohci_root_ctrl_transfer, 244 .start = ohci_root_ctrl_start, 245 .abort = ohci_root_ctrl_abort, 246 .close = ohci_root_ctrl_close, 247 .done = ohci_root_ctrl_done, 248 }; 249 250 struct usbd_pipe_methods ohci_root_intr_methods = { 251 .transfer = ohci_root_intr_transfer, 252 .start = ohci_root_intr_start, 253 .abort = ohci_root_intr_abort, 254 .close = ohci_root_intr_close, 255 .done = ohci_root_intr_done, 256 }; 257 258 struct usbd_pipe_methods ohci_device_ctrl_methods = { 259 .transfer = ohci_device_ctrl_transfer, 260 .start = ohci_device_ctrl_start, 261 .abort = ohci_device_ctrl_abort, 262 .close = ohci_device_ctrl_close, 263 .done = ohci_device_ctrl_done, 264 }; 265 266 struct usbd_pipe_methods ohci_device_intr_methods = { 267 .transfer = ohci_device_intr_transfer, 268 .start = ohci_device_intr_start, 269 .abort = ohci_device_intr_abort, 270 .close = ohci_device_intr_close, 271 .cleartoggle = ohci_device_clear_toggle, 272 .done = ohci_device_intr_done, 273 }; 274 275 struct usbd_pipe_methods ohci_device_bulk_methods = { 276 .transfer = ohci_device_bulk_transfer, 277 .start = ohci_device_bulk_start, 278 .abort = ohci_device_bulk_abort, 279 .close = ohci_device_bulk_close, 280 .cleartoggle = ohci_device_clear_toggle, 281 .done = ohci_device_bulk_done, 282 }; 283 284 struct usbd_pipe_methods ohci_device_isoc_methods = { 285 .transfer = ohci_device_isoc_transfer, 286 .start = ohci_device_isoc_start, 287 .abort = ohci_device_isoc_abort, 288 .close = ohci_device_isoc_close, 289 .done = ohci_device_isoc_done, 290 }; 291 292 int 293 ohci_activate(struct device *self, int act) 294 { 295 struct ohci_softc *sc = (struct ohci_softc *)self; 296 u_int32_t reg; 297 int rv = 0; 298 299 switch (act) { 300 case DVACT_SUSPEND: 301 rv = config_activate_children(self, act); 302 sc->sc_bus.use_polling++; 303 reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 304 if (sc->sc_control == 0) { 305 /* 306 * Preserve register values, in case that APM BIOS 307 * does not recover them. 308 */ 309 sc->sc_control = reg; 310 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 311 sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc, 312 OHCI_FM_INTERVAL)); 313 } 314 reg |= OHCI_HCFS_SUSPEND; 315 OWRITE4(sc, OHCI_CONTROL, reg); 316 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 317 sc->sc_bus.use_polling--; 318 break; 319 case DVACT_RESUME: 320 sc->sc_bus.use_polling++; 321 322 /* Some broken BIOSes do not recover these values */ 323 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 324 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 325 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 326 if (sc->sc_intre) 327 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 328 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 329 if (sc->sc_control) 330 reg = sc->sc_control; 331 else 332 reg = OREAD4(sc, OHCI_CONTROL); 333 reg |= OHCI_HCFS_RESUME; 334 OWRITE4(sc, OHCI_CONTROL, reg); 335 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 336 reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 337 OWRITE4(sc, OHCI_CONTROL, reg); 338 339 reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 340 reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival; 341 OWRITE4(sc, OHCI_FM_INTERVAL, reg); 342 OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival)); 343 344 /* Fiddle the No OverCurrent Protection to avoid a chip bug */ 345 reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 346 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP); 347 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 348 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 349 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg); 350 351 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 352 sc->sc_control = sc->sc_intre = sc->sc_ival = 0; 353 sc->sc_bus.use_polling--; 354 rv = config_activate_children(self, act); 355 break; 356 case DVACT_POWERDOWN: 357 rv = config_activate_children(self, act); 358 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 359 break; 360 default: 361 rv = config_activate_children(self, act); 362 break; 363 } 364 return (rv); 365 } 366 367 int 368 ohci_detach(struct device *self, int flags) 369 { 370 struct ohci_softc *sc = (struct ohci_softc *)self; 371 int rv; 372 373 rv = config_detach_children(self, flags); 374 if (rv != 0) 375 return (rv); 376 377 timeout_del(&sc->sc_tmo_rhsc); 378 379 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */ 380 381 /* free data structures XXX */ 382 383 return (rv); 384 } 385 386 struct ohci_soft_ed * 387 ohci_alloc_sed(struct ohci_softc *sc) 388 { 389 struct ohci_soft_ed *sed = NULL; 390 usbd_status err; 391 int i, offs; 392 struct usb_dma dma; 393 int s; 394 395 s = splusb(); 396 if (sc->sc_freeeds == NULL) { 397 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 398 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 399 OHCI_ED_ALIGN, &dma); 400 if (err) 401 goto out; 402 for (i = 0; i < OHCI_SED_CHUNK; i++) { 403 offs = i * OHCI_SED_SIZE; 404 sed = KERNADDR(&dma, offs); 405 sed->physaddr = DMAADDR(&dma, offs); 406 sed->next = sc->sc_freeeds; 407 sc->sc_freeeds = sed; 408 } 409 } 410 sed = sc->sc_freeeds; 411 sc->sc_freeeds = sed->next; 412 memset(&sed->ed, 0, sizeof(struct ohci_ed)); 413 sed->next = NULL; 414 415 out: 416 splx(s); 417 return (sed); 418 } 419 420 void 421 ohci_free_sed(struct ohci_softc *sc, struct ohci_soft_ed *sed) 422 { 423 int s; 424 425 s = splusb(); 426 sed->next = sc->sc_freeeds; 427 sc->sc_freeeds = sed; 428 splx(s); 429 } 430 431 struct ohci_soft_td * 432 ohci_alloc_std(struct ohci_softc *sc) 433 { 434 struct ohci_soft_td *std = NULL; 435 usbd_status err; 436 int i, offs; 437 struct usb_dma dma; 438 int s; 439 440 s = splusb(); 441 if (sc->sc_freetds == NULL) { 442 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 443 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 444 OHCI_TD_ALIGN, &dma); 445 if (err) 446 goto out; 447 for (i = 0; i < OHCI_STD_CHUNK; i++) { 448 offs = i * OHCI_STD_SIZE; 449 std = KERNADDR(&dma, offs); 450 std->physaddr = DMAADDR(&dma, offs); 451 std->nexttd = sc->sc_freetds; 452 sc->sc_freetds = std; 453 } 454 } 455 456 std = sc->sc_freetds; 457 sc->sc_freetds = std->nexttd; 458 memset(&std->td, 0, sizeof(struct ohci_td)); 459 std->nexttd = NULL; 460 std->xfer = NULL; 461 ohci_hash_add_td(sc, std); 462 463 out: 464 splx(s); 465 return (std); 466 } 467 468 void 469 ohci_free_std(struct ohci_softc *sc, struct ohci_soft_td *std) 470 { 471 int s; 472 473 s = splusb(); 474 LIST_REMOVE(std, hnext); 475 std->nexttd = sc->sc_freetds; 476 sc->sc_freetds = std; 477 splx(s); 478 } 479 480 usbd_status 481 ohci_alloc_std_chain(struct ohci_softc *sc, u_int alen, struct usbd_xfer *xfer, 482 struct ohci_soft_td *sp, struct ohci_soft_td **ep) 483 { 484 struct ohci_soft_td *next, *cur, *end; 485 ohci_physaddr_t dataphys, dataphysend; 486 u_int32_t tdflags; 487 u_int len, curlen; 488 int mps; 489 int rd = usbd_xfer_isread(xfer); 490 struct usb_dma *dma = &xfer->dmabuf; 491 u_int16_t flags = xfer->flags; 492 493 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%u\n", alen)); 494 495 len = alen; 496 cur = sp; 497 end = NULL; 498 499 dataphys = DMAADDR(dma, 0); 500 dataphysend = OHCI_PAGE(dataphys + len - 1); 501 tdflags = htole32( 502 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 503 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 504 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 505 mps = UGETW(xfer->pipe->endpoint->edesc->wMaxPacketSize); 506 507 while (len > 0) { 508 next = ohci_alloc_std(sc); 509 if (next == NULL) 510 goto nomem; 511 512 /* The OHCI hardware can handle at most one page crossing. */ 513 if (OHCI_PAGE(dataphys) == dataphysend || 514 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 515 /* we can handle it in this TD */ 516 curlen = len; 517 } else { 518 /* must use multiple TDs, fill as much as possible. */ 519 curlen = 2 * OHCI_PAGE_SIZE - 520 (dataphys & (OHCI_PAGE_SIZE-1)); 521 /* the length must be a multiple of the max size */ 522 curlen -= curlen % mps; 523 #ifdef DIAGNOSTIC 524 if (curlen == 0) 525 panic("ohci_alloc_std: curlen == 0"); 526 #endif 527 } 528 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 529 "dataphysend=0x%08x len=%u curlen=%u\n", 530 dataphys, dataphysend, 531 len, curlen)); 532 len -= curlen; 533 534 cur->td.td_flags = tdflags; 535 cur->td.td_cbp = htole32(dataphys); 536 cur->nexttd = next; 537 cur->td.td_nexttd = htole32(next->physaddr); 538 cur->td.td_be = htole32(dataphys + curlen - 1); 539 cur->len = curlen; 540 cur->flags = OHCI_ADD_LEN; 541 cur->xfer = xfer; 542 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 543 dataphys, dataphys + curlen - 1)); 544 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 545 dataphys += curlen; 546 end = cur; 547 cur = next; 548 } 549 if (!rd && ((flags & USBD_FORCE_SHORT_XFER) || alen == 0) && 550 alen % mps == 0) { 551 /* Force a 0 length transfer at the end. */ 552 553 next = ohci_alloc_std(sc); 554 if (next == NULL) 555 goto nomem; 556 557 cur->td.td_flags = tdflags; 558 cur->td.td_cbp = 0; /* indicate 0 length packet */ 559 cur->nexttd = next; 560 cur->td.td_nexttd = htole32(next->physaddr); 561 cur->td.td_be = ~0; 562 cur->len = 0; 563 cur->flags = 0; 564 cur->xfer = xfer; 565 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 566 end = cur; 567 } 568 *ep = end; 569 570 return (USBD_NORMAL_COMPLETION); 571 572 nomem: 573 /* XXX free chain */ 574 return (USBD_NOMEM); 575 } 576 577 #if 0 578 void 579 ohci_free_std_chain(struct ohci_softc *sc, struct ohci_soft_td *std, 580 struct ohci_soft_td *stdend) 581 { 582 struct ohci_soft_td *p; 583 584 for (; std != stdend; std = p) { 585 p = std->nexttd; 586 ohci_free_std(sc, std); 587 } 588 } 589 #endif 590 591 struct ohci_soft_itd * 592 ohci_alloc_sitd(struct ohci_softc *sc) 593 { 594 struct ohci_soft_itd *sitd; 595 usbd_status err; 596 int i, s, offs; 597 struct usb_dma dma; 598 599 if (sc->sc_freeitds == NULL) { 600 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 601 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 602 OHCI_ITD_ALIGN, &dma); 603 if (err) 604 return (NULL); 605 s = splusb(); 606 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 607 offs = i * OHCI_SITD_SIZE; 608 sitd = KERNADDR(&dma, offs); 609 sitd->physaddr = DMAADDR(&dma, offs); 610 sitd->nextitd = sc->sc_freeitds; 611 sc->sc_freeitds = sitd; 612 } 613 splx(s); 614 } 615 616 s = splusb(); 617 sitd = sc->sc_freeitds; 618 sc->sc_freeitds = sitd->nextitd; 619 memset(&sitd->itd, 0, sizeof(struct ohci_itd)); 620 sitd->nextitd = NULL; 621 sitd->xfer = NULL; 622 ohci_hash_add_itd(sc, sitd); 623 splx(s); 624 625 #ifdef DIAGNOSTIC 626 sitd->isdone = 0; 627 #endif 628 629 return (sitd); 630 } 631 632 void 633 ohci_free_sitd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 634 { 635 int s; 636 637 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 638 639 #ifdef DIAGNOSTIC 640 if (!sitd->isdone) { 641 panic("ohci_free_sitd: sitd=%p not done", sitd); 642 return; 643 } 644 /* Warn double free */ 645 sitd->isdone = 0; 646 #endif 647 648 s = splusb(); 649 ohci_hash_rem_itd(sc, sitd); 650 sitd->nextitd = sc->sc_freeitds; 651 sc->sc_freeitds = sitd; 652 splx(s); 653 } 654 655 usbd_status 656 ohci_checkrev(struct ohci_softc *sc) 657 { 658 u_int32_t rev; 659 660 printf(","); 661 rev = OREAD4(sc, OHCI_REVISION); 662 printf(" version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 663 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 664 665 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 666 printf("%s: unsupported OHCI revision\n", 667 sc->sc_bus.bdev.dv_xname); 668 sc->sc_bus.usbrev = USBREV_UNKNOWN; 669 return (USBD_INVAL); 670 } 671 sc->sc_bus.usbrev = USBREV_1_0; 672 673 return (USBD_NORMAL_COMPLETION); 674 } 675 676 usbd_status 677 ohci_handover(struct ohci_softc *sc) 678 { 679 u_int32_t s, ctl; 680 int i; 681 682 ctl = OREAD4(sc, OHCI_CONTROL); 683 if (ctl & OHCI_IR) { 684 /* SMM active, request change */ 685 DPRINTF(("ohci_handover: SMM active, request owner change\n")); 686 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) == 687 (OHCI_OC | OHCI_MIE)) 688 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE); 689 s = OREAD4(sc, OHCI_COMMAND_STATUS); 690 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 691 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 692 usb_delay_ms(&sc->sc_bus, 1); 693 ctl = OREAD4(sc, OHCI_CONTROL); 694 } 695 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE); 696 if (ctl & OHCI_IR) { 697 printf("%s: SMM does not respond, will reset\n", 698 sc->sc_bus.bdev.dv_xname); 699 } 700 } 701 702 return (USBD_NORMAL_COMPLETION); 703 } 704 705 usbd_status 706 ohci_init(struct ohci_softc *sc) 707 { 708 struct ohci_soft_ed *sed, *psed; 709 usbd_status err; 710 int i; 711 u_int32_t ctl, rwc, ival, hcr, fm, per, desca, descb; 712 713 DPRINTF(("ohci_init: start\n")); 714 715 for (i = 0; i < OHCI_HASH_SIZE; i++) 716 LIST_INIT(&sc->sc_hash_tds[i]); 717 for (i = 0; i < OHCI_HASH_SIZE; i++) 718 LIST_INIT(&sc->sc_hash_itds[i]); 719 720 if (ohcixfer == NULL) { 721 ohcixfer = malloc(sizeof(struct pool), M_DEVBUF, M_NOWAIT); 722 if (ohcixfer == NULL) { 723 printf("%s: unable to allocate pool descriptor\n", 724 sc->sc_bus.bdev.dv_xname); 725 return (ENOMEM); 726 } 727 pool_init(ohcixfer, sizeof(struct ohci_xfer), 0, IPL_SOFTUSB, 728 0, "ohcixfer", NULL); 729 } 730 731 /* XXX determine alignment by R/W */ 732 /* Allocate the HCCA area. */ 733 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 734 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 735 if (err) 736 return (err); 737 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0); 738 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 739 740 sc->sc_eintrs = OHCI_NORMAL_INTRS; 741 742 /* Allocate dummy ED that starts the control list. */ 743 sc->sc_ctrl_head = ohci_alloc_sed(sc); 744 if (sc->sc_ctrl_head == NULL) { 745 err = USBD_NOMEM; 746 goto bad1; 747 } 748 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 749 750 /* Allocate dummy ED that starts the bulk list. */ 751 sc->sc_bulk_head = ohci_alloc_sed(sc); 752 if (sc->sc_bulk_head == NULL) { 753 err = USBD_NOMEM; 754 goto bad2; 755 } 756 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 757 758 /* Allocate dummy ED that starts the isochronous list. */ 759 sc->sc_isoc_head = ohci_alloc_sed(sc); 760 if (sc->sc_isoc_head == NULL) { 761 err = USBD_NOMEM; 762 goto bad3; 763 } 764 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 765 766 /* Allocate all the dummy EDs that make up the interrupt tree. */ 767 for (i = 0; i < OHCI_NO_EDS; i++) { 768 sed = ohci_alloc_sed(sc); 769 if (sed == NULL) { 770 while (--i >= 0) 771 ohci_free_sed(sc, sc->sc_eds[i]); 772 err = USBD_NOMEM; 773 goto bad4; 774 } 775 /* All ED fields are set to 0. */ 776 sc->sc_eds[i] = sed; 777 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 778 if (i != 0) 779 psed = sc->sc_eds[(i-1) / 2]; 780 else 781 psed= sc->sc_isoc_head; 782 sed->next = psed; 783 sed->ed.ed_nexted = htole32(psed->physaddr); 784 } 785 /* 786 * Fill HCCA interrupt table. The bit reversal is to get 787 * the tree set up properly to spread the interrupts. 788 */ 789 for (i = 0; i < OHCI_NO_INTRS; i++) 790 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 791 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 792 793 #ifdef OHCI_DEBUG 794 if (ohcidebug > 15) { 795 for (i = 0; i < OHCI_NO_EDS; i++) { 796 printf("ed#%d ", i); 797 ohci_dump_ed(sc->sc_eds[i]); 798 } 799 printf("iso "); 800 ohci_dump_ed(sc->sc_isoc_head); 801 } 802 #endif 803 /* Preserve values programmed by SMM/BIOS but lost over reset. */ 804 ctl = OREAD4(sc, OHCI_CONTROL); 805 rwc = ctl & OHCI_RWC; 806 fm = OREAD4(sc, OHCI_FM_INTERVAL); 807 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 808 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 809 810 /* Determine in what context we are running. */ 811 if (ctl & OHCI_IR) { 812 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 813 goto reset; 814 #if 0 815 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 816 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 817 /* BIOS started controller. */ 818 DPRINTF(("ohci_init: BIOS active\n")); 819 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 820 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc); 821 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 822 } 823 #endif 824 } else { 825 DPRINTF(("ohci_init: cold started\n")); 826 reset: 827 /* Controller was cold started. */ 828 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 829 } 830 831 /* 832 * This reset should not be necessary according to the OHCI spec, but 833 * without it some controllers do not start. 834 */ 835 DPRINTF(("%s: resetting\n", sc->sc_bus.bdev.dv_xname)); 836 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc); 837 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 838 839 /* We now own the host controller and the bus has been reset. */ 840 841 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 842 /* Nominal time for a reset is 10 us. */ 843 for (i = 0; i < 10; i++) { 844 delay(10); 845 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 846 if (!hcr) 847 break; 848 } 849 if (hcr) { 850 printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname); 851 err = USBD_IOERROR; 852 goto bad5; 853 } 854 #ifdef OHCI_DEBUG 855 if (ohcidebug > 15) 856 ohci_dumpregs(sc); 857 #endif 858 859 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 860 861 /* Set up HC registers. */ 862 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0)); 863 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 864 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 865 /* disable all interrupts and then switch on all desired interrupts */ 866 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 867 /* switch on desired functional features */ 868 ctl = OREAD4(sc, OHCI_CONTROL); 869 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 870 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 871 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc; 872 /* And finally start it! */ 873 OWRITE4(sc, OHCI_CONTROL, ctl); 874 875 /* 876 * The controller is now OPERATIONAL. Set a some final 877 * registers that should be set earlier, but that the 878 * controller ignores when in the SUSPEND state. 879 */ 880 ival = OHCI_GET_IVAL(fm); 881 fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT; 882 fm |= OHCI_FSMPS(ival) | ival; 883 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 884 per = OHCI_PERIODIC(ival); /* 90% periodic */ 885 OWRITE4(sc, OHCI_PERIODIC_START, per); 886 887 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 888 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 889 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 890 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 891 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 892 OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb); 893 usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR); 894 895 /* 896 * The AMD756 requires a delay before re-reading the register, 897 * otherwise it will occasionally report 0 ports. 898 */ 899 sc->sc_noport = 0; 900 for (i = 0; i < 10 && sc->sc_noport == 0; i++) { 901 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 902 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 903 } 904 905 #ifdef OHCI_DEBUG 906 if (ohcidebug > 5) 907 ohci_dumpregs(sc); 908 #endif 909 910 /* Set up the bus struct. */ 911 sc->sc_bus.methods = &ohci_bus_methods; 912 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 913 914 sc->sc_control = sc->sc_intre = 0; 915 916 timeout_set(&sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 917 918 /* Finally, turn on interrupts. */ 919 DPRINTFN(1,("ohci_init: enabling\n")); 920 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 921 922 return (USBD_NORMAL_COMPLETION); 923 924 bad5: 925 for (i = 0; i < OHCI_NO_EDS; i++) 926 ohci_free_sed(sc, sc->sc_eds[i]); 927 bad4: 928 ohci_free_sed(sc, sc->sc_isoc_head); 929 bad3: 930 ohci_free_sed(sc, sc->sc_bulk_head); 931 bad2: 932 ohci_free_sed(sc, sc->sc_ctrl_head); 933 bad1: 934 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 935 return (err); 936 } 937 938 struct usbd_xfer * 939 ohci_allocx(struct usbd_bus *bus) 940 { 941 return (pool_get(ohcixfer, PR_NOWAIT | PR_ZERO)); 942 } 943 944 void 945 ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer) 946 { 947 pool_put(ohcixfer, xfer); 948 } 949 950 #ifdef OHCI_DEBUG 951 void 952 ohci_dumpregs(struct ohci_softc *sc) 953 { 954 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 955 OREAD4(sc, OHCI_REVISION), 956 OREAD4(sc, OHCI_CONTROL), 957 OREAD4(sc, OHCI_COMMAND_STATUS))); 958 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 959 OREAD4(sc, OHCI_INTERRUPT_STATUS), 960 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 961 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 962 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 963 OREAD4(sc, OHCI_HCCA), 964 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 965 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 966 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 967 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 968 OREAD4(sc, OHCI_BULK_HEAD_ED), 969 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 970 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 971 OREAD4(sc, OHCI_DONE_HEAD), 972 OREAD4(sc, OHCI_FM_INTERVAL), 973 OREAD4(sc, OHCI_FM_REMAINING))); 974 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 975 OREAD4(sc, OHCI_FM_NUMBER), 976 OREAD4(sc, OHCI_PERIODIC_START), 977 OREAD4(sc, OHCI_LS_THRESHOLD))); 978 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 979 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 980 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 981 OREAD4(sc, OHCI_RH_STATUS))); 982 DPRINTF((" port1=0x%08x port2=0x%08x\n", 983 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 984 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 985 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 986 letoh32(sc->sc_hcca->hcca_frame_number), 987 letoh32(sc->sc_hcca->hcca_done_head))); 988 } 989 #endif 990 991 int ohci_intr1(struct ohci_softc *); 992 993 int 994 ohci_intr(void *p) 995 { 996 struct ohci_softc *sc = p; 997 998 if (sc == NULL || sc->sc_bus.dying) 999 return (0); 1000 1001 /* If we get an interrupt while polling, then just ignore it. */ 1002 if (sc->sc_bus.use_polling) { 1003 #ifdef DIAGNOSTIC 1004 static struct timeval ohci_intr_tv; 1005 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) && 1006 usbd_ratecheck(&ohci_intr_tv)) 1007 DPRINTFN(16, 1008 ("ohci_intr: ignored interrupt while polling\n")); 1009 #endif 1010 return (0); 1011 } 1012 1013 return (ohci_intr1(sc)); 1014 } 1015 1016 int 1017 ohci_intr1(struct ohci_softc *sc) 1018 { 1019 u_int32_t intrs, eintrs; 1020 ohci_physaddr_t done; 1021 1022 DPRINTFN(14,("ohci_intr1: enter\n")); 1023 1024 /* In case the interrupt occurs before initialization has completed. */ 1025 if (sc == NULL || sc->sc_hcca == NULL) { 1026 #ifdef DIAGNOSTIC 1027 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1028 #endif 1029 return (0); 1030 } 1031 1032 intrs = 0; 1033 done = letoh32(sc->sc_hcca->hcca_done_head); 1034 if (done != 0) { 1035 if (done & ~OHCI_DONE_INTRS) 1036 intrs = OHCI_WDH; 1037 if (done & OHCI_DONE_INTRS) 1038 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1039 sc->sc_hcca->hcca_done_head = 0; 1040 } else { 1041 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1042 /* If we've flushed out a WDH then reread */ 1043 if (intrs & OHCI_WDH) { 1044 done = letoh32(sc->sc_hcca->hcca_done_head); 1045 sc->sc_hcca->hcca_done_head = 0; 1046 } 1047 } 1048 1049 if (intrs == 0xffffffff) { 1050 sc->sc_bus.dying = 1; 1051 return (0); 1052 } 1053 1054 if (!intrs) 1055 return (0); 1056 1057 intrs &= ~OHCI_MIE; 1058 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1059 eintrs = intrs & sc->sc_eintrs; 1060 if (!eintrs) 1061 return (0); 1062 1063 sc->sc_bus.intr_context++; 1064 sc->sc_bus.no_intrs++; 1065 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1066 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1067 (u_int)eintrs)); 1068 1069 if (eintrs & OHCI_SO) { 1070 sc->sc_overrun_cnt++; 1071 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1072 printf("%s: %u scheduling overruns\n", 1073 sc->sc_bus.bdev.dv_xname, sc->sc_overrun_cnt); 1074 sc->sc_overrun_cnt = 0; 1075 } 1076 /* XXX do what */ 1077 eintrs &= ~OHCI_SO; 1078 } 1079 if (eintrs & OHCI_WDH) { 1080 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1081 usb_schedsoftintr(&sc->sc_bus); 1082 eintrs &= ~OHCI_WDH; 1083 } 1084 if (eintrs & OHCI_RD) { 1085 printf("%s: resume detect\n", sc->sc_bus.bdev.dv_xname); 1086 /* XXX process resume detect */ 1087 } 1088 if (eintrs & OHCI_UE) { 1089 printf("%s: unrecoverable error, controller halted\n", 1090 sc->sc_bus.bdev.dv_xname); 1091 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1092 /* XXX what else */ 1093 } 1094 if (eintrs & OHCI_RHSC) { 1095 ohci_rhsc(sc, sc->sc_intrxfer); 1096 /* 1097 * Disable RHSC interrupt for now, because it will be 1098 * on until the port has been reset. 1099 */ 1100 ohci_rhsc_able(sc, 0); 1101 DPRINTFN(2, ("%s: rhsc interrupt disabled\n", 1102 sc->sc_bus.bdev.dv_xname)); 1103 1104 /* Do not allow RHSC interrupts > 1 per second */ 1105 timeout_add_sec(&sc->sc_tmo_rhsc, 1); 1106 eintrs &= ~OHCI_RHSC; 1107 } 1108 1109 sc->sc_bus.intr_context--; 1110 1111 if (eintrs != 0) { 1112 /* Block unprocessed interrupts. XXX */ 1113 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1114 sc->sc_eintrs &= ~eintrs; 1115 printf("%s: blocking intrs 0x%x\n", 1116 sc->sc_bus.bdev.dv_xname, eintrs); 1117 } 1118 1119 return (1); 1120 } 1121 1122 void 1123 ohci_rhsc_able(struct ohci_softc *sc, int on) 1124 { 1125 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1126 if (on) { 1127 sc->sc_eintrs |= OHCI_RHSC; 1128 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1129 } else { 1130 sc->sc_eintrs &= ~OHCI_RHSC; 1131 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1132 } 1133 } 1134 1135 void 1136 ohci_rhsc_enable(void *v_sc) 1137 { 1138 struct ohci_softc *sc = v_sc; 1139 int s; 1140 1141 if (sc->sc_bus.dying) 1142 return; 1143 1144 s = splhardusb(); 1145 ohci_rhsc(sc, sc->sc_intrxfer); 1146 DPRINTFN(2, ("%s: rhsc interrupt enabled\n", 1147 sc->sc_bus.bdev.dv_xname)); 1148 1149 ohci_rhsc_able(sc, 1); 1150 splx(s); 1151 } 1152 1153 #ifdef OHCI_DEBUG 1154 char *ohci_cc_strs[] = { 1155 "NO_ERROR", 1156 "CRC", 1157 "BIT_STUFFING", 1158 "DATA_TOGGLE_MISMATCH", 1159 "STALL", 1160 "DEVICE_NOT_RESPONDING", 1161 "PID_CHECK_FAILURE", 1162 "UNEXPECTED_PID", 1163 "DATA_OVERRUN", 1164 "DATA_UNDERRUN", 1165 "BUFFER_OVERRUN", 1166 "BUFFER_UNDERRUN", 1167 "reserved", 1168 "reserved", 1169 "NOT_ACCESSED", 1170 "NOT_ACCESSED", 1171 }; 1172 #endif 1173 1174 void 1175 ohci_add_done(struct ohci_softc *sc, ohci_physaddr_t done) 1176 { 1177 struct ohci_soft_itd *sitd, *sidone, **ip; 1178 struct ohci_soft_td *std, *sdone, **p; 1179 1180 /* Reverse the done list. */ 1181 for (sdone = NULL, sidone = NULL; done != 0; ) { 1182 std = ohci_hash_find_td(sc, done); 1183 if (std != NULL) { 1184 std->dnext = sdone; 1185 done = letoh32(std->td.td_nexttd); 1186 sdone = std; 1187 DPRINTFN(10,("add TD %p\n", std)); 1188 continue; 1189 } 1190 sitd = ohci_hash_find_itd(sc, done); 1191 if (sitd != NULL) { 1192 sitd->dnext = sidone; 1193 done = letoh32(sitd->itd.itd_nextitd); 1194 sidone = sitd; 1195 DPRINTFN(5,("add ITD %p\n", sitd)); 1196 continue; 1197 } 1198 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done); 1199 } 1200 1201 /* sdone & sidone now hold the done lists. */ 1202 /* Put them on the already processed lists. */ 1203 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1204 ; 1205 *p = sdone; 1206 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1207 ; 1208 *ip = sidone; 1209 } 1210 1211 void 1212 ohci_softintr(void *v) 1213 { 1214 struct ohci_softc *sc = v; 1215 struct ohci_soft_itd *sitd, *sidone, *sitdnext; 1216 struct ohci_soft_td *std, *sdone, *stdnext; 1217 struct usbd_xfer *xfer; 1218 struct ohci_pipe *opipe; 1219 int len, cc, s; 1220 int i, j, actlen, iframes, uedir; 1221 1222 DPRINTFN(10,("ohci_softintr: enter\n")); 1223 1224 if (sc->sc_bus.dying) 1225 return; 1226 1227 sc->sc_bus.intr_context++; 1228 1229 s = splhardusb(); 1230 sdone = sc->sc_sdone; 1231 sc->sc_sdone = NULL; 1232 sidone = sc->sc_sidone; 1233 sc->sc_sidone = NULL; 1234 splx(s); 1235 1236 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1237 1238 #ifdef OHCI_DEBUG 1239 if (ohcidebug > 10) { 1240 DPRINTF(("ohci_process_done: TD done:\n")); 1241 ohci_dump_tds(sdone); 1242 } 1243 #endif 1244 1245 for (std = sdone; std; std = stdnext) { 1246 xfer = std->xfer; 1247 stdnext = std->dnext; 1248 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1249 std, xfer, xfer ? xfer->hcpriv : 0)); 1250 if (xfer == NULL) { 1251 /* 1252 * xfer == NULL: There seems to be no xfer associated 1253 * with this TD. It is tailp that happened to end up on 1254 * the done queue. 1255 * Shouldn't happen, but some chips are broken(?). 1256 */ 1257 continue; 1258 } 1259 if (xfer->status == USBD_CANCELLED || 1260 xfer->status == USBD_TIMEOUT) { 1261 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1262 xfer)); 1263 /* Handled by abort routine. */ 1264 continue; 1265 } 1266 timeout_del(&xfer->timeout_handle); 1267 usb_rem_task(xfer->device, &xfer->abort_task); 1268 1269 len = std->len; 1270 if (std->td.td_cbp != 0) 1271 len -= letoh32(std->td.td_be) - 1272 letoh32(std->td.td_cbp) + 1; 1273 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len, 1274 std->flags)); 1275 if (std->flags & OHCI_ADD_LEN) 1276 xfer->actlen += len; 1277 1278 cc = OHCI_TD_GET_CC(letoh32(std->td.td_flags)); 1279 if (cc == OHCI_CC_NO_ERROR) { 1280 if (std->flags & OHCI_CALL_DONE) { 1281 xfer->status = USBD_NORMAL_COMPLETION; 1282 s = splusb(); 1283 usb_transfer_complete(xfer); 1284 splx(s); 1285 } 1286 ohci_free_std(sc, std); 1287 } else { 1288 /* 1289 * Endpoint is halted. First unlink all the TDs 1290 * belonging to the failed transfer, and then restart 1291 * the endpoint. 1292 */ 1293 struct ohci_soft_td *p, *n; 1294 opipe = (struct ohci_pipe *)xfer->pipe; 1295 1296 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1297 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1298 ohci_cc_strs[OHCI_TD_GET_CC(letoh32(std->td.td_flags))])); 1299 1300 /* remove TDs */ 1301 for (p = std; p->xfer == xfer; p = n) { 1302 n = p->nexttd; 1303 ohci_free_std(sc, p); 1304 } 1305 1306 /* clear halt */ 1307 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1308 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1309 1310 if (cc == OHCI_CC_STALL) 1311 xfer->status = USBD_STALLED; 1312 else if (cc == OHCI_CC_DATA_UNDERRUN) 1313 xfer->status = USBD_NORMAL_COMPLETION; 1314 else 1315 xfer->status = USBD_IOERROR; 1316 s = splusb(); 1317 usb_transfer_complete(xfer); 1318 splx(s); 1319 } 1320 } 1321 1322 #ifdef OHCI_DEBUG 1323 if (ohcidebug > 10) { 1324 DPRINTF(("ohci_softintr: ITD done:\n")); 1325 ohci_dump_itds(sidone); 1326 } 1327 #endif 1328 1329 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1330 xfer = sitd->xfer; 1331 sitdnext = sitd->dnext; 1332 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1333 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1334 if (xfer == NULL) 1335 continue; 1336 if (xfer->status == USBD_CANCELLED || 1337 xfer->status == USBD_TIMEOUT) { 1338 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1339 xfer)); 1340 /* Handled by abort routine. */ 1341 continue; 1342 } 1343 #ifdef DIAGNOSTIC 1344 if (sitd->isdone) 1345 printf("ohci_softintr: sitd=%p is done\n", sitd); 1346 sitd->isdone = 1; 1347 #endif 1348 if (sitd->flags & OHCI_CALL_DONE) { 1349 struct ohci_soft_itd *next; 1350 1351 opipe = (struct ohci_pipe *)xfer->pipe; 1352 opipe->u.iso.inuse -= xfer->nframes; 1353 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc-> 1354 bEndpointAddress); 1355 xfer->status = USBD_NORMAL_COMPLETION; 1356 actlen = 0; 1357 for (i = 0, sitd = xfer->hcpriv; ; 1358 sitd = next) { 1359 next = sitd->nextitd; 1360 if (OHCI_ITD_GET_CC(letoh32(sitd-> 1361 itd.itd_flags)) != OHCI_CC_NO_ERROR) 1362 xfer->status = USBD_IOERROR; 1363 /* For input, update frlengths with actual */ 1364 /* XXX anything necessary for output? */ 1365 if (uedir == UE_DIR_IN && 1366 xfer->status == USBD_NORMAL_COMPLETION) { 1367 iframes = OHCI_ITD_GET_FC(letoh32( 1368 sitd->itd.itd_flags)); 1369 for (j = 0; j < iframes; i++, j++) { 1370 len = letoh16(sitd-> 1371 itd.itd_offset[j]); 1372 if ((OHCI_ITD_PSW_GET_CC(len) & 1373 OHCI_CC_NOT_ACCESSED_MASK) 1374 == OHCI_CC_NOT_ACCESSED) 1375 len = 0; 1376 else 1377 len = OHCI_ITD_PSW_LENGTH(len); 1378 xfer->frlengths[i] = len; 1379 actlen += len; 1380 } 1381 } 1382 if (sitd->flags & OHCI_CALL_DONE) 1383 break; 1384 ohci_free_sitd(sc, sitd); 1385 } 1386 ohci_free_sitd(sc, sitd); 1387 if (uedir == UE_DIR_IN && 1388 xfer->status == USBD_NORMAL_COMPLETION) 1389 xfer->actlen = actlen; 1390 xfer->hcpriv = NULL; 1391 1392 s = splusb(); 1393 usb_transfer_complete(xfer); 1394 splx(s); 1395 } 1396 } 1397 1398 if (sc->sc_softwake) { 1399 sc->sc_softwake = 0; 1400 wakeup(&sc->sc_softwake); 1401 } 1402 1403 sc->sc_bus.intr_context--; 1404 DPRINTFN(10,("ohci_softintr: done:\n")); 1405 } 1406 1407 void 1408 ohci_device_ctrl_done(struct usbd_xfer *xfer) 1409 { 1410 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer)); 1411 1412 #ifdef DIAGNOSTIC 1413 if (!(xfer->rqflags & URQ_REQUEST)) { 1414 panic("ohci_device_ctrl_done: not a request"); 1415 } 1416 #endif 1417 } 1418 1419 void 1420 ohci_device_intr_done(struct usbd_xfer *xfer) 1421 { 1422 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1423 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1424 struct ohci_soft_ed *sed = opipe->sed; 1425 struct ohci_soft_td *data, *tail; 1426 1427 1428 DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer, 1429 xfer->actlen)); 1430 1431 if (xfer->pipe->repeat) { 1432 data = opipe->tail.td; 1433 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1434 if (tail == NULL) { 1435 xfer->status = USBD_NOMEM; 1436 return; 1437 } 1438 tail->xfer = NULL; 1439 1440 data->td.td_flags = htole32( 1441 OHCI_TD_IN | OHCI_TD_NOCC | 1442 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1443 if (xfer->flags & USBD_SHORT_XFER_OK) 1444 data->td.td_flags |= htole32(OHCI_TD_R); 1445 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 1446 data->nexttd = tail; 1447 data->td.td_nexttd = htole32(tail->physaddr); 1448 data->td.td_be = htole32(letoh32(data->td.td_cbp) + 1449 xfer->length - 1); 1450 data->len = xfer->length; 1451 data->xfer = xfer; 1452 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1453 xfer->hcpriv = data; 1454 xfer->actlen = 0; 1455 1456 sed->ed.ed_tailp = htole32(tail->physaddr); 1457 opipe->tail.td = tail; 1458 } 1459 } 1460 1461 void 1462 ohci_device_bulk_done(struct usbd_xfer *xfer) 1463 { 1464 DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer, 1465 xfer->actlen)); 1466 } 1467 1468 void 1469 ohci_rhsc(struct ohci_softc *sc, struct usbd_xfer *xfer) 1470 { 1471 u_char *p; 1472 int i, m; 1473 int hstatus; 1474 1475 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1476 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1477 sc, xfer, hstatus)); 1478 1479 if (xfer == NULL) { 1480 /* Just ignore the change. */ 1481 return; 1482 } 1483 1484 p = KERNADDR(&xfer->dmabuf, 0); 1485 m = min(sc->sc_noport, xfer->length * 8 - 1); 1486 memset(p, 0, xfer->length); 1487 for (i = 1; i <= m; i++) { 1488 /* Pick out CHANGE bits from the status reg. */ 1489 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1490 p[i/8] |= 1 << (i%8); 1491 } 1492 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1493 xfer->actlen = xfer->length; 1494 xfer->status = USBD_NORMAL_COMPLETION; 1495 1496 usb_transfer_complete(xfer); 1497 } 1498 1499 void 1500 ohci_root_intr_done(struct usbd_xfer *xfer) 1501 { 1502 } 1503 1504 void 1505 ohci_root_ctrl_done(struct usbd_xfer *xfer) 1506 { 1507 } 1508 1509 /* 1510 * Wait here until controller claims to have an interrupt. 1511 * Then call ohci_intr and return. Use timeout to avoid waiting 1512 * too long. 1513 */ 1514 void 1515 ohci_waitintr(struct ohci_softc *sc, struct usbd_xfer *xfer) 1516 { 1517 int timo; 1518 u_int32_t intrs; 1519 1520 xfer->status = USBD_IN_PROGRESS; 1521 for (timo = xfer->timeout; timo >= 0; timo--) { 1522 usb_delay_ms(&sc->sc_bus, 1); 1523 if (sc->sc_bus.dying) 1524 break; 1525 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1526 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1527 #ifdef OHCI_DEBUG 1528 if (ohcidebug > 15) 1529 ohci_dumpregs(sc); 1530 #endif 1531 if (intrs) { 1532 ohci_intr1(sc); 1533 if (xfer->status != USBD_IN_PROGRESS) 1534 return; 1535 } 1536 } 1537 1538 /* Timeout */ 1539 DPRINTF(("ohci_waitintr: timeout\n")); 1540 xfer->status = USBD_TIMEOUT; 1541 usb_transfer_complete(xfer); 1542 /* XXX should free TD */ 1543 } 1544 1545 void 1546 ohci_poll(struct usbd_bus *bus) 1547 { 1548 struct ohci_softc *sc = (struct ohci_softc *)bus; 1549 #ifdef OHCI_DEBUG 1550 static int last; 1551 int new; 1552 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1553 if (new != last) { 1554 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1555 last = new; 1556 } 1557 #endif 1558 1559 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1560 ohci_intr1(sc); 1561 } 1562 1563 usbd_status 1564 ohci_device_request(struct usbd_xfer *xfer) 1565 { 1566 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1567 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1568 usb_device_request_t *req = &xfer->request; 1569 struct ohci_soft_td *setup, *stat, *next, *tail; 1570 struct ohci_soft_ed *sed; 1571 u_int len; 1572 usbd_status err; 1573 int s; 1574 1575 len = UGETW(req->wLength); 1576 1577 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1578 "wValue=0x%04x, wIndex=0x%04x len=%u, addr=%d, endpt=%d\n", 1579 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1580 UGETW(req->wIndex), len, xfer->device->address, 1581 xfer->pipe->endpoint->edesc->bEndpointAddress)); 1582 1583 setup = opipe->tail.td; 1584 stat = ohci_alloc_std(sc); 1585 if (stat == NULL) { 1586 err = USBD_NOMEM; 1587 goto bad1; 1588 } 1589 tail = ohci_alloc_std(sc); 1590 if (tail == NULL) { 1591 err = USBD_NOMEM; 1592 goto bad2; 1593 } 1594 tail->xfer = NULL; 1595 1596 sed = opipe->sed; 1597 1598 next = stat; 1599 1600 /* Set up data transaction */ 1601 if (len != 0) { 1602 struct ohci_soft_td *std = stat; 1603 1604 err = ohci_alloc_std_chain(sc, len, xfer, std, &stat); 1605 stat = stat->nexttd; /* point at free TD */ 1606 if (err) 1607 goto bad3; 1608 /* Start toggle at 1 and then use the carried toggle. */ 1609 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1610 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1611 } 1612 1613 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req); 1614 1615 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1616 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1617 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0)); 1618 setup->nexttd = next; 1619 setup->td.td_nexttd = htole32(next->physaddr); 1620 setup->td.td_be = htole32(letoh32(setup->td.td_cbp) + sizeof *req - 1); 1621 setup->len = 0; 1622 setup->xfer = xfer; 1623 setup->flags = 0; 1624 xfer->hcpriv = setup; 1625 1626 stat->td.td_flags = htole32( 1627 (usbd_xfer_isread(xfer) ? OHCI_TD_OUT : OHCI_TD_IN) | 1628 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1629 stat->td.td_cbp = 0; 1630 stat->nexttd = tail; 1631 stat->td.td_nexttd = htole32(tail->physaddr); 1632 stat->td.td_be = 0; 1633 stat->flags = OHCI_CALL_DONE; 1634 stat->len = 0; 1635 stat->xfer = xfer; 1636 1637 #ifdef OHCI_DEBUG 1638 if (ohcidebug > 5) { 1639 DPRINTF(("ohci_device_request:\n")); 1640 ohci_dump_ed(sed); 1641 ohci_dump_tds(setup); 1642 } 1643 #endif 1644 1645 /* Insert ED in schedule */ 1646 s = splusb(); 1647 sed->ed.ed_tailp = htole32(tail->physaddr); 1648 opipe->tail.td = tail; 1649 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1650 if (xfer->timeout && !sc->sc_bus.use_polling) { 1651 timeout_del(&xfer->timeout_handle); 1652 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 1653 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 1654 } 1655 splx(s); 1656 1657 #ifdef OHCI_DEBUG 1658 if (ohcidebug > 20) { 1659 delay(10000); 1660 DPRINTF(("ohci_device_request: status=%x\n", 1661 OREAD4(sc, OHCI_COMMAND_STATUS))); 1662 ohci_dumpregs(sc); 1663 printf("ctrl head:\n"); 1664 ohci_dump_ed(sc->sc_ctrl_head); 1665 printf("sed:\n"); 1666 ohci_dump_ed(sed); 1667 ohci_dump_tds(setup); 1668 } 1669 #endif 1670 1671 return (USBD_NORMAL_COMPLETION); 1672 1673 bad3: 1674 ohci_free_std(sc, tail); 1675 bad2: 1676 ohci_free_std(sc, stat); 1677 bad1: 1678 return (err); 1679 } 1680 1681 /* 1682 * Add an ED to the schedule. Called at splusb(). 1683 */ 1684 void 1685 ohci_add_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1686 { 1687 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1688 1689 SPLUSBCHECK; 1690 sed->next = head->next; 1691 sed->ed.ed_nexted = head->ed.ed_nexted; 1692 head->next = sed; 1693 head->ed.ed_nexted = htole32(sed->physaddr); 1694 } 1695 1696 /* 1697 * Remove an ED from the schedule. Called at splusb(). 1698 */ 1699 void 1700 ohci_rem_ed(struct ohci_soft_ed *sed, struct ohci_soft_ed *head) 1701 { 1702 struct ohci_soft_ed *p; 1703 1704 SPLUSBCHECK; 1705 1706 /* XXX */ 1707 for (p = head; p != NULL && p->next != sed; p = p->next) 1708 ; 1709 if (p == NULL) 1710 panic("ohci_rem_ed: ED not found"); 1711 p->next = sed->next; 1712 p->ed.ed_nexted = sed->ed.ed_nexted; 1713 } 1714 1715 /* 1716 * When a transfer is completed the TD is added to the done queue by 1717 * the host controller. This queue is the processed by software. 1718 * Unfortunately the queue contains the physical address of the TD 1719 * and we have no simple way to translate this back to a kernel address. 1720 * To make the translation possible (and fast) we use a hash table of 1721 * TDs currently in the schedule. The physical address is used as the 1722 * hash value. 1723 */ 1724 1725 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1726 /* Called at splusb() */ 1727 void 1728 ohci_hash_add_td(struct ohci_softc *sc, struct ohci_soft_td *std) 1729 { 1730 int h = HASH(std->physaddr); 1731 1732 SPLUSBCHECK; 1733 1734 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1735 } 1736 1737 struct ohci_soft_td * 1738 ohci_hash_find_td(struct ohci_softc *sc, ohci_physaddr_t a) 1739 { 1740 int h = HASH(a); 1741 struct ohci_soft_td *std; 1742 1743 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1744 std != NULL; 1745 std = LIST_NEXT(std, hnext)) 1746 if (std->physaddr == a) 1747 return (std); 1748 return (NULL); 1749 } 1750 1751 /* Called at splusb() */ 1752 void 1753 ohci_hash_add_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1754 { 1755 int h = HASH(sitd->physaddr); 1756 1757 SPLUSBCHECK; 1758 1759 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1760 sitd, (u_long)sitd->physaddr)); 1761 1762 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1763 } 1764 1765 /* Called at splusb() */ 1766 void 1767 ohci_hash_rem_itd(struct ohci_softc *sc, struct ohci_soft_itd *sitd) 1768 { 1769 SPLUSBCHECK; 1770 1771 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1772 sitd, (u_long)sitd->physaddr)); 1773 1774 LIST_REMOVE(sitd, hnext); 1775 } 1776 1777 struct ohci_soft_itd * 1778 ohci_hash_find_itd(struct ohci_softc *sc, ohci_physaddr_t a) 1779 { 1780 int h = HASH(a); 1781 struct ohci_soft_itd *sitd; 1782 1783 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1784 sitd != NULL; 1785 sitd = LIST_NEXT(sitd, hnext)) 1786 if (sitd->physaddr == a) 1787 return (sitd); 1788 return (NULL); 1789 } 1790 1791 void 1792 ohci_timeout(void *addr) 1793 { 1794 struct usbd_xfer *xfer = addr; 1795 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 1796 1797 if (sc->sc_bus.dying) { 1798 ohci_timeout_task(addr); 1799 return; 1800 } 1801 1802 usb_init_task(&xfer->abort_task, ohci_timeout_task, addr, 1803 USB_TASK_TYPE_ABORT); 1804 usb_add_task(xfer->device, &xfer->abort_task); 1805 } 1806 1807 void 1808 ohci_timeout_task(void *addr) 1809 { 1810 struct usbd_xfer *xfer = addr; 1811 int s; 1812 1813 DPRINTF(("%s: xfer=%p\n", __func__, xfer)); 1814 1815 s = splusb(); 1816 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1817 splx(s); 1818 } 1819 1820 #ifdef OHCI_DEBUG 1821 void 1822 ohci_dump_tds(struct ohci_soft_td *std) 1823 { 1824 for (; std; std = std->nexttd) 1825 ohci_dump_td(std); 1826 } 1827 1828 void 1829 ohci_dump_td(struct ohci_soft_td *std) 1830 { 1831 char sbuf[128]; 1832 1833 bitmask_snprintf((u_int32_t)letoh32(std->td.td_flags), 1834 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1835 sbuf, sizeof(sbuf)); 1836 1837 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1838 "nexttd=0x%08lx be=0x%08lx\n", 1839 std, (u_long)std->physaddr, sbuf, 1840 OHCI_TD_GET_DI(letoh32(std->td.td_flags)), 1841 OHCI_TD_GET_EC(letoh32(std->td.td_flags)), 1842 OHCI_TD_GET_CC(letoh32(std->td.td_flags)), 1843 (u_long)letoh32(std->td.td_cbp), 1844 (u_long)letoh32(std->td.td_nexttd), 1845 (u_long)letoh32(std->td.td_be)); 1846 } 1847 1848 void 1849 ohci_dump_itd(struct ohci_soft_itd *sitd) 1850 { 1851 int i; 1852 1853 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1854 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1855 sitd, (u_long)sitd->physaddr, 1856 OHCI_ITD_GET_SF(letoh32(sitd->itd.itd_flags)), 1857 OHCI_ITD_GET_DI(letoh32(sitd->itd.itd_flags)), 1858 OHCI_ITD_GET_FC(letoh32(sitd->itd.itd_flags)), 1859 OHCI_ITD_GET_CC(letoh32(sitd->itd.itd_flags)), 1860 (u_long)letoh32(sitd->itd.itd_bp0), 1861 (u_long)letoh32(sitd->itd.itd_nextitd), 1862 (u_long)letoh32(sitd->itd.itd_be)); 1863 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1864 printf("offs[%d]=0x%04x ", i, 1865 (u_int)letoh16(sitd->itd.itd_offset[i])); 1866 printf("\n"); 1867 } 1868 1869 void 1870 ohci_dump_itds(struct ohci_soft_itd *sitd) 1871 { 1872 for (; sitd; sitd = sitd->nextitd) 1873 ohci_dump_itd(sitd); 1874 } 1875 1876 void 1877 ohci_dump_ed(struct ohci_soft_ed *sed) 1878 { 1879 char sbuf[128], sbuf2[128]; 1880 1881 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_flags), 1882 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1883 sbuf, sizeof(sbuf)); 1884 bitmask_snprintf((u_int32_t)letoh32(sed->ed.ed_headp), 1885 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1886 1887 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n" 1888 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1889 sed, (u_long)sed->physaddr, 1890 OHCI_ED_GET_FA(letoh32(sed->ed.ed_flags)), 1891 OHCI_ED_GET_EN(letoh32(sed->ed.ed_flags)), 1892 OHCI_ED_GET_MAXP(letoh32(sed->ed.ed_flags)), sbuf, 1893 (u_long)letoh32(sed->ed.ed_tailp), sbuf2, 1894 (u_long)letoh32(sed->ed.ed_headp), 1895 (u_long)letoh32(sed->ed.ed_nexted)); 1896 } 1897 #endif 1898 1899 usbd_status 1900 ohci_open(struct usbd_pipe *pipe) 1901 { 1902 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 1903 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1904 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1905 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1906 struct ohci_soft_ed *sed = NULL; 1907 struct ohci_soft_td *std = NULL; 1908 struct ohci_soft_itd *sitd; 1909 ohci_physaddr_t tdphys; 1910 u_int32_t fmt; 1911 usbd_status err; 1912 int s; 1913 int ival; 1914 1915 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d\n", 1916 pipe, pipe->device->address, ed->bEndpointAddress)); 1917 1918 if (sc->sc_bus.dying) 1919 return (USBD_IOERROR); 1920 1921 /* Root Hub */ 1922 if (pipe->device->depth == 0) { 1923 switch (ed->bEndpointAddress) { 1924 case USB_CONTROL_ENDPOINT: 1925 pipe->methods = &ohci_root_ctrl_methods; 1926 break; 1927 case UE_DIR_IN | OHCI_INTR_ENDPT: 1928 pipe->methods = &ohci_root_intr_methods; 1929 break; 1930 default: 1931 return (USBD_INVAL); 1932 } 1933 } else { 1934 sed = ohci_alloc_sed(sc); 1935 if (sed == NULL) 1936 goto bad0; 1937 opipe->sed = sed; 1938 if (xfertype == UE_ISOCHRONOUS) { 1939 sitd = ohci_alloc_sitd(sc); 1940 if (sitd == NULL) 1941 goto bad1; 1942 opipe->tail.itd = sitd; 1943 tdphys = sitd->physaddr; 1944 fmt = OHCI_ED_FORMAT_ISO; 1945 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1946 fmt |= OHCI_ED_DIR_IN; 1947 else 1948 fmt |= OHCI_ED_DIR_OUT; 1949 } else { 1950 std = ohci_alloc_std(sc); 1951 if (std == NULL) 1952 goto bad1; 1953 opipe->tail.td = std; 1954 tdphys = std->physaddr; 1955 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1956 } 1957 sed->ed.ed_flags = htole32( 1958 OHCI_ED_SET_FA(pipe->device->address) | 1959 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) | 1960 (pipe->device->speed == USB_SPEED_LOW ? 1961 OHCI_ED_SPEED : 0) | 1962 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1963 sed->ed.ed_headp = htole32(tdphys | 1964 (pipe->endpoint->savedtoggle ? OHCI_TOGGLECARRY : 0)); 1965 sed->ed.ed_tailp = htole32(tdphys); 1966 1967 switch (xfertype) { 1968 case UE_CONTROL: 1969 pipe->methods = &ohci_device_ctrl_methods; 1970 err = usb_allocmem(&sc->sc_bus, 1971 sizeof(usb_device_request_t), 1972 0, &opipe->u.ctl.reqdma); 1973 if (err) 1974 goto bad; 1975 s = splusb(); 1976 ohci_add_ed(sed, sc->sc_ctrl_head); 1977 splx(s); 1978 break; 1979 case UE_INTERRUPT: 1980 pipe->methods = &ohci_device_intr_methods; 1981 ival = pipe->interval; 1982 if (ival == USBD_DEFAULT_INTERVAL) 1983 ival = ed->bInterval; 1984 return (ohci_device_setintr(sc, opipe, ival)); 1985 case UE_ISOCHRONOUS: 1986 pipe->methods = &ohci_device_isoc_methods; 1987 return (ohci_setup_isoc(pipe)); 1988 case UE_BULK: 1989 pipe->methods = &ohci_device_bulk_methods; 1990 s = splusb(); 1991 ohci_add_ed(sed, sc->sc_bulk_head); 1992 splx(s); 1993 break; 1994 } 1995 } 1996 return (USBD_NORMAL_COMPLETION); 1997 1998 bad: 1999 if (std != NULL) 2000 ohci_free_std(sc, std); 2001 bad1: 2002 if (sed != NULL) 2003 ohci_free_sed(sc, sed); 2004 bad0: 2005 return (USBD_NOMEM); 2006 2007 } 2008 2009 /* 2010 * Work around the half configured control (default) pipe when setting 2011 * the address of a device. 2012 * 2013 * Because a single ED is setup per endpoint in ohci_open(), and the 2014 * control pipe is configured before we could have set the address 2015 * of the device or read the wMaxPacketSize of the endpoint, we have 2016 * to re-open the pipe twice here. 2017 */ 2018 int 2019 ohci_setaddr(struct usbd_device *dev, int addr) 2020 { 2021 /* Root Hub */ 2022 if (dev->depth == 0) 2023 return (0); 2024 2025 /* Re-establish the default pipe with the new max packet size. */ 2026 ohci_device_ctrl_close(dev->default_pipe); 2027 if (ohci_open(dev->default_pipe)) 2028 return (EINVAL); 2029 2030 if (usbd_set_address(dev, addr)) 2031 return (1); 2032 2033 dev->address = addr; 2034 2035 /* Re-establish the default pipe with the new address. */ 2036 ohci_device_ctrl_close(dev->default_pipe); 2037 if (ohci_open(dev->default_pipe)) 2038 return (EINVAL); 2039 2040 return (0); 2041 } 2042 2043 /* 2044 * Close a reqular pipe. 2045 * Assumes that there are no pending transactions. 2046 */ 2047 void 2048 ohci_close_pipe(struct usbd_pipe *pipe, struct ohci_soft_ed *head) 2049 { 2050 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2051 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2052 struct ohci_soft_ed *sed = opipe->sed; 2053 int s; 2054 2055 s = splusb(); 2056 #ifdef DIAGNOSTIC 2057 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2058 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2059 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2060 struct ohci_soft_td *std; 2061 std = ohci_hash_find_td(sc, letoh32(sed->ed.ed_headp)); 2062 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2063 "tl=0x%x pipe=%p, std=%p\n", sed, 2064 (int)letoh32(sed->ed.ed_headp), 2065 (int)letoh32(sed->ed.ed_tailp), 2066 pipe, std); 2067 #ifdef USB_DEBUG 2068 usbd_dump_pipe(pipe); 2069 #endif 2070 #ifdef OHCI_DEBUG 2071 ohci_dump_ed(sed); 2072 if (std) 2073 ohci_dump_td(std); 2074 #endif 2075 usb_delay_ms(&sc->sc_bus, 2); 2076 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2077 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2078 printf("ohci_close_pipe: pipe still not empty\n"); 2079 } 2080 #endif 2081 ohci_rem_ed(sed, head); 2082 /* Make sure the host controller is not touching this ED */ 2083 usb_delay_ms(&sc->sc_bus, 1); 2084 splx(s); 2085 pipe->endpoint->savedtoggle = 2086 (letoh32(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0; 2087 ohci_free_sed(sc, opipe->sed); 2088 } 2089 2090 /* 2091 * Abort a device request. 2092 * If this routine is called at splusb() it guarantees that the request 2093 * will be removed from the hardware scheduling and that the callback 2094 * for it will be called with USBD_CANCELLED status. 2095 * It's impossible to guarantee that the requested transfer will not 2096 * have happened since the hardware runs concurrently. 2097 * If the transaction has already happened we rely on the ordinary 2098 * interrupt processing to process it. 2099 */ 2100 void 2101 ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status) 2102 { 2103 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2104 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2105 struct ohci_soft_ed *sed = opipe->sed; 2106 struct ohci_soft_td *p, *n; 2107 ohci_physaddr_t headp; 2108 int s, hit; 2109 2110 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe, 2111 sed)); 2112 2113 if (sc->sc_bus.dying) { 2114 /* If we're dying, just do the software part. */ 2115 s = splusb(); 2116 xfer->status = status; /* make software ignore it */ 2117 timeout_del(&xfer->timeout_handle); 2118 usb_rem_task(xfer->device, &xfer->abort_task); 2119 usb_transfer_complete(xfer); 2120 splx(s); 2121 return; 2122 } 2123 2124 if (xfer->device->bus->intr_context || !curproc) 2125 panic("ohci_abort_xfer: not in process context"); 2126 2127 /* 2128 * Step 1: Make interrupt routine and hardware ignore xfer. 2129 */ 2130 s = splusb(); 2131 xfer->status = status; /* make software ignore it */ 2132 timeout_del(&xfer->timeout_handle); 2133 usb_rem_task(xfer->device, &xfer->abort_task); 2134 splx(s); 2135 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2136 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2137 2138 /* 2139 * Step 2: Wait until we know hardware has finished any possible 2140 * use of the xfer. Also make sure the soft interrupt routine 2141 * has run. 2142 */ 2143 usb_delay_ms(xfer->device->bus, 20); /* Hardware finishes in 1ms */ 2144 s = splusb(); 2145 sc->sc_softwake = 1; 2146 usb_schedsoftintr(&sc->sc_bus); 2147 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0); 2148 splx(s); 2149 2150 /* 2151 * Step 3: Remove any vestiges of the xfer from the hardware. 2152 * The complication here is that the hardware may have executed 2153 * beyond the xfer we're trying to abort. So as we're scanning 2154 * the TDs of this xfer we check if the hardware points to 2155 * any of them. 2156 */ 2157 s = splusb(); /* XXX why? */ 2158 p = xfer->hcpriv; 2159 #ifdef DIAGNOSTIC 2160 if (p == NULL) { 2161 splx(s); 2162 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2163 return; 2164 } 2165 #endif 2166 #ifdef OHCI_DEBUG 2167 if (ohcidebug > 1) { 2168 DPRINTF(("ohci_abort_xfer: sed=\n")); 2169 ohci_dump_ed(sed); 2170 ohci_dump_tds(p); 2171 } 2172 #endif 2173 headp = letoh32(sed->ed.ed_headp) & OHCI_HEADMASK; 2174 hit = 0; 2175 for (; p->xfer == xfer; p = n) { 2176 hit |= headp == p->physaddr; 2177 n = p->nexttd; 2178 if (OHCI_TD_GET_CC(letoh32(p->td.td_flags)) == 2179 OHCI_CC_NOT_ACCESSED) 2180 ohci_free_std(sc, p); 2181 } 2182 /* Zap headp register if hardware pointed inside the xfer. */ 2183 if (hit) { 2184 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n", 2185 (int)p->physaddr, (int)letoh32(sed->ed.ed_tailp))); 2186 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2187 } else { 2188 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2189 } 2190 2191 /* 2192 * Step 4: Turn on hardware again. 2193 */ 2194 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2195 2196 /* 2197 * Step 5: Execute callback. 2198 */ 2199 usb_transfer_complete(xfer); 2200 2201 splx(s); 2202 } 2203 2204 /* 2205 * Data structures and routines to emulate the root hub. 2206 */ 2207 usb_device_descriptor_t ohci_devd = { 2208 USB_DEVICE_DESCRIPTOR_SIZE, 2209 UDESC_DEVICE, /* type */ 2210 {0x00, 0x01}, /* USB version */ 2211 UDCLASS_HUB, /* class */ 2212 UDSUBCLASS_HUB, /* subclass */ 2213 UDPROTO_FSHUB, 2214 64, /* max packet */ 2215 {0},{0},{0x00,0x01}, /* device id */ 2216 1,2,0, /* string indices */ 2217 1 /* # of configurations */ 2218 }; 2219 2220 usb_config_descriptor_t ohci_confd = { 2221 USB_CONFIG_DESCRIPTOR_SIZE, 2222 UDESC_CONFIG, 2223 {USB_CONFIG_DESCRIPTOR_SIZE + 2224 USB_INTERFACE_DESCRIPTOR_SIZE + 2225 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2226 1, 2227 1, 2228 0, 2229 UC_SELF_POWERED, 2230 0 /* max power */ 2231 }; 2232 2233 usb_interface_descriptor_t ohci_ifcd = { 2234 USB_INTERFACE_DESCRIPTOR_SIZE, 2235 UDESC_INTERFACE, 2236 0, 2237 0, 2238 1, 2239 UICLASS_HUB, 2240 UISUBCLASS_HUB, 2241 UIPROTO_FSHUB, 2242 0 2243 }; 2244 2245 usb_endpoint_descriptor_t ohci_endpd = { 2246 USB_ENDPOINT_DESCRIPTOR_SIZE, 2247 UDESC_ENDPOINT, 2248 UE_DIR_IN | OHCI_INTR_ENDPT, 2249 UE_INTERRUPT, 2250 {8, 0}, /* max packet */ 2251 255 2252 }; 2253 2254 usb_hub_descriptor_t ohci_hubd = { 2255 USB_HUB_DESCRIPTOR_SIZE, 2256 UDESC_HUB, 2257 0, 2258 {0,0}, 2259 0, 2260 0, 2261 {0}, 2262 }; 2263 2264 /* 2265 * Simulate a hardware hub by handling all the necessary requests. 2266 */ 2267 usbd_status 2268 ohci_root_ctrl_transfer(struct usbd_xfer *xfer) 2269 { 2270 usbd_status err; 2271 2272 /* Insert last in queue. */ 2273 err = usb_insert_transfer(xfer); 2274 if (err) 2275 return (err); 2276 2277 /* Pipe isn't running, start first */ 2278 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2279 } 2280 2281 usbd_status 2282 ohci_root_ctrl_start(struct usbd_xfer *xfer) 2283 { 2284 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2285 usb_device_request_t *req; 2286 void *buf = NULL; 2287 int port, i; 2288 int s, len, value, index, l, totlen = 0; 2289 usb_port_status_t ps; 2290 usb_hub_descriptor_t hubd; 2291 usbd_status err; 2292 u_int32_t v; 2293 2294 if (sc->sc_bus.dying) 2295 return (USBD_IOERROR); 2296 2297 #ifdef DIAGNOSTIC 2298 if (!(xfer->rqflags & URQ_REQUEST)) 2299 /* XXX panic */ 2300 return (USBD_INVAL); 2301 #endif 2302 req = &xfer->request; 2303 2304 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2305 req->bmRequestType, req->bRequest)); 2306 2307 len = UGETW(req->wLength); 2308 value = UGETW(req->wValue); 2309 index = UGETW(req->wIndex); 2310 2311 if (len != 0) 2312 buf = KERNADDR(&xfer->dmabuf, 0); 2313 2314 #define C(x,y) ((x) | ((y) << 8)) 2315 switch(C(req->bRequest, req->bmRequestType)) { 2316 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2317 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2318 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2319 /* 2320 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2321 * for the integrated root hub. 2322 */ 2323 break; 2324 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2325 if (len > 0) { 2326 *(u_int8_t *)buf = sc->sc_conf; 2327 totlen = 1; 2328 } 2329 break; 2330 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2331 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2332 switch(value >> 8) { 2333 case UDESC_DEVICE: 2334 if ((value & 0xff) != 0) { 2335 err = USBD_IOERROR; 2336 goto ret; 2337 } 2338 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2339 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2340 memcpy(buf, &ohci_devd, l); 2341 break; 2342 case UDESC_CONFIG: 2343 if ((value & 0xff) != 0) { 2344 err = USBD_IOERROR; 2345 goto ret; 2346 } 2347 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2348 memcpy(buf, &ohci_confd, l); 2349 buf = (char *)buf + l; 2350 len -= l; 2351 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2352 totlen += l; 2353 memcpy(buf, &ohci_ifcd, l); 2354 buf = (char *)buf + l; 2355 len -= l; 2356 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2357 totlen += l; 2358 memcpy(buf, &ohci_endpd, l); 2359 break; 2360 case UDESC_STRING: 2361 if (len == 0) 2362 break; 2363 *(u_int8_t *)buf = 0; 2364 totlen = 1; 2365 switch (value & 0xff) { 2366 case 0: /* Language table */ 2367 totlen = usbd_str(buf, len, "\001"); 2368 break; 2369 case 1: /* Vendor */ 2370 totlen = usbd_str(buf, len, sc->sc_vendor); 2371 break; 2372 case 2: /* Product */ 2373 totlen = usbd_str(buf, len, "OHCI root hub"); 2374 break; 2375 } 2376 break; 2377 default: 2378 err = USBD_IOERROR; 2379 goto ret; 2380 } 2381 break; 2382 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2383 if (len > 0) { 2384 *(u_int8_t *)buf = 0; 2385 totlen = 1; 2386 } 2387 break; 2388 case C(UR_GET_STATUS, UT_READ_DEVICE): 2389 if (len > 1) { 2390 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2391 totlen = 2; 2392 } 2393 break; 2394 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2395 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2396 if (len > 1) { 2397 USETW(((usb_status_t *)buf)->wStatus, 0); 2398 totlen = 2; 2399 } 2400 break; 2401 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2402 if (value >= USB_MAX_DEVICES) { 2403 err = USBD_IOERROR; 2404 goto ret; 2405 } 2406 break; 2407 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2408 if (value != 0 && value != 1) { 2409 err = USBD_IOERROR; 2410 goto ret; 2411 } 2412 sc->sc_conf = value; 2413 break; 2414 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2415 break; 2416 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2417 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2418 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2419 err = USBD_IOERROR; 2420 goto ret; 2421 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2422 break; 2423 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2424 break; 2425 /* Hub requests */ 2426 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2427 break; 2428 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2429 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2430 "port=%d feature=%d\n", 2431 index, value)); 2432 if (index < 1 || index > sc->sc_noport) { 2433 err = USBD_IOERROR; 2434 goto ret; 2435 } 2436 port = OHCI_RH_PORT_STATUS(index); 2437 switch(value) { 2438 case UHF_PORT_ENABLE: 2439 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2440 break; 2441 case UHF_PORT_SUSPEND: 2442 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2443 break; 2444 case UHF_PORT_POWER: 2445 /* Yes, writing to the LOW_SPEED bit clears power. */ 2446 OWRITE4(sc, port, UPS_LOW_SPEED); 2447 break; 2448 case UHF_C_PORT_CONNECTION: 2449 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2450 break; 2451 case UHF_C_PORT_ENABLE: 2452 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2453 break; 2454 case UHF_C_PORT_SUSPEND: 2455 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2456 break; 2457 case UHF_C_PORT_OVER_CURRENT: 2458 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2459 break; 2460 case UHF_C_PORT_RESET: 2461 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2462 break; 2463 default: 2464 err = USBD_IOERROR; 2465 goto ret; 2466 } 2467 switch(value) { 2468 case UHF_C_PORT_CONNECTION: 2469 case UHF_C_PORT_ENABLE: 2470 case UHF_C_PORT_SUSPEND: 2471 case UHF_C_PORT_OVER_CURRENT: 2472 case UHF_C_PORT_RESET: 2473 /* Enable RHSC interrupt if condition is cleared. */ 2474 if ((OREAD4(sc, port) >> 16) == 0) 2475 ohci_rhsc_able(sc, 1); 2476 break; 2477 default: 2478 break; 2479 } 2480 break; 2481 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2482 if ((value & 0xff) != 0) { 2483 err = USBD_IOERROR; 2484 goto ret; 2485 } 2486 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2487 hubd = ohci_hubd; 2488 hubd.bNbrPorts = sc->sc_noport; 2489 USETW(hubd.wHubCharacteristics, 2490 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2491 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2492 /* XXX overcurrent */ 2493 ); 2494 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2495 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2496 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2497 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2498 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2499 l = min(len, hubd.bDescLength); 2500 totlen = l; 2501 memcpy(buf, &hubd, l); 2502 break; 2503 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2504 if (len != 4) { 2505 err = USBD_IOERROR; 2506 goto ret; 2507 } 2508 memset(buf, 0, len); /* ? XXX */ 2509 totlen = len; 2510 break; 2511 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2512 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2513 index)); 2514 if (index < 1 || index > sc->sc_noport) { 2515 err = USBD_IOERROR; 2516 goto ret; 2517 } 2518 if (len != 4) { 2519 err = USBD_IOERROR; 2520 goto ret; 2521 } 2522 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2523 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2524 v)); 2525 USETW(ps.wPortStatus, v); 2526 USETW(ps.wPortChange, v >> 16); 2527 l = min(len, sizeof ps); 2528 memcpy(buf, &ps, l); 2529 totlen = l; 2530 break; 2531 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2532 err = USBD_IOERROR; 2533 goto ret; 2534 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2535 break; 2536 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2537 if (index < 1 || index > sc->sc_noport) { 2538 err = USBD_IOERROR; 2539 goto ret; 2540 } 2541 port = OHCI_RH_PORT_STATUS(index); 2542 switch(value) { 2543 case UHF_PORT_ENABLE: 2544 OWRITE4(sc, port, UPS_PORT_ENABLED); 2545 break; 2546 case UHF_PORT_SUSPEND: 2547 OWRITE4(sc, port, UPS_SUSPEND); 2548 break; 2549 case UHF_PORT_RESET: 2550 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2551 index)); 2552 OWRITE4(sc, port, UPS_RESET); 2553 for (i = 0; i < 5; i++) { 2554 usb_delay_ms(&sc->sc_bus, 2555 USB_PORT_ROOT_RESET_DELAY); 2556 if (sc->sc_bus.dying) { 2557 err = USBD_IOERROR; 2558 goto ret; 2559 } 2560 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2561 break; 2562 } 2563 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2564 index, OREAD4(sc, port))); 2565 break; 2566 case UHF_PORT_POWER: 2567 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2568 "%d\n", index)); 2569 OWRITE4(sc, port, UPS_PORT_POWER); 2570 break; 2571 case UHF_PORT_DISOWN_TO_1_1: 2572 /* accept, but do nothing */ 2573 break; 2574 default: 2575 err = USBD_IOERROR; 2576 goto ret; 2577 } 2578 break; 2579 default: 2580 err = USBD_IOERROR; 2581 goto ret; 2582 } 2583 xfer->actlen = totlen; 2584 err = USBD_NORMAL_COMPLETION; 2585 ret: 2586 xfer->status = err; 2587 s = splusb(); 2588 usb_transfer_complete(xfer); 2589 splx(s); 2590 return (USBD_IN_PROGRESS); 2591 } 2592 2593 /* Abort a root control request. */ 2594 void 2595 ohci_root_ctrl_abort(struct usbd_xfer *xfer) 2596 { 2597 /* Nothing to do, all transfers are synchronous. */ 2598 } 2599 2600 /* Close the root pipe. */ 2601 void 2602 ohci_root_ctrl_close(struct usbd_pipe *pipe) 2603 { 2604 DPRINTF(("ohci_root_ctrl_close\n")); 2605 /* Nothing to do. */ 2606 } 2607 2608 usbd_status 2609 ohci_root_intr_transfer(struct usbd_xfer *xfer) 2610 { 2611 usbd_status err; 2612 2613 /* Insert last in queue. */ 2614 err = usb_insert_transfer(xfer); 2615 if (err) 2616 return (err); 2617 2618 /* Pipe isn't running, start first */ 2619 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2620 } 2621 2622 usbd_status 2623 ohci_root_intr_start(struct usbd_xfer *xfer) 2624 { 2625 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2626 2627 if (sc->sc_bus.dying) 2628 return (USBD_IOERROR); 2629 2630 sc->sc_intrxfer = xfer; 2631 2632 return (USBD_IN_PROGRESS); 2633 } 2634 2635 void 2636 ohci_root_intr_abort(struct usbd_xfer *xfer) 2637 { 2638 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2639 int s; 2640 2641 sc->sc_intrxfer = NULL; 2642 2643 xfer->status = USBD_CANCELLED; 2644 s = splusb(); 2645 usb_transfer_complete(xfer); 2646 splx(s); 2647 } 2648 2649 void 2650 ohci_root_intr_close(struct usbd_pipe *pipe) 2651 { 2652 } 2653 2654 usbd_status 2655 ohci_device_ctrl_transfer(struct usbd_xfer *xfer) 2656 { 2657 usbd_status err; 2658 2659 /* Insert last in queue. */ 2660 err = usb_insert_transfer(xfer); 2661 if (err) 2662 return (err); 2663 2664 /* Pipe isn't running, start first */ 2665 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2666 } 2667 2668 usbd_status 2669 ohci_device_ctrl_start(struct usbd_xfer *xfer) 2670 { 2671 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2672 usbd_status err; 2673 2674 if (sc->sc_bus.dying) 2675 return (USBD_IOERROR); 2676 2677 #ifdef DIAGNOSTIC 2678 if (!(xfer->rqflags & URQ_REQUEST)) { 2679 /* XXX panic */ 2680 printf("ohci_device_ctrl_transfer: not a request\n"); 2681 return (USBD_INVAL); 2682 } 2683 #endif 2684 2685 err = ohci_device_request(xfer); 2686 if (err) 2687 return (err); 2688 2689 if (sc->sc_bus.use_polling) 2690 ohci_waitintr(sc, xfer); 2691 2692 return (USBD_IN_PROGRESS); 2693 } 2694 2695 /* Abort a device control request. */ 2696 void 2697 ohci_device_ctrl_abort(struct usbd_xfer *xfer) 2698 { 2699 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2700 ohci_abort_xfer(xfer, USBD_CANCELLED); 2701 } 2702 2703 /* Close a device control pipe. */ 2704 void 2705 ohci_device_ctrl_close(struct usbd_pipe *pipe) 2706 { 2707 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2708 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2709 2710 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2711 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2712 ohci_free_std(sc, opipe->tail.td); 2713 } 2714 2715 /************************/ 2716 2717 void 2718 ohci_device_clear_toggle(struct usbd_pipe *pipe) 2719 { 2720 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2721 2722 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2723 } 2724 2725 usbd_status 2726 ohci_device_bulk_transfer(struct usbd_xfer *xfer) 2727 { 2728 usbd_status err; 2729 2730 /* Insert last in queue. */ 2731 err = usb_insert_transfer(xfer); 2732 if (err) 2733 return (err); 2734 2735 /* Pipe isn't running, start first */ 2736 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2737 } 2738 2739 usbd_status 2740 ohci_device_bulk_start(struct usbd_xfer *xfer) 2741 { 2742 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2743 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2744 struct ohci_soft_td *data, *tail, *tdp; 2745 struct ohci_soft_ed *sed; 2746 u_int len; 2747 int s, endpt; 2748 usbd_status err; 2749 2750 if (sc->sc_bus.dying) 2751 return (USBD_IOERROR); 2752 2753 #ifdef DIAGNOSTIC 2754 if (xfer->rqflags & URQ_REQUEST) { 2755 /* XXX panic */ 2756 printf("ohci_device_bulk_start: a request\n"); 2757 return (USBD_INVAL); 2758 } 2759 #endif 2760 2761 len = xfer->length; 2762 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2763 sed = opipe->sed; 2764 2765 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%u " 2766 "flags=%d endpt=%d\n", xfer, len, xfer->flags, endpt)); 2767 2768 /* Update device address */ 2769 sed->ed.ed_flags = htole32( 2770 (letoh32(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2771 OHCI_ED_SET_FA(xfer->device->address)); 2772 2773 /* Allocate a chain of new TDs (including a new tail). */ 2774 data = opipe->tail.td; 2775 err = ohci_alloc_std_chain(sc, len, xfer, data, &tail); 2776 /* We want interrupt at the end of the transfer. */ 2777 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2778 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2779 tail->flags |= OHCI_CALL_DONE; 2780 tail = tail->nexttd; /* point at sentinel */ 2781 if (err) 2782 return (err); 2783 2784 tail->xfer = NULL; 2785 xfer->hcpriv = data; 2786 2787 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2788 "td_cbp=0x%08x td_be=0x%08x\n", 2789 (int)letoh32(sed->ed.ed_flags), 2790 (int)letoh32(data->td.td_flags), 2791 (int)letoh32(data->td.td_cbp), 2792 (int)letoh32(data->td.td_be))); 2793 2794 #ifdef OHCI_DEBUG 2795 if (ohcidebug > 5) { 2796 ohci_dump_ed(sed); 2797 ohci_dump_tds(data); 2798 } 2799 #endif 2800 2801 /* Insert ED in schedule */ 2802 s = splusb(); 2803 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2804 tdp->xfer = xfer; 2805 } 2806 sed->ed.ed_tailp = htole32(tail->physaddr); 2807 opipe->tail.td = tail; 2808 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2809 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2810 if (xfer->timeout && !sc->sc_bus.use_polling) { 2811 timeout_del(&xfer->timeout_handle); 2812 timeout_set(&xfer->timeout_handle, ohci_timeout, xfer); 2813 timeout_add_msec(&xfer->timeout_handle, xfer->timeout); 2814 } 2815 2816 #if 0 2817 /* This goes wrong if we are too slow. */ 2818 if (ohcidebug > 10) { 2819 delay(10000); 2820 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2821 OREAD4(sc, OHCI_COMMAND_STATUS))); 2822 ohci_dump_ed(sed); 2823 ohci_dump_tds(data); 2824 } 2825 #endif 2826 2827 splx(s); 2828 2829 if (sc->sc_bus.use_polling) 2830 ohci_waitintr(sc, xfer); 2831 2832 return (USBD_IN_PROGRESS); 2833 } 2834 2835 void 2836 ohci_device_bulk_abort(struct usbd_xfer *xfer) 2837 { 2838 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2839 ohci_abort_xfer(xfer, USBD_CANCELLED); 2840 } 2841 2842 /* 2843 * Close a device bulk pipe. 2844 */ 2845 void 2846 ohci_device_bulk_close(struct usbd_pipe *pipe) 2847 { 2848 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2849 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2850 2851 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2852 ohci_close_pipe(pipe, sc->sc_bulk_head); 2853 ohci_free_std(sc, opipe->tail.td); 2854 } 2855 2856 /************************/ 2857 2858 usbd_status 2859 ohci_device_intr_transfer(struct usbd_xfer *xfer) 2860 { 2861 usbd_status err; 2862 2863 /* Insert last in queue. */ 2864 err = usb_insert_transfer(xfer); 2865 if (err) 2866 return (err); 2867 2868 /* Pipe isn't running, start first */ 2869 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2870 } 2871 2872 usbd_status 2873 ohci_device_intr_start(struct usbd_xfer *xfer) 2874 { 2875 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 2876 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2877 struct ohci_soft_ed *sed = opipe->sed; 2878 struct ohci_soft_td *data, *tail; 2879 int s, len, endpt; 2880 2881 if (sc->sc_bus.dying) 2882 return (USBD_IOERROR); 2883 2884 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%u " 2885 "flags=%d priv=%p\n", 2886 xfer, xfer->length, xfer->flags, xfer->priv)); 2887 2888 #ifdef DIAGNOSTIC 2889 if (xfer->rqflags & URQ_REQUEST) 2890 panic("ohci_device_intr_transfer: a request"); 2891 #endif 2892 2893 len = xfer->length; 2894 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2895 2896 data = opipe->tail.td; 2897 tail = ohci_alloc_std(sc); 2898 if (tail == NULL) 2899 return (USBD_NOMEM); 2900 tail->xfer = NULL; 2901 2902 data->td.td_flags = htole32( 2903 (usbd_xfer_isread(xfer) ? OHCI_TD_IN : OHCI_TD_OUT) | 2904 OHCI_TD_NOCC | 2905 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2906 if (xfer->flags & USBD_SHORT_XFER_OK) 2907 data->td.td_flags |= htole32(OHCI_TD_R); 2908 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0)); 2909 data->nexttd = tail; 2910 data->td.td_nexttd = htole32(tail->physaddr); 2911 data->td.td_be = htole32(letoh32(data->td.td_cbp) + len - 1); 2912 data->len = len; 2913 data->xfer = xfer; 2914 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2915 xfer->hcpriv = data; 2916 2917 #ifdef OHCI_DEBUG 2918 if (ohcidebug > 5) { 2919 DPRINTF(("ohci_device_intr_transfer:\n")); 2920 ohci_dump_ed(sed); 2921 ohci_dump_tds(data); 2922 } 2923 #endif 2924 2925 /* Insert ED in schedule */ 2926 s = splusb(); 2927 sed->ed.ed_tailp = htole32(tail->physaddr); 2928 opipe->tail.td = tail; 2929 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2930 2931 #if 0 2932 /* 2933 * This goes horribly wrong, printing thousands of descriptors, 2934 * because false references are followed due to the fact that the 2935 * TD is gone. 2936 */ 2937 if (ohcidebug > 5) { 2938 usb_delay_ms(&sc->sc_bus, 5); 2939 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2940 OREAD4(sc, OHCI_COMMAND_STATUS))); 2941 ohci_dump_ed(sed); 2942 ohci_dump_tds(data); 2943 } 2944 #endif 2945 splx(s); 2946 2947 if (sc->sc_bus.use_polling) 2948 ohci_waitintr(sc, xfer); 2949 2950 return (USBD_IN_PROGRESS); 2951 } 2952 2953 void 2954 ohci_device_intr_abort(struct usbd_xfer *xfer) 2955 { 2956 KASSERT(!xfer->pipe->repeat || xfer->pipe->intrxfer == xfer); 2957 2958 ohci_abort_xfer(xfer, USBD_CANCELLED); 2959 } 2960 2961 /* Close a device interrupt pipe. */ 2962 void 2963 ohci_device_intr_close(struct usbd_pipe *pipe) 2964 { 2965 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2966 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 2967 int nslots = opipe->u.intr.nslots; 2968 int pos = opipe->u.intr.pos; 2969 int j; 2970 struct ohci_soft_ed *p, *sed = opipe->sed; 2971 int s; 2972 2973 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2974 pipe, nslots, pos)); 2975 s = splusb(); 2976 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2977 if ((letoh32(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2978 (letoh32(sed->ed.ed_headp) & OHCI_HEADMASK)) 2979 usb_delay_ms(&sc->sc_bus, 2); 2980 2981 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2982 ; 2983 #ifdef DIAGNOSTIC 2984 if (p == NULL) 2985 panic("ohci_device_intr_close: ED not found"); 2986 #endif 2987 p->next = sed->next; 2988 p->ed.ed_nexted = sed->ed.ed_nexted; 2989 splx(s); 2990 2991 for (j = 0; j < nslots; j++) 2992 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2993 2994 ohci_free_std(sc, opipe->tail.td); 2995 ohci_free_sed(sc, opipe->sed); 2996 } 2997 2998 usbd_status 2999 ohci_device_setintr(struct ohci_softc *sc, struct ohci_pipe *opipe, int ival) 3000 { 3001 int i, j, s, best; 3002 u_int npoll, slow, shigh, nslots; 3003 u_int bestbw, bw; 3004 struct ohci_soft_ed *hsed, *sed = opipe->sed; 3005 3006 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 3007 if (ival == 0) { 3008 printf("ohci_setintr: 0 interval\n"); 3009 return (USBD_INVAL); 3010 } 3011 3012 npoll = OHCI_NO_INTRS; 3013 while (npoll > ival) 3014 npoll /= 2; 3015 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3016 3017 /* 3018 * We now know which level in the tree the ED must go into. 3019 * Figure out which slot has most bandwidth left over. 3020 * Slots to examine: 3021 * npoll 3022 * 1 0 3023 * 2 1 2 3024 * 4 3 4 5 6 3025 * 8 7 8 9 10 11 12 13 14 3026 * N (N-1) .. (N-1+N-1) 3027 */ 3028 slow = npoll-1; 3029 shigh = slow + npoll; 3030 nslots = OHCI_NO_INTRS / npoll; 3031 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3032 bw = 0; 3033 for (j = 0; j < nslots; j++) 3034 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3035 if (bw < bestbw) { 3036 best = i; 3037 bestbw = bw; 3038 } 3039 } 3040 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3041 best, slow, shigh, bestbw)); 3042 3043 s = splusb(); 3044 hsed = sc->sc_eds[best]; 3045 sed->next = hsed->next; 3046 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3047 hsed->next = sed; 3048 hsed->ed.ed_nexted = htole32(sed->physaddr); 3049 splx(s); 3050 3051 for (j = 0; j < nslots; j++) 3052 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3053 opipe->u.intr.nslots = nslots; 3054 opipe->u.intr.pos = best; 3055 3056 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3057 return (USBD_NORMAL_COMPLETION); 3058 } 3059 3060 /***********************/ 3061 3062 usbd_status 3063 ohci_device_isoc_transfer(struct usbd_xfer *xfer) 3064 { 3065 usbd_status err; 3066 3067 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3068 3069 /* Put it on our queue, */ 3070 err = usb_insert_transfer(xfer); 3071 3072 /* bail out on error, */ 3073 if (err && err != USBD_IN_PROGRESS) 3074 return (err); 3075 3076 /* XXX should check inuse here */ 3077 3078 /* insert into schedule, */ 3079 ohci_device_isoc_enter(xfer); 3080 3081 /* and start if the pipe wasn't running */ 3082 if (!err) 3083 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3084 3085 return (err); 3086 } 3087 3088 void 3089 ohci_device_isoc_enter(struct usbd_xfer *xfer) 3090 { 3091 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3092 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3093 struct ohci_soft_ed *sed = opipe->sed; 3094 struct iso *iso = &opipe->u.iso; 3095 struct ohci_soft_itd *sitd, *nsitd; 3096 ohci_physaddr_t buf, offs, noffs, bp0; 3097 int i, ncur, nframes; 3098 int s; 3099 3100 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3101 "nframes=%d\n", 3102 iso->inuse, iso->next, xfer, xfer->nframes)); 3103 3104 if (sc->sc_bus.dying) 3105 return; 3106 3107 if (iso->next == -1) { 3108 /* Not in use yet, schedule it a few frames ahead. */ 3109 iso->next = letoh32(sc->sc_hcca->hcca_frame_number) + 5; 3110 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3111 iso->next)); 3112 } 3113 3114 sitd = opipe->tail.itd; 3115 buf = DMAADDR(&xfer->dmabuf, 0); 3116 bp0 = OHCI_PAGE(buf); 3117 offs = OHCI_PAGE_OFFSET(buf); 3118 nframes = xfer->nframes; 3119 xfer->hcpriv = sitd; 3120 for (i = ncur = 0; i < nframes; i++, ncur++) { 3121 noffs = offs + xfer->frlengths[i]; 3122 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3123 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3124 3125 /* Allocate next ITD */ 3126 nsitd = ohci_alloc_sitd(sc); 3127 if (nsitd == NULL) { 3128 /* XXX what now? */ 3129 printf("%s: isoc TD alloc failed\n", 3130 sc->sc_bus.bdev.dv_xname); 3131 return; 3132 } 3133 3134 /* Fill current ITD */ 3135 sitd->itd.itd_flags = htole32( 3136 OHCI_ITD_NOCC | 3137 OHCI_ITD_SET_SF(iso->next) | 3138 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3139 OHCI_ITD_SET_FC(ncur)); 3140 sitd->itd.itd_bp0 = htole32(bp0); 3141 sitd->nextitd = nsitd; 3142 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3143 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3144 sitd->xfer = xfer; 3145 sitd->flags = 0; 3146 3147 sitd = nsitd; 3148 iso->next = iso->next + ncur; 3149 bp0 = OHCI_PAGE(buf + offs); 3150 ncur = 0; 3151 } 3152 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3153 offs = noffs; 3154 } 3155 nsitd = ohci_alloc_sitd(sc); 3156 if (nsitd == NULL) { 3157 /* XXX what now? */ 3158 printf("%s: isoc TD alloc failed\n", 3159 sc->sc_bus.bdev.dv_xname); 3160 return; 3161 } 3162 /* Fixup last used ITD */ 3163 sitd->itd.itd_flags = htole32( 3164 OHCI_ITD_NOCC | 3165 OHCI_ITD_SET_SF(iso->next) | 3166 OHCI_ITD_SET_DI(0) | 3167 OHCI_ITD_SET_FC(ncur)); 3168 sitd->itd.itd_bp0 = htole32(bp0); 3169 sitd->nextitd = nsitd; 3170 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3171 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3172 sitd->xfer = xfer; 3173 sitd->flags = OHCI_CALL_DONE; 3174 3175 iso->next = iso->next + ncur; 3176 iso->inuse += nframes; 3177 3178 xfer->actlen = offs; /* XXX pretend we did it all */ 3179 3180 xfer->status = USBD_IN_PROGRESS; 3181 3182 #ifdef OHCI_DEBUG 3183 if (ohcidebug > 5) { 3184 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3185 letoh32(sc->sc_hcca->hcca_frame_number))); 3186 ohci_dump_itds(xfer->hcpriv); 3187 ohci_dump_ed(sed); 3188 } 3189 #endif 3190 3191 s = splusb(); 3192 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3193 opipe->tail.itd = nsitd; 3194 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 3195 splx(s); 3196 3197 #ifdef OHCI_DEBUG 3198 if (ohcidebug > 5) { 3199 delay(150000); 3200 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3201 letoh32(sc->sc_hcca->hcca_frame_number))); 3202 ohci_dump_itds(xfer->hcpriv); 3203 ohci_dump_ed(sed); 3204 } 3205 #endif 3206 } 3207 3208 usbd_status 3209 ohci_device_isoc_start(struct usbd_xfer *xfer) 3210 { 3211 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3212 3213 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3214 3215 if (sc->sc_bus.dying) 3216 return (USBD_IOERROR); 3217 3218 #ifdef DIAGNOSTIC 3219 if (xfer->status != USBD_IN_PROGRESS) 3220 printf("ohci_device_isoc_start: not in progress %p\n", xfer); 3221 #endif 3222 3223 /* XXX anything to do? */ 3224 3225 if (sc->sc_bus.use_polling) { 3226 DPRINTF(("Starting ohci isoc xfer with polling. Bad idea?\n")); 3227 ohci_waitintr(sc, xfer); 3228 } 3229 3230 return (USBD_IN_PROGRESS); 3231 } 3232 3233 void 3234 ohci_device_isoc_abort(struct usbd_xfer *xfer) 3235 { 3236 struct ohci_softc *sc = (struct ohci_softc *)xfer->device->bus; 3237 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3238 struct ohci_soft_ed *sed; 3239 struct ohci_soft_itd *sitd; 3240 int s; 3241 3242 s = splusb(); 3243 3244 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3245 3246 /* Transfer is already done. */ 3247 if (xfer->status != USBD_NOT_STARTED && 3248 xfer->status != USBD_IN_PROGRESS) { 3249 splx(s); 3250 printf("ohci_device_isoc_abort: early return\n"); 3251 return; 3252 } 3253 3254 /* Give xfer the requested abort code. */ 3255 xfer->status = USBD_CANCELLED; 3256 3257 sed = opipe->sed; 3258 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3259 3260 sitd = xfer->hcpriv; 3261 #ifdef DIAGNOSTIC 3262 if (sitd == NULL) { 3263 splx(s); 3264 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3265 return; 3266 } 3267 #endif 3268 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3269 #ifdef DIAGNOSTIC 3270 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3271 sitd->isdone = 1; 3272 #endif 3273 } 3274 3275 splx(s); 3276 3277 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3278 3279 s = splusb(); 3280 3281 /* Run callback. */ 3282 usb_transfer_complete(xfer); 3283 3284 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3285 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3286 3287 splx(s); 3288 } 3289 3290 void 3291 ohci_device_isoc_done(struct usbd_xfer *xfer) 3292 { 3293 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3294 } 3295 3296 usbd_status 3297 ohci_setup_isoc(struct usbd_pipe *pipe) 3298 { 3299 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3300 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3301 struct iso *iso = &opipe->u.iso; 3302 int s; 3303 3304 iso->next = -1; 3305 iso->inuse = 0; 3306 3307 s = splusb(); 3308 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3309 splx(s); 3310 3311 return (USBD_NORMAL_COMPLETION); 3312 } 3313 3314 void 3315 ohci_device_isoc_close(struct usbd_pipe *pipe) 3316 { 3317 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3318 struct ohci_softc *sc = (struct ohci_softc *)pipe->device->bus; 3319 3320 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3321 ohci_close_pipe(pipe, sc->sc_isoc_head); 3322 #ifdef DIAGNOSTIC 3323 opipe->tail.itd->isdone = 1; 3324 #endif 3325 ohci_free_sitd(sc, opipe->tail.itd); 3326 } 3327