xref: /original-bsd/sys/hp300/dev/dcmreg.h (revision 2ad443ff)
1 /*
2  * Copyright (c) 1988 University of Utah.
3  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * the Systems Programming Group of the University of Utah Computer
8  * Science Department.
9  *
10  * %sccs.include.redist.c%
11  *
12  * from: Utah $Hdr: dcmreg.h 1.3 89/08/23$
13  *
14  *	@(#)dcmreg.h	7.2 (Berkeley) 05/25/90
15  */
16 
17 struct dcmdevice {	   /* host address, only odd bytes addressed */
18 	u_char	dcm_pad0;
19 	volatile u_char	dcm_rsid;	/* Reset / ID			0001 */
20 	u_char	dcm_pad1;
21 	volatile u_char	dcm_ic;		/* Interrupt control register	0003 */
22 	u_char	dcm_pad2;
23 	volatile u_char	dcm_sem;	/* Semaphore register		0005 */
24 	u_char  dcm_pad3[0x7ffa];	/* Unaddressable	0006-7fff */
25 	u_char	dcm_pad4;
26 	volatile u_char	dcm_iir;	/* Interrupt ident register	8001 */
27 	u_char	dcm_pad5;
28 	volatile u_char	dcm_cr;		/* Command register		8003 */
29 	u_char  dcm_pad6[0x3fc];	/* Card scratch		8004-83ff */
30 	struct	dcmrfifo {
31 		u_char	ptr_pad1;
32 		volatile u_char	data_char;
33 		u_char	ptr_pad2;
34 		volatile u_char	data_stat;
35 	} dcm_rfifos[4][0x80];		/* Receive queues		8400 */
36 	struct  {
37 		u_char	ptr_pad1;
38 		volatile u_char	data_data;
39 	} dcm_bmap[0x100];		/* Bitmap table			8c00 */
40 	struct  {
41 		u_char	ptr_pad;
42 		volatile u_char	ptr;
43 	} dcm_rhead[4];			/* Fifo head - receive		8e00 */
44 	struct  {
45 		u_char  ptr_pad;
46 		volatile u_char  ptr;
47 	} dcm_rtail[4];			/* Fifo tail - receive		8e08 */
48 	struct  {
49 		u_char	ptr_pad;
50 		volatile u_char	ptr;
51 	} dcm_thead[4];			/* Fifo head - transmit		8e10 */
52 	struct  {
53 		u_char	ptr_pad;
54 		volatile u_char	ptr;
55 	} dcm_ttail[4];			/* Fifo tail - transmit		8e18 */
56 	struct  {
57 		u_char	pad1;
58 		volatile u_char	dcm_conf;
59 		u_char	pad2;
60 		volatile u_char	dcm_baud;
61 	} dcm_data[4];			/* Configuration registers	8e20 */
62 	u_char  dcm_pad7;
63 	volatile u_char  dcm_mdmin;	/* Modem in			8e31 */
64 	u_char  dcm_pad8;
65 	volatile u_char  dcm_mdmout;	/* Modem out			8e33 */
66 	u_char  dcm_pad9;
67 	volatile u_char  dcm_mdmmsk;	/* Modem mask			8e35 */
68 	struct  {
69 		u_char pad1;
70 		volatile u_char dcm_data;
71 	} dcm_cmdtab[4];		/* Command tables		8e36 */
72 	struct  {
73 		u_char pad1;
74 		volatile u_char dcm_data;
75 	} dcm_icrtab[4];		/* Interrupt data		8e3e */
76 	u_char  dcm_pad10;
77 	volatile u_char  dcm_stcon;	/* Self test condition		8e47 */
78 	u_char  dcm_pad11[0x98];	/* Undef SR regs	8e48-8edf */
79 	struct	dcmtfifo {
80 	    u_char  ptr_pad1;
81 	    volatile u_char  data_char;
82 	} dcm_tfifos[4][0x10];		/* Transmit queues		8ee0 */
83 };
84 
85 /*
86  * Overlay structure for port specific queue "registers".
87  * Starts at offset 0x8E00+(port*2).
88  */
89 struct	dcmpreg {
90 	u_char		pad0;		/* +00 */
91 	volatile u_char	r_head;		/* +01 */
92 	u_char		pad1[7];	/* +02 */
93 	volatile u_char	r_tail;		/* +09 */
94 	u_char		pad2[7];	/* +0A */
95 	volatile u_char	t_head;		/* +11 */
96 	u_char		pad3[7];	/* +12 */
97 	volatile u_char	t_tail;		/* +19 */
98 };
99 #define	dcm_preg(d, p)	((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
100 
101 /* interface reset/id */
102 #define DCMCON          0x80	/* REMOTE/LOCAL switch, read */
103 #define	DCMID		0x5	/* hardwired card id, read */
104 #define	DCMRS		0x80	/* software reset, write */
105 
106 /* interrupt control */
107 #define	DCMIPL(x)	((((x) >> 4) & 3) + 3)	/* interupt level, read */
108 #define	IC_IR		0x40	/* interupt request, read */
109 #define	IC_IE		0x80	/* interupt enable, write */
110 #define	IC_ID		0x00	/* interupt disable, write */
111 
112 
113 /* Semaphore control */
114 #define	SEM_BSY		0x80	/* read */
115 #define SEM_CLR         0xFF	/* write */
116 #define SEM_LOCK(dcm)	while ((dcm)->dcm_sem & SEM_BSY)
117 #define SEM_UNLOCK(dcm)	(dcm)->dcm_sem = SEM_CLR
118 
119 /* command register */
120 #define	CR_PORT0	0x1
121 #define	CR_PORT1	0x2
122 #define	CR_PORT2	0x4
123 #define	CR_PORT3	0x8
124 #define	CR_MODM		0x10	/* change modem output lines */
125 #define	CR_TIMER	0x20	/* 16ms interrupt timer toggle */
126 #define	CR_SELFT	0x40	/* run self test */
127 #define CR_MASK		0x7f
128 
129 /* interrupt ident register */
130 #define	IIR_PORT0	0x1
131 #define	IIR_PORT1	0x2
132 #define	IIR_PORT2	0x4
133 #define	IIR_PORT3	0x8
134 #define	IIR_SELFT	0x10	/* self test completed */
135 #define	IIR_MODM	0x20	/* change in modem input lines */
136 #define	IIR_TIMEO	0x40	/* Time out */
137 #define IIR_MASK	0x7f
138 
139 /* self test cond reg */
140 #define ST_OK           0xe0
141 
142 /* Line configuration register */
143 #define	LC_PNO		0x00
144 #define	LC_PODD		0x01
145 #define	LC_PEVEN	0x02
146 #define	LC_PMSK		0x03
147 
148 #define	LC_1STOP	0x00
149 #define	LC_1HSTOP	0x04
150 #define	LC_2STOP	0x08
151 #define	LC_STOPMSK	0x0b
152 
153 #define	LC_8BITS	0x30
154 #define	LC_7BITS	0x20
155 #define	LC_6BITS	0x10
156 #define	LC_5BITS	0x00
157 #define	LC_BITMSK	0x30
158 
159 /* baud reg */
160 #define BR_0		0x00
161 #define BR_50		0x01
162 #define BR_75		0x02
163 #define BR_110		0x03
164 #define BR_134  	0x04
165 #define BR_150		0x05
166 #define BR_300		0x06
167 #define BR_600		0x07
168 #define BR_900		0x08
169 #define BR_1200		0x09
170 #define BR_1800		0x0a
171 #define BR_2400		0x0b
172 #define BR_3600		0x0c
173 #define BR_4800		0x0d
174 #define BR_7200		0x0e
175 #define BR_9600		0x0f
176 #define BR_19200	0x10
177 #define BR_38400	0x11
178 
179 /* modem input register */
180 #define	MI_CTS		0x08
181 #define	MI_DM		0x04
182 #define	MI_CD		0x02
183 #define	MI_RI		0x01
184 
185 /* modem output register */
186 #define	MO_SR		0x04
187 #define	MO_DTR		0x02
188 #define	MO_RTS		0x01
189 #define	MO_ON		((MO_DTR) | (MO_RTS))
190 #define	MO_OFF		0x00
191 
192 /* cmd-tab values, write */
193 #define CT_CON		0x1	/* configuration change */
194 #define CT_TX		0x2	/* transmit buffer not empty */
195 #define CT_BRK		0x4	/* toggle BREAK */
196 
197 /* icr-tab values, read */
198 #define IT_TX		0x1	/* transmit buffer empty */
199 #define IT_SPEC		0x2	/* special character received */
200 
201 /* data errors */
202 #define RD_OVF		0x08
203 #define RD_BD		0x10
204 #define RD_PE		0x20
205 #define RD_OE		0x40
206 #define RD_FE		0x80
207 #define RD_MASK		0xf8
208 
209 /* Transmit/Receive masks */
210 #define TX_MASK		0x0f
211 #define RX_MASK		0xff
212 
213 /*
214  * WARNING: Serial console is assumed to be at SC13
215  * and CONUNIT must be 1, signaled by REMOTE/LOCAL switch on card
216  */
217 #define CONADDR	((struct dcmdevice *)(IOV(EXTIOBASE + (13 * IOCARDSIZE))))
218 #define CONUNIT	(1)
219