xref: /original-bsd/sys/hp300/dev/dcmreg.h (revision 94e7bb75)
1 /*
2  * Copyright (c) 1988 University of Utah.
3  * Copyright (c) 1982, 1986, 1990 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Berkeley by
7  * the Systems Programming Group of the University of Utah Computer
8  * Science Department.
9  *
10  * %sccs.include.redist.c%
11  *
12  * from: Utah $Hdr: dcmreg.h 1.7 92/01/21$
13  *
14  *	@(#)dcmreg.h	7.5 (Berkeley) 06/05/92
15  */
16 
17 #ifdef KERNEL
18 #include "hp/dev/iotypes.h"	/* XXX */
19 #else
20 #include <hp/dev/iotypes.h>	/* XXX */
21 #endif
22 
23 struct dcmdevice {	   /* host address, only odd bytes addressed */
24 	u_char	dcm_pad0;
25 	vu_char	dcm_rsid;		/* Reset / ID			0001 */
26 	u_char	dcm_pad1;
27 	vu_char	dcm_ic;			/* Interrupt control register	0003 */
28 	u_char	dcm_pad2;
29 	vu_char	dcm_sem;		/* Semaphore register		0005 */
30 	u_char  dcm_pad3[0x7ffa];	/* Unaddressable	0006-7fff */
31 	u_char	dcm_pad4;
32 	vu_char	dcm_iir;		/* Interrupt ident register	8001 */
33 	u_char	dcm_pad5;
34 	vu_char	dcm_cr;			/* Command register		8003 */
35 	u_char  dcm_pad6[0x3fc];	/* Card scratch		8004-83ff */
36 	struct	dcmrfifo {
37 		u_char	ptr_pad1;
38 		vu_char	data_char;
39 		u_char	ptr_pad2;
40 		vu_char	data_stat;
41 	} dcm_rfifos[4][0x80];		/* Receive queues		8400 */
42 	struct  {
43 		u_char	ptr_pad1;
44 		vu_char	data_data;
45 	} dcm_bmap[0x100];		/* Bitmap table			8c00 */
46 	struct  {
47 		u_char	ptr_pad;
48 		vu_char	ptr;
49 	} dcm_rhead[4];			/* Fifo head - receive		8e00 */
50 	struct  {
51 		u_char  ptr_pad;
52 		vu_char  ptr;
53 	} dcm_rtail[4];			/* Fifo tail - receive		8e08 */
54 	struct  {
55 		u_char	ptr_pad;
56 		vu_char	ptr;
57 	} dcm_thead[4];			/* Fifo head - transmit		8e10 */
58 	struct  {
59 		u_char	ptr_pad;
60 		vu_char	ptr;
61 	} dcm_ttail[4];			/* Fifo tail - transmit		8e18 */
62 	struct  {
63 		u_char	pad1;
64 		vu_char	dcm_conf;
65 		u_char	pad2;
66 		vu_char	dcm_baud;
67 	} dcm_data[4];			/* Configuration registers	8e20 */
68 	struct	modemreg {
69 		u_char	pad0;
70 		vu_char mdmin;		/* Modem in			8e31 */
71 		u_char  pad1;
72 		vu_char mdmout;		/* Modem out			8e33 */
73 		u_char  pad2;
74 		vu_char mdmmsk;		/* Modem mask			8e35 */
75 	} dcm_modem0;
76 	struct  {
77 		u_char pad1;
78 		vu_char dcm_data;
79 	} dcm_cmdtab[4];		/* Command tables		8e36 */
80 	struct  {
81 		u_char pad1;
82 		vu_char dcm_data;
83 	} dcm_icrtab[4];		/* Interrupt data		8e3e */
84 	u_char  dcm_pad10;
85 	vu_char dcm_stcon;		/* Self test condition		8e47 */
86 	struct modemreg dcm_modem1;	/* 638 Modem port1		8e48 */
87 	struct modemreg dcm_modem2;	/* 638 Modem port2		8e4e */
88 	struct modemreg dcm_modem3;	/* 638 Modem port3		8e54 */
89 	u_char	dcm_pad11;
90 	vu_char	dcm_modemchng;		/* 638 Modem change mask	8e5b */
91 	u_char	dcm_pad12;
92 	vu_char	dcm_modemintr;		/* 638 Modem interrupt mask	8e5d */
93 	u_char  dcm_pad13[0x82];	/* Undef Shared Ram	8e5e-8edf */
94 	struct	dcmtfifo {
95 	    u_char  ptr_pad1;
96 	    vu_char  data_char;
97 	} dcm_tfifos[4][0x10];		/* Transmit queues		8ee0 */
98 };
99 
100 /*
101  * Overlay structure for port specific queue "registers".
102  * Starts at offset 0x8E00+(port*2).
103  */
104 struct	dcmpreg {
105 	u_char		pad0;		/* +00 */
106 	vu_char	r_head;			/* +01 */
107 	u_char		pad1[7];	/* +02 */
108 	vu_char	r_tail;			/* +09 */
109 	u_char		pad2[7];	/* +0A */
110 	vu_char	t_head;			/* +11 */
111 	u_char		pad3[7];	/* +12 */
112 	vu_char	t_tail;			/* +19 */
113 };
114 #define	dcm_preg(d, p)	((struct dcmpreg *)((u_int)(d)+0x8e00+(p)*2))
115 
116 /* interface reset/id */
117 #define DCMCON          0x80	/* REMOTE/LOCAL switch, read */
118 #define	DCMID		0x5	/* hardwired card id, read */
119 #define	DCMRS		0x80	/* software reset, write */
120 
121 /* interrupt control */
122 #define	DCMIPL(x)	((((x) >> 4) & 3) + 3)	/* interupt level, read */
123 #define	IC_IR		0x40	/* interupt request, read */
124 #define	IC_IE		0x80	/* interupt enable, write */
125 #define	IC_ID		0x00	/* interupt disable, write */
126 
127 
128 /* Semaphore control */
129 #define	SEM_BSY		0x80	/* read */
130 #define SEM_CLR         0xFF	/* write */
131 #define SEM_LOCK(dcm)	while ((dcm)->dcm_sem & SEM_BSY)
132 #define SEM_UNLOCK(dcm)	(dcm)->dcm_sem = SEM_CLR
133 
134 /* command register */
135 #define	CR_PORT0	0x1
136 #define	CR_PORT1	0x2
137 #define	CR_PORT2	0x4
138 #define	CR_PORT3	0x8
139 #define	CR_MODM		0x10	/* change modem output lines */
140 #define	CR_TIMER	0x20	/* 16ms interrupt timer toggle */
141 #define	CR_SELFT	0x40	/* run self test */
142 #define CR_MASK		0x7f
143 
144 /* interrupt ident register */
145 #define	IIR_PORT0	0x1
146 #define	IIR_PORT1	0x2
147 #define	IIR_PORT2	0x4
148 #define	IIR_PORT3	0x8
149 #define	IIR_SELFT	0x10	/* self test completed */
150 #define	IIR_MODM	0x20	/* change in modem input lines */
151 #define	IIR_TIMEO	0x40	/* Time out */
152 #define IIR_MASK	0x7f
153 
154 /* self test cond reg */
155 #define ST_OK           0xe0
156 
157 /* Line configuration register */
158 #define	LC_PNO		0x00
159 #define	LC_PODD		0x01
160 #define	LC_PEVEN	0x02
161 #define	LC_PMSK		0x03
162 
163 #define	LC_1STOP	0x00
164 #define	LC_1HSTOP	0x04
165 #define	LC_2STOP	0x08
166 #define	LC_STOPMSK	0x0b
167 
168 #define	LC_8BITS	0x30
169 #define	LC_7BITS	0x20
170 #define	LC_6BITS	0x10
171 #define	LC_5BITS	0x00
172 #define	LC_BITMSK	0x30
173 
174 /* baud reg */
175 #define BR_0		0x00
176 #define BR_50		0x01
177 #define BR_75		0x02
178 #define BR_110		0x03
179 #define BR_134  	0x04
180 #define BR_150		0x05
181 #define BR_300		0x06
182 #define BR_600		0x07
183 #define BR_900		0x08
184 #define BR_1200		0x09
185 #define BR_1800		0x0a
186 #define BR_2400		0x0b
187 #define BR_3600		0x0c
188 #define BR_4800		0x0d
189 #define BR_7200		0x0e
190 #define BR_9600		0x0f
191 #define BR_19200	0x10
192 #define BR_38400	0x11
193 
194 /* modem input register */
195 #define	MI_CTS		0x08
196 #define	MI_DM		0x04
197 #define	MI_CD		0x02
198 #define	MI_RI		0x01
199 
200 /* modem output register */
201 #define	MO_SR		0x04
202 #define	MO_DTR		0x02
203 #define	MO_RTS		0x01
204 #define	MO_ON		((MO_DTR) | (MO_RTS))
205 #define	MO_OFF		0x00
206 
207 /* cmd-tab values, write */
208 #define CT_CON		0x1	/* configuration change */
209 #define CT_TX		0x2	/* transmit buffer not empty */
210 #define CT_BRK		0x4	/* toggle BREAK */
211 
212 /* icr-tab values, read */
213 #define IT_TX		0x1	/* transmit buffer empty */
214 #define IT_SPEC		0x2	/* special character received */
215 
216 /* data errors */
217 #define RD_OVF		0x08
218 #define RD_BD		0x10
219 #define RD_PE		0x20
220 #define RD_OE		0x40
221 #define RD_FE		0x80
222 #define RD_MASK		0xf8
223 
224 /* Transmit/Receive masks */
225 #define TX_MASK		0x0f
226 #define RX_MASK		0xff
227 
228 /*
229  * WARNING: Serial console is assumed to be the lowest select-code card
230  * and that card must be logical unit 0 in the kernel.  Also, CONUNIT must
231  * be 1, the port affected by the REMOTE/LOCAL switch.
232  */
233 #define CONUNIT	(1)
234