1 /* 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1982, 1990 The Regents of the University of California. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department. 9 * 10 * %sccs.include.redist.c% 11 * 12 * from: Utah $Hdr: cpu.h 1.16 91/03/25$ 13 * 14 * @(#)cpu.h 7.6 (Berkeley) 05/07/91 15 */ 16 17 /* 18 * Exported definitions unique to hp300/68k cpu support. 19 */ 20 21 /* 22 * definitions of cpu-dependent requirements 23 * referenced in generic code 24 */ 25 #define COPY_SIGCODE /* copy sigcode above user stack in exec */ 26 27 /* 28 * function vs. inline configuration; 29 * these are defined to get generic functions 30 * rather than inline or machine-dependent implementations 31 */ 32 #define NEED_MINMAX /* need {,i,l,ul}{min,max} functions */ 33 #undef NEED_FFS /* don't need ffs function */ 34 #undef NEED_BCMP /* don't need bcmp function */ 35 #undef NEED_STRLEN /* don't need strlen function */ 36 37 #define cpu_exec(p) /* nothing */ 38 39 /* 40 * Arguments to hardclock, softclock and gatherstats 41 * encapsulate the previous machine state in an opaque 42 * clockframe; for hp300, use just what the hardware 43 * leaves on the stack. 44 */ 45 typedef struct intrframe { 46 int pc; 47 int ps; 48 } clockframe; 49 50 #define CLKF_USERMODE(framep) (((framep)->ps & PSL_S) == 0) 51 #define CLKF_BASEPRI(framep) (((framep)->ps & PSL_IPL7) == 0) 52 #define CLKF_PC(framep) ((framep)->pc) 53 54 55 /* 56 * Preempt the current process if in interrupt from user mode, 57 * or after the current trap/syscall if in system mode. 58 */ 59 #define need_resched() { want_resched++; aston(); } 60 61 /* 62 * Give a profiling tick to the current process from the softclock 63 * interrupt. On hp300, request an ast to send us through trap(), 64 * marking the proc as needing a profiling tick. 65 */ 66 #define profile_tick(p, framep) { (p)->p_flag |= SOWEUPC; aston(); } 67 68 /* 69 * Notify the current process (p) that it has a signal pending, 70 * process as soon as possible. 71 */ 72 #define signotify(p) aston() 73 74 #define aston() (astpending++) 75 76 int astpending; /* need to trap before returning to user mode */ 77 int want_resched; /* resched() was called */ 78 79 80 /* 81 * simulated software interrupt register 82 */ 83 extern unsigned char ssir; 84 85 #define SIR_NET 0x1 86 #define SIR_CLOCK 0x2 87 88 #define siroff(x) ssir &= ~(x) 89 #define setsoftnet() ssir |= SIR_NET 90 #define setsoftclock() ssir |= SIR_CLOCK 91 92 93 94 /* 95 * The rest of this should probably be moved to ../hp300/hp300cpu.h, 96 * although some of it could probably be put into generic 68k headers. 97 */ 98 99 /* values for machineid */ 100 #define HP_320 0 /* 16Mhz 68020+HP MMU+16K external cache */ 101 #define HP_330 1 /* 16Mhz 68020+68851 MMU */ 102 #define HP_350 2 /* 25Mhz 68020+HP MMU+32K external cache */ 103 #define HP_360 3 /* 25Mhz 68030 */ 104 #define HP_370 4 /* 33Mhz 68030+64K external cache */ 105 #define HP_340 5 /* 16Mhz 68030 */ 106 #define HP_375 6 /* 50Mhz 68030+32K external cache */ 107 108 /* values for mmutype (assigned for quick testing) */ 109 #define MMU_68030 -1 /* 68030 on-chip subset of 68851 */ 110 #define MMU_HP 0 /* HP proprietary */ 111 #define MMU_68851 1 /* Motorola 68851 */ 112 113 /* values for ectype */ 114 #define EC_PHYS -1 /* external physical address cache */ 115 #define EC_NONE 0 /* no external cache */ 116 #define EC_VIRT 1 /* external virtual address cache */ 117 118 /* values for cpuspeed (not really related to clock speed due to caches) */ 119 #define MHZ_8 1 120 #define MHZ_16 2 121 #define MHZ_25 3 122 #define MHZ_33 4 123 #define MHZ_50 6 124 125 #ifdef KERNEL 126 extern int machineid, mmutype, ectype; 127 extern char *intiobase, *intiolimit; 128 129 /* what is this supposed to do? i.e. how is it different than startrtclock? */ 130 #define enablertclock() 131 132 #endif 133 134 /* physical memory sections */ 135 #define ROMBASE (0x00000000) 136 #define INTIOBASE (0x00400000) 137 #define INTIOTOP (0x00600000) 138 #define EXTIOBASE (0x00600000) 139 #define EXTIOTOP (0x20000000) 140 #define MAXADDR (0xFFFFF000) 141 142 /* 143 * Internal IO space: 144 * 145 * Ranges from 0x400000 to 0x600000 (IIOMAPSIZE). 146 * 147 * Internal IO space is mapped in the kernel from ``intiobase'' to 148 * ``intiolimit'' (defined in locore.s). Since it is always mapped, 149 * conversion between physical and kernel virtual addresses is easy. 150 */ 151 #define ISIIOVA(va) \ 152 ((char *)(va) >= intiobase && (char *)(va) < intiolimit) 153 #define IIOV(pa) ((int)(pa)-INTIOBASE+(int)intiobase) 154 #define IIOP(va) ((int)(va)-(int)intiobase+INTIOBASE) 155 #define IIOPOFF(pa) ((int)(pa)-INTIOBASE) 156 #define IIOMAPSIZE btoc(INTIOTOP-INTIOBASE) /* 2mb */ 157 158 /* 159 * External IO space: 160 * 161 * DIO ranges from select codes 0-63 at physical addresses given by: 162 * 0x600000 + (sc - 32) * 0x10000 163 * DIO cards are addressed in the range 0-31 [0x600000-0x800000) for 164 * their control space and the remaining areas, [0x200000-0x400000) and 165 * [0x800000-0x1000000), are for additional space required by a card; 166 * e.g. a display framebuffer. 167 * 168 * DIO-II ranges from select codes 132-255 at physical addresses given by: 169 * 0x1000000 + (sc - 132) * 0x400000 170 * The address range of DIO-II space is thus [0x1000000-0x20000000). 171 * 172 * DIO/DIO-II space is too large to map in its entirety, instead devices 173 * are mapped into kernel virtual address space allocated from a range 174 * of EIOMAPSIZE pages (vmparam.h) starting at ``extiobase''. 175 */ 176 #define DIOBASE (0x600000) 177 #define DIOTOP (0x1000000) 178 #define DIOCSIZE (0x10000) 179 #define DIOIIBASE (0x01000000) 180 #define DIOIITOP (0x20000000) 181 #define DIOIICSIZE (0x00400000) 182 183 /* 184 * HP MMU 185 */ 186 #define MMUBASE IIOPOFF(0x5F4000) 187 #define MMUSSTP 0x0 188 #define MMUUSTP 0x4 189 #define MMUTBINVAL 0x8 190 #define MMUSTAT 0xC 191 #define MMUCMD MMUSTAT 192 193 #define MMU_UMEN 0x0001 /* enable user mapping */ 194 #define MMU_SMEN 0x0002 /* enable supervisor mapping */ 195 #define MMU_CEN 0x0004 /* enable data cache */ 196 #define MMU_BERR 0x0008 /* bus error */ 197 #define MMU_IEN 0x0020 /* enable instruction cache */ 198 #define MMU_FPE 0x0040 /* enable 68881 FP coprocessor */ 199 #define MMU_WPF 0x2000 /* write protect fault */ 200 #define MMU_PF 0x4000 /* page fault */ 201 #define MMU_PTF 0x8000 /* page table fault */ 202 203 #define MMU_FAULT (MMU_PTF|MMU_PF|MMU_WPF|MMU_BERR) 204 #define MMU_ENAB (MMU_UMEN|MMU_SMEN|MMU_IEN|MMU_FPE) 205 206 /* 207 * 68851 and 68030 MMU 208 */ 209 #define PMMU_LVLMASK 0x0007 210 #define PMMU_INV 0x0400 211 #define PMMU_WP 0x0800 212 #define PMMU_ALV 0x1000 213 #define PMMU_SO 0x2000 214 #define PMMU_LV 0x4000 215 #define PMMU_BE 0x8000 216 #define PMMU_FAULT (PMMU_WP|PMMU_INV) 217 218 /* 680X0 function codes */ 219 #define FC_USERD 1 /* user data space */ 220 #define FC_USERP 2 /* user program space */ 221 #define FC_PURGE 3 /* HPMMU: clear TLB entries */ 222 #define FC_SUPERD 5 /* supervisor data space */ 223 #define FC_SUPERP 6 /* supervisor program space */ 224 #define FC_CPU 7 /* CPU space */ 225 226 /* fields in the 68020 cache control register */ 227 #define IC_ENABLE 0x0001 /* enable instruction cache */ 228 #define IC_FREEZE 0x0002 /* freeze instruction cache */ 229 #define IC_CE 0x0004 /* clear instruction cache entry */ 230 #define IC_CLR 0x0008 /* clear entire instruction cache */ 231 232 /* additional fields in the 68030 cache control register */ 233 #define IC_BE 0x0010 /* instruction burst enable */ 234 #define DC_ENABLE 0x0100 /* data cache enable */ 235 #define DC_FREEZE 0x0200 /* data cache freeze */ 236 #define DC_CE 0x0400 /* clear data cache entry */ 237 #define DC_CLR 0x0800 /* clear entire data cache */ 238 #define DC_BE 0x1000 /* data burst enable */ 239 #define DC_WA 0x2000 /* write allocate */ 240 241 #define CACHE_ON (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE) 242 #define CACHE_OFF (DC_CLR|IC_CLR) 243 #define CACHE_CLR (CACHE_ON) 244 #define IC_CLEAR (DC_WA|DC_BE|DC_ENABLE|IC_BE|IC_CLR|IC_ENABLE) 245 #define DC_CLEAR (DC_WA|DC_BE|DC_CLR|DC_ENABLE|IC_BE|IC_ENABLE) 246