xref: /original-bsd/sys/sparc/fpu/fpu_add.c (revision edc2ab72)
1 /*
2  * Copyright (c) 1992, 1993
3  *	The Regents of the University of California.  All rights reserved.
4  *
5  * This software was developed by the Computer Systems Engineering group
6  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
7  * contributed to Berkeley.
8  *
9  * All advertising materials mentioning features or use of this software
10  * must display the following acknowledgement:
11  *	This product includes software developed by the University of
12  *	California, Lawrence Berkeley Laboratory.
13  *
14  * %sccs.include.redist.c%
15  *
16  *	@(#)fpu_add.c	8.1 (Berkeley) 06/11/93
17  *
18  * from: $Header: fpu_add.c,v 1.4 92/11/26 01:39:46 torek Exp $
19  */
20 
21 /*
22  * Perform an FPU add (return x + y).
23  *
24  * To subtract, negate y and call add.
25  */
26 
27 #include <sys/types.h>
28 
29 #include <machine/reg.h>
30 
31 #include <sparc/fpu/fpu_arith.h>
32 #include <sparc/fpu/fpu_emu.h>
33 
34 struct fpn *
35 fpu_add(fe)
36 	register struct fpemu *fe;
37 {
38 	register struct fpn *x = &fe->fe_f1, *y = &fe->fe_f2, *r;
39 	register u_int r0, r1, r2, r3;
40 	register int rd;
41 
42 	/*
43 	 * Put the `heavier' operand on the right (see fpu_emu.h).
44 	 * Then we will have one of the following cases, taken in the
45 	 * following order:
46 	 *
47 	 *  - y = NaN.  Implied: if only one is a signalling NaN, y is.
48 	 *	The result is y.
49 	 *  - y = Inf.  Implied: x != NaN (is 0, number, or Inf: the NaN
50 	 *    case was taken care of earlier).
51 	 *	If x = -y, the result is NaN.  Otherwise the result
52 	 *	is y (an Inf of whichever sign).
53 	 *  - y is 0.  Implied: x = 0.
54 	 *	If x and y differ in sign (one positive, one negative),
55 	 *	the result is +0 except when rounding to -Inf.  If same:
56 	 *	+0 + +0 = +0; -0 + -0 = -0.
57 	 *  - x is 0.  Implied: y != 0.
58 	 *	Result is y.
59 	 *  - other.  Implied: both x and y are numbers.
60 	 *	Do addition a la Hennessey & Patterson.
61 	 */
62 	ORDER(x, y);
63 	if (ISNAN(y))
64 		return (y);
65 	if (ISINF(y)) {
66 		if (ISINF(x) && x->fp_sign != y->fp_sign)
67 			return (fpu_newnan(fe));
68 		return (y);
69 	}
70 	rd = ((fe->fe_fsr >> FSR_RD_SHIFT) & FSR_RD_MASK);
71 	if (ISZERO(y)) {
72 		if (rd != FSR_RD_RM)	/* only -0 + -0 gives -0 */
73 			y->fp_sign &= x->fp_sign;
74 		else			/* any -0 operand gives -0 */
75 			y->fp_sign |= x->fp_sign;
76 		return (y);
77 	}
78 	if (ISZERO(x))
79 		return (y);
80 	/*
81 	 * We really have two numbers to add, although their signs may
82 	 * differ.  Make the exponents match, by shifting the smaller
83 	 * number right (e.g., 1.011 => 0.1011) and increasing its
84 	 * exponent (2^3 => 2^4).  Note that we do not alter the exponents
85 	 * of x and y here.
86 	 */
87 	r = &fe->fe_f3;
88 	r->fp_class = FPC_NUM;
89 	if (x->fp_exp == y->fp_exp) {
90 		r->fp_exp = x->fp_exp;
91 		r->fp_sticky = 0;
92 	} else {
93 		if (x->fp_exp < y->fp_exp) {
94 			/*
95 			 * Try to avoid subtract case iii (see below).
96 			 * This also guarantees that x->fp_sticky = 0.
97 			 */
98 			SWAP(x, y);
99 		}
100 		/* now x->fp_exp > y->fp_exp */
101 		r->fp_exp = x->fp_exp;
102 		r->fp_sticky = fpu_shr(y, x->fp_exp - y->fp_exp);
103 	}
104 	r->fp_sign = x->fp_sign;
105 	if (x->fp_sign == y->fp_sign) {
106 		FPU_DECL_CARRY
107 
108 		/*
109 		 * The signs match, so we simply add the numbers.  The result
110 		 * may be `supernormal' (as big as 1.111...1 + 1.111...1, or
111 		 * 11.111...0).  If so, a single bit shift-right will fix it
112 		 * (but remember to adjust the exponent).
113 		 */
114 		/* r->fp_mant = x->fp_mant + y->fp_mant */
115 		FPU_ADDS(r->fp_mant[3], x->fp_mant[3], y->fp_mant[3]);
116 		FPU_ADDCS(r->fp_mant[2], x->fp_mant[2], y->fp_mant[2]);
117 		FPU_ADDCS(r->fp_mant[1], x->fp_mant[1], y->fp_mant[1]);
118 		FPU_ADDC(r0, x->fp_mant[0], y->fp_mant[0]);
119 		if ((r->fp_mant[0] = r0) >= FP_2) {
120 			(void) fpu_shr(r, 1);
121 			r->fp_exp++;
122 		}
123 	} else {
124 		FPU_DECL_CARRY
125 
126 		/*
127 		 * The signs differ, so things are rather more difficult.
128 		 * H&P would have us negate the negative operand and add;
129 		 * this is the same as subtracting the negative operand.
130 		 * This is quite a headache.  Instead, we will subtract
131 		 * y from x, regardless of whether y itself is the negative
132 		 * operand.  When this is done one of three conditions will
133 		 * hold, depending on the magnitudes of x and y:
134 		 *   case i)   |x| > |y|.  The result is just x - y,
135 		 *	with x's sign, but it may need to be normalized.
136 		 *   case ii)  |x| = |y|.  The result is 0 (maybe -0)
137 		 *	so must be fixed up.
138 		 *   case iii) |x| < |y|.  We goofed; the result should
139 		 *	be (y - x), with the same sign as y.
140 		 * We could compare |x| and |y| here and avoid case iii,
141 		 * but that would take just as much work as the subtract.
142 		 * We can tell case iii has occurred by an overflow.
143 		 *
144 		 * N.B.: since x->fp_exp >= y->fp_exp, x->fp_sticky = 0.
145 		 */
146 		/* r->fp_mant = x->fp_mant - y->fp_mant */
147 		FPU_SET_CARRY(y->fp_sticky);
148 		FPU_SUBCS(r3, x->fp_mant[3], y->fp_mant[3]);
149 		FPU_SUBCS(r2, x->fp_mant[2], y->fp_mant[2]);
150 		FPU_SUBCS(r1, x->fp_mant[1], y->fp_mant[1]);
151 		FPU_SUBC(r0, x->fp_mant[0], y->fp_mant[0]);
152 		if (r0 < FP_2) {
153 			/* cases i and ii */
154 			if ((r0 | r1 | r2 | r3) == 0) {
155 				/* case ii */
156 				r->fp_class = FPC_ZERO;
157 				r->fp_sign = rd == FSR_RD_RM;
158 				return (r);
159 			}
160 		} else {
161 			/*
162 			 * Oops, case iii.  This can only occur when the
163 			 * exponents were equal, in which case neither
164 			 * x nor y have sticky bits set.  Flip the sign
165 			 * (to y's sign) and negate the result to get y - x.
166 			 */
167 #ifdef DIAGNOSTIC
168 			if (x->fp_exp != y->fp_exp || r->fp_sticky)
169 				panic("fpu_add");
170 #endif
171 			r->fp_sign = y->fp_sign;
172 			FPU_SUBS(r3, 0, r3);
173 			FPU_SUBCS(r2, 0, r2);
174 			FPU_SUBCS(r1, 0, r1);
175 			FPU_SUBC(r0, 0, r0);
176 		}
177 		r->fp_mant[3] = r3;
178 		r->fp_mant[2] = r2;
179 		r->fp_mant[1] = r1;
180 		r->fp_mant[0] = r0;
181 		if (r0 < FP_1)
182 			fpu_norm(r);
183 	}
184 	return (r);
185 }
186